Low-power-consumption tamper detection circuit and OBU device

Abstract

The utility model relates to a low-power-consumption tamper detection circuit and OBU equipment. The detection circuit comprises a detected switch, a switch module, a driving module and a detection level output end, the first end of the detected switch is connected with the power supply input through the switch module, and the second end of the detected switch is grounded, or the first end of the detected switch is grounded through the switch module, and the second end of the detected switch is connected with the power supply input; the driving module is connected with the switch module and the detected switch and is used for driving the switch module to be switched on or switched off according to the state of the detected switch; the detection level output end is connected with the first end of the detected switch and is used for outputting a detection level. According to the utility model, the power consumption of the whole equipment circuit can be reduced by reducing the power consumption of the tamper detection circuit in the working process, and the endurance time of the equipment is prolonged.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, and more specifically, to a low-power anti-disassembly detection circuit and an OBU device. Background Art

[0002] Since the OBU (On board Unit) is equivalent to the vehicle's ID card, which stores the vehicle identification code and related information such as license plate number and deduction account, etc., one vehicle, one machine and one card are all corresponding. To prevent unnecessary losses caused by loss and theft swiping, the OBU is usually designed with an anti-disassembly switch. When the switch is released, the flag byte of the ESAM information storage area in the OBU will be cleared, and the OBU will immediately become invalid to prevent the OBU device from being privately disassembled and misused. Since the OBU device is usually powered by a battery, the power consumption of each circuit should be fully considered in the circuit design. Therefore, how to achieve the anti-disassembly detection process with low power consumption is the key to the detection circuit design. Summary of the Utility Model

[0003] The technical problem to be solved by the utility model is to provide a low-power anti-disassembly detection circuit and an OBU device.

[0004] The technical solution adopted by the utility model to solve its technical problem is to construct a low-power anti-disassembly detection circuit, including: a switch to be detected, a switch module, a driving module and a detection level output terminal;

[0005] The first end of the switch to be detected is connected to the power supply input through the switch module, and the second end of the switch to be detected is grounded, or the first end of the switch to be detected is grounded through the switch module, and the second end of the switch to be detected is connected to the power supply input;

[0006] The driving module is connected to the switch module and the switch to be detected, and is used to drive the switch module to conduct or turn off according to the state of the switch to be detected;

[0007] The detection level output terminal is connected to the first end of the switch to be detected and is used to output the detection level.

[0008] Preferably, in an embodiment of the low-power anti-disassembly detection circuit of the utility model, when the first end of the switch to be detected is connected to the power supply input through the switch module and the second end of the switch to be detected is grounded, the switch module includes a first switch tube, a first resistor and a second resistor;

[0009] The control end of the first switch tube is connected to the first end of the first resistor, and the second end of the first resistor is connected to the driving module;

[0010] The first end of the first switching tube is connected to the power supply input, the second end of the first switching tube is connected to the first end of the second resistor, and the second end of the second resistor is connected to the first end of the switch to be detected.

[0011] Preferably, in an embodiment of the low-power anti-tampering detection circuit of the present invention, the driving module includes a second switching tube, a third resistor, a fourth resistor, and a first reverse isolation unit;

[0012] The first end of the third resistor and the first end of the fourth resistor are connected to the power supply input, the second end of the third resistor is connected to the first end of the second switching tube and the second end of the first resistor, the second end of the second switching tube is grounded, the control end of the second switching tube is connected to the first end of the first reverse isolation unit and the second end of the fourth resistor, and the second end of the first reverse isolation unit is connected to the first end of the switch to be detected.

[0013] Preferably, in an embodiment of the low-power anti-tampering detection circuit of the present invention, the second switching tube includes MOS transistor Q2; the gate of the MOS transistor Q2 is the control end of the second switching tube, the drain of the MOS transistor Q2 is the first end of the second switching tube, and the source of the MOS transistor Q2 is the second end of the second switching tube; and / or

[0014] The first reverse isolation unit includes diode D1; the anode of the diode D1 is the first end of the first reverse isolation unit, and the cathode of the diode D1 is the second end of the first reverse isolation unit.

[0015] Preferably, in an embodiment of the low-power anti-tampering detection circuit of the present invention, the first switching tube includes MOS transistor Q1; the gate of the MOS transistor Q1 is the control end of the first switching tube, the source of the MOS transistor Q1 is the first end of the first switching tube, and the drain of the MOS transistor Q1 is the second end of the first switching tube.

[0016] Preferably, in an embodiment of the low-power anti-tampering detection circuit of the present invention, when the first end of the switch to be detected is grounded through the switch module and the second end of the switch to be detected is connected to the power supply input, the switch module includes a third switching tube, a fifth resistor, and a sixth resistor;

[0017] The control end of the third switching tube is connected to the first end of the fifth resistor, and the second end of the fifth resistor is connected to the driving module;

[0018] The first end of the third switching tube is grounded, the second end of the third switching tube is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the first end of the switch to be detected.

[0019] Preferably, in an embodiment of the low-power anti-tamper detection circuit of the present utility model, the driving module includes a fourth switching tube, a seventh resistor, an eighth resistor, and a second reverse isolation unit;

[0020] The first end of the seventh resistor and the first end of the eighth resistor are grounded. The second end of the seventh resistor is connected to the first end of the fourth switching tube and the second end of the sixth resistor. The second end of the fourth switching tube is connected to the power supply input. The control end of the fourth switching tube is connected to the first end of the second reverse isolation unit and the second end of the eighth resistor. The second end of the second reverse isolation unit is connected to the first end of the switch to be detected.

[0021] Preferably, in an embodiment of the low-power anti-tamper detection circuit of the present utility model, the fourth switching tube includes MOS transistor Q4; the gate of the MOS transistor Q4 is the control end of the fourth switching tube, the drain of the MOS transistor Q4 is the first end of the fourth switching tube, and the source of the MOS transistor Q4 is the second end of the fourth switching tube; and / or

[0022] The second reverse isolation unit includes diode D2; the anode of the diode D2 is the second end of the second reverse isolation unit, and the cathode of the diode D2 is the first end of the second reverse isolation unit.

[0023] Preferably, in an embodiment of the low-power anti-tamper detection circuit of the present utility model, the third switching tube includes MOS transistor Q3; the gate of the MOS transistor Q3 is the control end of the third switching tube, the source of the MOS transistor Q3 is the first end of the third switching tube, and the drain of the MOS transistor Q3 is the second end of the third switching tube.

[0024] Preferably, in an embodiment of the low-power anti-tamper detection circuit of the present utility model, the switch to be detected includes a single-pole single-throw switch of a non-self-locking mechanical push-rod type.

[0025] The present utility model also constructs an OBU device, including: a controller and the low-power anti-tamper detection circuit as described above; wherein, the controller is connected to the detection level output end of the detection circuit.

[0026] Implementing a low-power anti-tamper detection circuit and an OBU device of the present utility model has the following beneficial effects: By reducing the power consumption of the anti-tamper detection circuit during operation, the power consumption of the entire device's circuit is reduced, and the battery life of the device is extended. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The present utility model will be further described below in conjunction with the drawings and embodiments. In the drawings:

[0028] Figure 1It is a logic block diagram of an embodiment of a low-power anti-disassembly detection circuit of the present utility model;

[0029] Figure 2 It is a logic block diagram of another embodiment of a low-power anti-disassembly detection circuit of the present utility model;

[0030] Figure 3 It is a circuit schematic diagram of an embodiment of a low-power anti-disassembly detection circuit of the present utility model;

[0031] Figure 4 It is a circuit schematic diagram of another embodiment of a low-power anti-disassembly detection circuit of the present utility model. Detailed implementation manners

[0032] For a clearer understanding of the technical features, objectives, and effects of the present utility model, the detailed implementation manners of the present utility model will now be described in detail with reference to the accompanying drawings.

[0033] As Figure 1 and Figure 2 shown, an embodiment of a low-power anti-disassembly detection circuit of the present utility model is shown. In Figure 1 and Figure 2 an embodiment of a low-power anti-disassembly detection circuit of the present utility model shown, it includes: a switch to be detected 130, a switch module 120, a driving module 110, and a detection level output terminal; a first end of the switch to be detected 130 is connected to a power supply input through the switch module 120, a second end of the switch to be detected 130 is grounded ( Figure 1 shown), or a first end of the switch to be detected 130 is grounded through the switch module 120, and a second end of the switch to be detected 130 is connected to a power supply input ( Figure 2 shown); the driving module 110 is connected to the switch module 120 and the switch to be detected 130, and is used to drive the switch module 120 to conduct or turn off according to the state of the switch to be detected 130; the detection level output terminal is connected to the first end of the switch to be detected 130 and is used to output a detection level. Specifically, in Figure 1In the illustrated embodiment, in the normal state, if the detected switch 130 is in the conducting state, the first end of the detected switch 130 is at a low level. At this time, the driving module 110 outputs a driving level to drive the switch module 120 to be in the off state. The detection level output terminal outputs a low level according to the level of the first end of the detected switch 130. When the detected switch 130 is damaged and switches from the default conducting state to the off state, the driving module 110 outputs a driving level according to the state of the detected switch 130 to drive the switch module 120 to conduct. The power supply input generates a high level at the first end of the detected switch 130 through the conducting switch module 120, and the detection level output terminal generates a high level. At this time, the detection level at the detection level output terminal changes from low to high. At this time, it can be judged that the detected switch 130 has been disassembled. In Figure 2 In the illustrated embodiment, in the normal state, if the detected switch 130 is in the conducting state, the first end of the detected switch 130 is at a high level. At this time, the driving module 110 outputs a driving level to drive the switch module 120 to be in the off state. The detection level output terminal outputs a high level according to the level of the first end of the detected switch 130. When the detected switch 130 is damaged and switches from the default conducting state to the off state, the driving module 110 outputs a driving level according to the state of the detected switch 130 to drive the switch module 120 to conduct. The conducting switch module 120 causes the first end of the detected switch 130 to be grounded and become a low level, and the detection level output terminal generates a low level. At this time, the detection level at the detection level output terminal changes from high to low. At this time, it can be judged that the detected switch 130 has been disassembled.

[0034] Optionally, such as Figure 3As shown, when the first end of the switch 130 to be detected is connected to the power supply input through the switch module 120 and the second end of the switch 130 to be detected is grounded, the switch module 120 includes a first switching tube, a first resistor, and a second resistor; the control end of the first switching tube is connected to the first end of the first resistor, and the second end of the first resistor is connected to the driving module 110; the first end of the first switching tube is connected to the power supply input, the second end of the first switching tube is connected to the first end of the second resistor, and the second end of the second resistor is connected to the first end of the switch 130 to be detected. Specifically, when the switch 130 to be detected includes the switch SW2, when the switch SW2 is turned on, the driving level output by the driving module 110 can drive the first switching tube to turn off through the resistor R1 (corresponding to the first resistor). When the first switching tube is turned off, the first end of the switch SW2 is maintained at a low level, and the detection level output end outputs a low level. When the switch SW2 is turned off, the driving level output by the driving module 110 drives the first switching tube to turn on through the resistor R1, and the power supply input forms a high level at the first end of the SW2 through the turned-on first switching tube and the resistor R2 (corresponding to the second resistor), and the detection level output end outputs a high level.

[0035] Optionally, the driving module 110 includes a second switching tube, a third resistor, a fourth resistor, and a first reverse isolation unit; the first end of the third resistor and the first end of the fourth resistor are connected to the power supply input, the second end of the third resistor is connected to the first end of the second switching tube and the second end of the first resistor, the second end of the second switching tube is grounded, the control end of the second switching tube is connected to the first end of the first reverse isolation unit and the second end of the fourth resistor, and the second end of the first reverse isolation unit is connected to the first end of the switch 130 to be detected. Among them, the first reverse isolation unit is used to prevent the high level at the first end of the switch 130 to be detected, which can also be understood as the detection level output end, from being reversely input to the driving module 110, causing an incorrect operation of the driving module 110. When the switch SW2 is turned on, the control end level of the second switching tube is pulled down to a low level, the second switching tube is turned off, and the first end of the second switching tube outputs a high level to drive the switch module 120 to turn off. When the switch SW2 is turned off, the control end of the second switching tube is at a high level, the second switching tube is turned on, and the first end of the second switching tube outputs a low level to drive the switch module 120 to turn on.

[0036] Optionally, the second switching transistor includes MOS transistor Q2; the gate of MOS transistor Q2 is the control end of the second switching transistor, the drain of MOS transistor Q2 is the first end of the second switching transistor, and the source of MOS transistor Q2 is the second end of the second switching transistor. Among them, the second switching transistor can be a MOS transistor or other types of switching transistors. When selecting a MOS transistor, it is preferred to select a model with a smaller gate drive current Igss and a lower gate-source turn-on voltage Vgs. Among them, MOS transistor Q2 is an NPN-type MOS transistor.

[0037] Optionally, the first reverse isolation unit includes diode D1; the anode of diode D1 is the first end of the first reverse isolation unit, and the cathode of diode D1 is the second end of the first reverse isolation unit. That is, reverse isolation is achieved through diode D1.

[0038] Optionally, the first switching transistor includes MOS transistor Q1; the gate of MOS transistor Q1 is the control end of the first switching transistor, the source of MOS transistor Q1 is the first end of the first switching transistor, and the drain of MOS transistor Q1 is the second end of the first switching transistor. That is, the first switching transistor can be a MOS transistor or other types of switching transistors. When selecting a MOS transistor, it is preferred to select a model with a smaller gate drive current Igss and a lower gate-source turn-on voltage Vgs. Among them, MOS transistor Q1 is a PNP-type MOS transistor.

[0039] Optionally, as Figure 4 described, when the first end of the to-be-detected switch 130 is grounded through the switch module 120 and the second end of the to-be-detected switch 130 is connected to the power supply input, the switch module 120 includes a third switching transistor, a fifth resistor, and a sixth resistor; the control end of the third switching transistor is connected to the first end of the fifth resistor, the second end of the fifth resistor is connected to the driving module 110; the first end of the third switching transistor is grounded, the second end of the third switching transistor is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the first end of the to-be-detected switch 130. Specifically, when the to-be-detected switch 130 includes switch SW3, when switch SW3 is turned on, the driving level output by the driving module 110 can drive the third switching transistor to turn off through resistor R5 (corresponding to the fifth resistor). When the third switching transistor is turned off, the first end of switch SW3 remains at a high level, and the detection level output terminal outputs a high level. When switch SW3 is turned off, the driving level output by the driving module 110 drives the third switching transistor to turn on through resistor R5, and the turned-on third switching transistor and resistor R6 (corresponding to the sixth resistor) form a low level at the first end of switch SW3, and the detection level output terminal outputs a low level.

[0040] Optionally, the driving module 110 includes a fourth switching tube, a seventh resistor, an eighth resistor, and a second reverse isolation unit; a first end of the seventh resistor and a first end of the eighth resistor are grounded, a second end of the seventh resistor is connected to a first end of the fourth switching tube and a second end of the sixth resistor, a second end of the fourth switching tube is connected to the power supply input, a control end of the fourth switching tube is connected to a first end of the second reverse isolation unit and a second end of the eighth resistor, and a second end of the second reverse isolation unit is connected to a first end of the switch under test 130. Among them, the second reverse isolation unit is used to prevent the high level at the first end of the switch under test 130, which can also be understood as the detection level output end, from being reversely input to the driving module 110, causing an incorrect operation of the driving module 110. When the switch SW3 is turned on, the level at the control end of the fourth switching tube is pulled high, the second switching tube is turned off, and a low level is output at the first end of the second switching tube to drive the switch module 120 to turn off. When the switch SW3 is turned off, the control end of the fourth switching tube is at a low level, the second switching tube is turned on, and a high level is output at the first end of the second switching tube to drive the switch module 120 to turn on.

[0041] Optionally, the fourth switching tube includes a MOS tube Q4; the gate of the MOS tube Q4 is the control end of the fourth switching tube, the drain of the MOS tube Q4 is the first end of the fourth switching tube, and the source of the MOS tube Q4 is the second end of the fourth switching tube; among them, the fourth switching tube can be a MOS tube or other types of switching tubes. When selecting a MOS tube, it is preferred to select a model with a smaller gate drive current Igss and a lower gate-source turn-on voltage Vgs. Among them, the MOS tube Q4 is a PNP type MOS tube.

[0042] Optionally, the second reverse isolation unit includes a diode D2; the anode of the diode D2 is the second end of the second reverse isolation unit, and the cathode of the diode D2 is the first end of the second reverse isolation unit.

[0043] Optionally, the third switching tube includes a MOS tube Q3; the gate of the MOS tube Q3 is the control end of the third switching tube, the source of the MOS tube Q3 is the first end of the third switching tube, and the drain of the MOS tube Q3 is the second end of the third switching tube. That is, the third switching tube can be a MOS tube or other types of switching tubes. When selecting a MOS tube, it is preferred to select a model with a smaller gate drive current Igss and a lower gate-source turn-on voltage Vgs. Among them, the MOS tube Q3 is an NPN type MOS tube.

[0044] Optionally, the switch under test 130 includes a non-self-locking mechanical push-rod type single-pole single-throw switch.

[0045] An OBU device of the present utility model includes: a controller and the low-power anti-tamper detection circuit as described above; wherein, the controller is connected to the detection level output end of the detection circuit. That is, in the OBU device, the controller receives the detection level of the detection level output end, and obtains the state change of the detection switch according to the detection level, so as to control corresponding operations in the OBU device. This process can be executed according to the current anti-tampering processing process.

[0046] As Figure 3 shown, in a specific embodiment, when the detected switch 130 is pressed, at this time, the detection level output end ( Figure 3 the signal network UNFIX_DET in) can maintain a stable logic low level. When the detected switch 130 (corresponding to switch SW2) is pressed, the power consumption loop is only composed of resistor R4 and diode D1. The static current consumption of the anti-tampering detection circuit is 0.108 microamps. When the detected switch 130 bounces off, the power consumption loop is composed of resistor R4, MOS transistor Q2, resistor R3, resistor R1, and MOS transistor Q1, and its static current is 0.341 microamps. Since it is considered that after the OBU is activated and starts normal use after being installed in the vehicle, the detected switch 130 is in the pressed state for most of the time, by reducing the current consumption level of the anti-tampering detection circuit when the detected switch 130 is pressed, the overall power consumption of the whole machine can be greatly reduced, and finally the battery life performance of the OBU device can be significantly improved. In addition, when the OBU device is in the sleep state of the whole system, the overall static current including the parts that need to maintain power supply, such as the main control radio frequency wake-up, anti-tampering detection and other circuits, is at the level of 10 microamps. Among them, the power consumption of the anti-tampering switch is 3.3 microamps (usually, the anti-tampering switch is grounded at one end and connected to the power supply in series with a 1MΩ current limiting circuit at the other end to detect the press or bounce action), and when the anti-tampering switch of this anti-tampering detection circuit is pressed, the power consumption of 3.3 microamps can be reduced to 0.108 microamps, and the reduction rate reaches 96.6%.

[0047] It can be understood that the above embodiments only express the preferred implementation modes of the present utility model, and the description is relatively specific and detailed, but it cannot be understood as a limitation of the patent scope of the present utility model; it should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present utility model, the above technical features can be freely combined, and several deformations and improvements can also be made, and these all belong to the protection scope of the present utility model; therefore, all equivalent transformations and modifications made to the scope of the claims of the present utility model shall fall within the scope covered by the claims of the present utility model.

Claims

1. A low-power anti-disassembly detection circuit, characterized in that Including: The switch to be detected, a switch module, a driving module, and a detection level output terminal; The first end of the switch to be detected is connected to the power supply input through the switch module, and the second end of the switch to be detected is grounded. Or, the first end of the switch to be detected is grounded through the switch module, and the second end of the switch to be detected is connected to the power supply input; The driving module is connected to the switch module and the switch to be detected, and is used to drive the switch module to conduct or turn off according to the state of the switch to be detected; The detection level output terminal is connected to the first end of the switch to be detected and is used to output a detection level.

2. The low-power anti-disassembly detection circuit according to claim 1, wherein When the first end of the switch to be detected is connected to the power supply input through the switch module and the second end of the switch to be detected is grounded, the switch module includes a first switching tube, a first resistor, and a second resistor; The control end of the first switching tube is connected to the first end of the first resistor, and the second end of the first resistor is connected to the driving module; The first end of the first switching tube is connected to the power supply input, the second end of the first switching tube is connected to the first end of the second resistor, and the second end of the second resistor is connected to the first end of the switch to be detected.

3. The low-power anti-tamper detection circuit according to claim 2, characterized in that, The driving module includes a second switching tube, a third resistor, a fourth resistor, and a first reverse isolation unit; The first ends of the third resistor and the fourth resistor are connected to the power supply input, the second end of the third resistor is connected to the first end of the second switching tube and the second end of the first resistor, the second end of the second switching tube is grounded, the control end of the second switching tube is connected to the first end of the first reverse isolation unit and the second end of the fourth resistor, and the second end of the first reverse isolation unit is connected to the first end of the switch to be detected.

4. The low-power anti-tamper detection circuit according to claim 3, wherein The second switching tube includes MOS transistor Q2; the gate of the MOS transistor Q2 is the control end of the second switching tube, the drain of the MOS transistor Q2 is the first end of the second switching tube, and the source of the MOS transistor Q2 is the second end of the second switching tube; and / or The first reverse isolation unit includes diode D1; the anode of the diode D1 is the first end of the first reverse isolation unit, and the cathode of the diode D1 is the second end of the first reverse isolation unit.

5. The low-power anti-disassembly detection circuit according to claim 2, wherein The first switching tube includes MOS transistor Q1; the gate of the MOS transistor Q1 is the control end of the first switching tube, the source of the MOS transistor Q1 is the first end of the first switching tube, and the drain of the MOS transistor Q1 is the second end of the first switching tube.

6. The low-power anti-tamper detection circuit according to claim 1, wherein When the first end of the switch to be detected is grounded through the switch module and the second end of the switch to be detected is connected to the power supply input, the switch module includes a third switching tube, a fifth resistor, and a sixth resistor; The control end of the third switching tube is connected to the first end of the fifth resistor, and the second end of the fifth resistor is connected to the driving module; The first end of the third switching tube is grounded, the second end of the third switching tube is connected to the first end of the sixth resistor, and the second end of the sixth resistor is connected to the first end of the switch to be detected.

7. The low-power anti-disassembly detection circuit according to claim 6, wherein The driving module includes a fourth switching transistor, a seventh resistor, an eighth resistor, and a second reverse isolation unit; The first end of the seventh resistor and the first end of the eighth resistor are grounded. The second end of the seventh resistor is connected to the first end of the fourth switching transistor and the second end of the sixth resistor. The second end of the fourth switching transistor is connected to the power supply input. The control end of the fourth switching transistor is connected to the first end of the second reverse isolation unit and the second end of the eighth resistor. The second end of the second reverse isolation unit is connected to the first end of the switch to be detected.

8. The low-power anti-disassembly detection circuit according to claim 7, wherein The fourth switching transistor includes an MOS transistor Q4; the gate of the MOS transistor Q4 is the control end of the fourth switching transistor, the drain of the MOS transistor Q4 is the first end of the fourth switching transistor, and the source of the MOS transistor Q4 is the second end of the fourth switching transistor; and / or The second reverse isolation unit includes a diode D2; the anode of the diode D2 is the second end of the second reverse isolation unit, and the cathode of the diode D2 is the first end of the second reverse isolation unit.

9. The low-power anti-tampering detection circuit according to claim 6, characterized in that, The third switching transistor includes an MOS transistor Q3; the gate of the MOS transistor Q3 is the control end of the third switching transistor, the source of the MOS transistor Q3 is the first end of the third switching transistor, and the drain of the MOS transistor Q3 is the second end of the third switching transistor.

10. An OBU device, characterized in that, Comprising: A controller and the low-power anti-tamper detection circuit according to any one of claims 1 to 9; Wherein, the controller is connected to the detection level output end of the detection circuit.

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