PCIe network card and management system

The PCIe net card with integrated components addresses the complexity of multiple PCIe and RAID card configurations by enabling simultaneous management and monitoring of storage and network communication, reducing system complexity and maintenance costs.

CN223110037UActive Publication Date: 2025-07-15DAPUSTOR CORP +1
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Patent Information

Application Number
CN202422316048.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-23
Publication Date
2025-07-15
Estimated Expiration
2034-09-23

AI Technical Summary

Technical Problem

Existing servers need to configure multiple PCIe network cards and RAID cards to cause complex content structure, increasing wiring difficulty and maintenance costs.

Method used

It provides a PCIe network card that is connected to the storage device through an interface and communicates with external devices through an optical module to realize monitoring of storage and network communication and reduce system complexity.

Benefits of technology

Monitoring storage and network communication through interfaces reduces the complexity of the system and simplifies the internal structure of the server.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of network cards, and discloses a PC I e network card and a management system.The PCIe network card comprises a golden finger, an SOC chip, an optical module, a first interface and a second interface, the first interface is used for being connected with a first storage device, the second interface is used for being connected with a second storage device, one end of the golden finger is connected with the SOC chip, the other end of the golden finger is connected with a mainboard, and the SOC chip is connected with the optical module; the golden finger is used for receiving a power source transmitted by the mainboard, the optical module is connected with the SOC chip and used for communicating with external equipment, the SOC chip is connected with the first interface and the second interface, and the SOC chip is used for managing first storage equipment through the first interface and managing second storage equipment through the second interface. And meanwhile, the storage equipment is managed through the interface, so that the whole storage and network communication are monitored through the interface, and the complexity of the system is reduced.
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Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of network cards, and particularly to a PCIe network card and a management system. Background Art

[0002] PCIe (peripheral component interconnect express) network cards and RAID cards (Redundant Array of Independent Disks) are key components for a server to achieve data transmission and storage functions.

[0003] To meet the requirements of network communication and storage, a server usually needs to be configured with multiple PCIe network cards and RAID cards. However, with the development of AI, the demand for communication between servers and storage space has increased sharply, and more independent PCIE network cards and RAID cards are required, which makes the internal structure of the server more complex and increases the wiring difficulty and maintenance cost. Summary of the Utility Model

[0004] To solve the above technical problems, the embodiments of the present application provide a PCIe network card and a management system, which solve the problem that the current server needs to be configured with multiple PCIe network cards and RAID cards, resulting in a complex content structure, and can monitor the entire storage and network communication through an interface, reducing the complexity of the system.

[0005] To solve the above technical problems, the embodiments of the present application provide the following technical solutions:

[0006] In a first aspect, the embodiments of the present application provide a PCIe network card, which includes a gold finger, an SOC chip, an optical module, a first interface, and a second interface. Among them, the first interface is used to connect to a first storage device, and the second interface is used to connect to a second storage device;

[0007] One end of the gold finger is connected to the SOC chip, and the other end of the gold finger is connected to the main board. The gold finger is used to receive the power transmitted by the main board;

[0008] The optical module is connected to the SOC chip and is used to communicate with external devices;

[0009] The SOC chip is connected to the first interface and the second interface. The SOC chip is used to manage the first storage device through the first interface and manage the second storage device through the second interface.

[0010] In some embodiments, the PCIe network card further includes a user indication module;

[0011] A user indication module, connected to the SOC chip, is used to display the status of the first storage device accessing the PCIe network card through the first interface, and to display the status of the second storage device accessing the PCIe network card through the second interface.

[0012] In some embodiments, the PCIe network card further includes a power control module, which is connected to the gold finger, the first interface, and the second interface, and is used to receive the power delivered by the gold finger, and supply power to the first storage device through the first interface, and supply power to the second storage device through the second interface.

[0013] In some embodiments, the SOC chip includes a general-purpose input / output controller, which is connected to the power control module and is used to generate a voltage control signal and send the voltage control signal to the power control module to control the voltage output by the power control module.

[0014] In some embodiments, the PCIe network card further includes a temperature sensor and a fan connector;

[0015] The temperature sensor, connected to the SOC chip, is used to detect the temperature of the first storage device connected to the first interface and send the temperature to the SOC chip;

[0016] The fan connector, connected to the fan and controlled by the SOC chip, is used to adjust the wind speed of the fan to cool the first storage device.

[0017] In some embodiments, the first interface includes an M.2 interface, and the second interface includes a Slimsas interface;

[0018] The first storage device includes an M.2 solid-state drive, and the second storage device includes a Slimsas solid-state drive.

[0019] In some embodiments, the user indication module includes a light-emitting diode.

[0020] In a first aspect, an embodiment of the present application provides a management system, which includes: a PCIe network card, a backplane, and a motherboard as described in the first aspect. Among them, the backplane is connected to the PCIe network card and the motherboard, and the motherboard is used to supply power to the PCIe network card through the backplane;

[0021] The PCIe network card is communicatively connected to the motherboard through the backplane, and is used to receive the power transmitted by the motherboard, and perform data interaction with the motherboard;

[0022] The PCIe network card is further used to communicate with external devices through an optical module;

[0023] The PCIe network card is further used to be connected to the first storage device and the second storage device, and manage the first storage device through the first interface, and manage the second storage device through the second interface.

[0024] In some embodiments, the main board includes a processor and a first connector, and the backplane includes a second connector and an AIC interface;

[0025] The processor is connected to the first connector, the first connector is connected to the second connector, the second connector is connected to the AIC interface, the AIC interface is connected to a PCIe network card, and the processor is configured to perform data interaction with the PCIe network card through the backplane.

[0026] In some embodiments, the PCIe network card includes a gold finger and an SOC chip, wherein the gold finger is connected to the AIC interface;

[0027] The SOC chip, which is connected to the gold finger, is configured to communicate with the processor sequentially through the gold finger, the AIC interface, the second connector, and the first connector.

[0028] The beneficial effect of the embodiment of the present application is: different from the prior art, the embodiment of the present application provides a PCIe network card, which includes a gold finger, an SOC chip, an optical module, a first interface, and a second interface. Among them, the first interface is used to connect to a first storage device, the second interface is used to connect to a second storage device, one end of the gold finger is connected to the SOC chip, the other end of the gold finger is connected to the main board, the gold finger is configured to receive the power transmitted by the main board, the optical module is connected to the SOC chip and is configured to communicate with an external device, the SOC chip is connected to the first interface and the second interface, and the SOC chip is configured to manage the first storage device through the first interface and manage the second storage device through the second interface. The present application communicates with the external device through the optical module and manages the storage device through the interface at the same time, so as to realize monitoring of the entire storage and network communication through the interface, reducing the complexity of the system. Description of the Drawings

[0029] One or more embodiments are exemplarily illustrated by corresponding drawings. These exemplary illustrations do not limit the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the drawings in the figures do not constitute a scale limitation.

[0030] Figure 1 is a schematic structural diagram of a management system provided by an embodiment of the present application;

[0031] Figure 2 is a schematic structural diagram of a PCIe network card provided by an embodiment of the present application;

[0032] Figure 3 is a schematic structural diagram of a PCIe network card provided by an embodiment of the present application;

[0033] Figure 4It is a schematic structural diagram of a PCIe network card provided by an embodiment of the present application.

[0034] Explanation of the reference numerals in the accompanying drawings:

[0035] Label Name Label Name 1000 Management system 304 First interface 100 Motherboard 305 Second interface 101 Processor 306 Power control module 102 First connector 307 User indication module 200 Backplane 308 Temperature sensor 201 Second connector 309 Fan connector 202 AIC interface 310 Clock generator 300 PCIe network card 400 External device 301 Gold finger 500 Storage device 302 SOC chip 501 First storage device 321 General purpose input / output controller 502 Second storage device 303 Optical module Specific implementation manners

[0036] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0037] In addition, the technical features involved in the various implementation manners of the present application described below can be combined with each other as long as they do not conflict with each other.

[0038] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in this specification in the description of the embodiments of this application are only for the purpose of describing specific implementation manners and are not intended to limit this application. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0039] Before introducing the embodiments of the present application, a brief introduction to the PCIe network card known to the inventors of the present application is given to facilitate the subsequent understanding of the embodiments of the present application.

[0040] Existing PCIE network cards cannot connect to external devices simultaneously, for example, connect to other servers, memories, etc. simultaneously. To meet the network communication and storage requirements, multiple independent PCIe network cards and RAID cards need to be added to the server to increase the storage capacity and network communication devices of the server, making the internal structure of the server complex.

[0041] To address the above problems, the present application provides a PCIe network card that communicates with external devices through the optical module in the PCIe network card and manages storage devices through the interface in the PCIe network card, realizing the monitoring of the entire storage and network communication through the interface and reducing the complexity of the system.

[0042] Before introducing the present application in detail, a brief introduction to the prior art known to the present application is given to facilitate the subsequent understanding of the embodiments of the present application.

[0043] RAID is a technology that combines multiple physical disks into a large-capacity logical disk, aiming to improve data reliability, performance, and storage capacity. RAID technology achieves these goals through different configuration methods (i.e., RAID levels). For example, RAID levels include RAID0, RAID1, RAID5, and RAID6, etc. Different RAID levels have different impacts on performance. For example, RAID0 can improve read and write speeds but does not provide data redundancy, while RAID5 and RAID6 provide data redundancy but may affect write performance.

[0044] The technical solution of the present application will be specifically described below in conjunction with the accompanying drawings of the specification:

[0045] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a management system provided by an embodiment of the present application;

[0046] As Figure 1 shown, the management system 1000 includes a motherboard 100, a backplane 200, and a PCIe network card 300.

[0047] Among them, the motherboard 100 is connected to the backplane 200, the backplane 200 is connected to the PCIe network card 300, and the motherboard 100 is connected to the PCIe network card 300 through the backplane 200, so that the motherboard 100 continuously powers the PCIe network card 300 and enables data interaction between the motherboard 100 and the PCIe network card 300.

[0048] Specifically, the motherboard 100 includes a processor 101 (Central Processing Unit, CPU) and a first connector 102, and the backplane 200 includes a second connector 201 and an AIC interface 202.

[0049] Among them, the processor 101 is connected to the first connector 102, the first connector 102 is connected to the second connector 201, the second connector 201 is connected to the AIC interface 202, and the AIC interface 202 is connected to the PCIe network card 300. The processor 101 is sequentially connected to the PCIe network card 300 through the first connector 102, the second connector 201, and the AIC interface 202, realizing data interaction between the processor 101 and the PCIe network card 300.

[0050] In the embodiments of the present application, the first connector 102, the second connector 201, and the AIC interface 202 use PCIe as the bus standard, and fast data transmission can be achieved through PCIe. Among them, PCIe uses a bidirectional connection method, and PCIe devices (such as motherboards and PCIe network cards) that communicate through PCIe can send and receive simultaneously. The signal transmission path between PCIe devices is called a link (Links), and a link is composed of one or more transceiver channels (Lanes). PCIe allows multiple link widths, such as widths of X1, X2, X4, X8, X16, X32. X1, X2, X4, X8, X16, X32 respectively represent that a link contains 1, 2, 4, 8, 16, 32 channels. The more channels there are, the faster the data transmission speed is.

[0051] The PCIe network card 300 is connected to the AIC interface 202 in the backplane 200. The PCIe network card 300 is also connected to the external device 400 and the storage device 500. The PCIe network card 300 is used to communicate with the external device 400 for data interaction. The PCIe network card 300 is also used to manage the storage device 500, store data in the storage device 500 or obtain data from the storage device 500. Among them, the external device 400 includes other networkable physical devices such as servers, and the storage device 500 includes but is not limited to devices for storing data such as solid state drives (SSD) and hard disk drives (HHD).

[0052] In the embodiments of the present application, the AIC interface mainly follows the PCIe standard. The bit widths of the AIC interface include X1, X2, X4, X8, X16. The AIC interface is used to support high-speed and low-latency data transmission. Different bit widths support different data transmission rates and bandwidths.

[0053] In the embodiments of the present application, the PCIe network card can be used as an expansion card installed on the motherboard of devices such as hosts, servers, or network switches, and is used to support graphics cards, solid state drives, and other high-speed devices. It can meet the storage requirements of a large amount of data and provide real-time communication requirements, enhancing the scalability of the management system 1000.

[0054] Please refer to Figure 2 , Figure 2 which is a schematic structural diagram of a PCIe network card provided by the embodiments of the present application;

[0055] As shown in Figure 2As shown, the PCIe network card 300 includes a gold finger 301, an SOC chip 302, an optical module 303, a first interface 304, and a second interface 305. Among them, the first interface 304 is used to connect to the first storage device 501, and the second interface 305 is used to connect to the second storage device 502.

[0056] Among them, the gold finger 301 is connected to the backplane 200 and the SOC chip 302. The gold finger 301 serves as a connector between the backplane 200 and the SOC chip 302, and can receive the power transmitted from the backplane to continuously supply power to the SOC chip 302, so that the SOC chip 302 can continuously work. The gold finger 301 is composed of many golden conductive contacts.

[0057] The SOC chip 302 is connected to the gold finger 301, the optical module 303, the first interface 304, and the second interface 305. The SOC chip 302 is used to manage the first storage device 501 through the first interface 304, and manage the second storage device 502 through the second interface 305. The SOC chip 302 is also used to communicate with the motherboard 100 through the gold finger 301 and the backplane 200.

[0058] In the embodiment of the present application, the SOC chip 302 internally includes a SerDes module. The SerDes module includes a SerDes PHY (Serializer / Deserializer Physical Layer) and a SerDes PLL (Phase-Locked Loop). Among them, the SerDes PHY is the serializer / deserializer physical layer, and the SerDes PHY is composed of a serializer and a deserializer. The serializer is responsible for converting the received parallel data into serial data and sending it out through a single high-speed transmission line, and the deserializer restores the received serial data to the original parallel data format. The SerDes PLL is a phase-locked loop, and the SerDes PLL includes key components such as a phase detector, a loop filter, and a voltage-controlled oscillator. The phase detector is responsible for detecting the phase difference between the input reference clock and the output clock and converting it into a voltage signal. The loop filter filters and shapes the voltage signal output by the phase detector to control the output frequency and phase of the VCO. The voltage-controlled oscillator adjusts the frequency and phase of its output clock according to the voltage signal output by the loop filter to achieve precise synchronization with the reference clock. By integrating the SerDes PHY and the SerDes PLL into the SOC chip, the synchronization and stability of data transmission can be ensured, and the data transmission speed can be increased, so that the data transmission speed reaches 32 Gbps.

[0059] In an embodiment of the present application, the SOC chip 302 communicates with the gold finger 301 via PCIe. PCIe includes a series of sideband signals, such as PERSTn, PRSNT, WAKEn, and SMbus. Among them, PERSTn is a global reset signal in the PCIe interface, usually labeled as PERST#, and PERSTn is a signal effective at low level, which is used to reset the PCIe device to its initial state. When the PCIe device starts up or needs to be reset, the SOC chip will send a low-level signal to PERST# to trigger the reset operation of the device. The PRSNT signal is used to detect whether there is a device inserted in the PCIe slot. In the PCIe slot, there are usually two detection signals, PRSNT1# and PRSNT2#, which detect the presence of the device from both sides of the slot respectively. The PRSNT signal is connected to a high level through a pull-up resistor. When a device is inserted, the corresponding PRSNT signal will be pulled low to a low level, thereby indicating the presence of the device. WAKEn is a wake-up signal in the PCIe interface, usually labeled as WAKE#. The WAKEn signal is used to wake up the PCIe device when the system is in a low-power state. When the device needs to send data or perform certain operations, it can request the system to wake up by pulling the WAKE# signal low to a low level.

[0060] The optical module 303 is connected to the SOC chip 302. The optical module 303 is used to communicate with an external device 400. The external device 400 can be a network device supporting optical interfaces, such as a server, a switch, a router, etc. The optical module 303 is jump-connected to the external device 400 through an optical fiber to achieve high-speed and long-distance data transmission. Among them, the optical module 303 includes an SFP connector (Small Form-factor Pluggable) and a QSFP connector (Quad Small Form-factor Pluggable). The SFP connector is a small-sized pluggable optical module interface that supports various transmission rates, including 1Gbps, 2.5Gbps, 4Gbps, 10Gbps, etc., and is suitable for short-distance to medium-distance transmission. The SFP interface usually uses an LC-type optical fiber connector, which is convenient for connecting with an optical fiber jumper. The QSFP connector is a four-channel small-sized pluggable interface that provides higher data transmission rates and larger bandwidths, supports transmission rates of 40Gbps, 100Gbps, and even higher, and the QSFP interface has various optical interface types, such as LC, MPO / MTP, etc., to adapt to different optical fiber types and transmission distances.

[0061] In an embodiment of the present application, the external device 400 also includes an optical module. The optical module 303 mainly communicates with the optical module of the external device 400 to enable the PCIe network card to communicate with other devices through the optical module.

[0062] In the embodiment of the present application, since the optical module 303 cannot directly identify whether an external device is inserted, the operating mode of the optical module 303 is set through an external DIP switch in the optical module 303. The external DIP switch can set a specific DIP combination, and the specific DIP combination can be used to indicate that the optical module 303 is in the state of "expecting an external device to be inserted". In a specific operating mode of the optical module 303, when an external device is connected, the optical module 303 will automatically identify the insertion state of the external device.

[0063] It should be noted that the number of connectors in the optical module 303 can be configured according to actual requirements.

[0064] In the embodiment of the present application, the first interface 304 includes an M.2 interface. Among them, the M.2 interface is a high-speed interface standard for devices such as solid-state drives and wireless network adapters. The size of the M.2 interface is usually relatively small, usually in the 2280 specification (80 mm in length and 22 mm in width), and it can be easily integrated into a PCIe network card. The M.2 interface can support multiple communication protocols, such as SATA, PCIe, USB, etc. The first storage 501 connected to the M.2 interface is usually an M.2 solid-state drive, and the M.2 solid-state drive usually has a small volume and is suitable for application scenarios that require high performance and portability.

[0065] In the embodiment of the present application, the second interface 305 includes a Slimsas interface. Among them, the Slimsas interface is an internal connection solution designed specifically for SAS (Serial Attached SCSI). The SlimSAS interface supports multiple versions of the SAS protocol, including SAS1.0, SAS2.1, SAS 3.0, and SAS 4.0. The SlimSAS interface can provide an extremely high data transfer rate. Especially under the SAS 4.0 standard, its single-channel transfer rate can reach 22.5 Gbps, which greatly meets the needs of large-scale data processing and high-speed storage. The second storage 502 connected to the Slimsas interface is usually a Slimsas solid-state drive, and the Slimsas solid-state drive is suitable for scenarios such as servers and data centers that require high-performance storage and high-speed data transfer.

[0066] In the embodiments of the present application, multiple SlimSAS interfaces can be provided in a PCIe network card to simultaneously access multiple solid-state drives through the SlimSAS interfaces. Alternatively, by connecting an adapter cable of other types (such as SATA) to the SlimSAS interface, one SlimSAS interface can be converted into multiple SATA interfaces to access multiple solid-state drives at the SATA interfaces. Or, by connecting an expansion card to the SlimSAS interface, the expansion card provides additional SlimSAS interfaces to increase the number of SlimSAS interfaces, enabling the PCIe network card to simultaneously access multiple solid-state drives. By connecting devices that support the RAID function through the SlimSAS interface, multiple solid-state drives can be accessed to provide a more flexible and efficient storage solution.

[0067] It should be noted that the number of the first interface 304 and the second interface 305 is configured according to actual requirements. For example, two first interfaces 304 and two second interfaces 305 are respectively configured, and during the actual operation of the PCIe network card, the required memory can be connected to the first interface 304 and the second interface 305 according to actual requirements.

[0068] In the embodiments of the present application, the first interface 304 and the second interface 305 can be compatible with multiple channel numbers, such as the X4 channel number. And in the case of not powering off, that is, when the PCIe network card is kept connected to the motherboard, external devices (i.e., the memories connected to the first interface 304 and the second interface 305) can be plugged and unplugged without interrupting services or shutting down the system, reducing downtime events caused by device replacement, and when the business requirements or system configuration change, devices can be quickly added or removed, improving the flexibility and response speed of the system.

[0069] In the embodiments of the present application, the SOC chip 302 integrates multiple communication interfaces and can support communication with other devices or modules to achieve data exchange and instruction control. For example, the SOC chip 302 communicates with external devices through the optical module 303 to receive or send data in real time, and the SOC chip 302 manages storage devices through the first interface 304 and the second interface 305 to distribute, redundant, and recover data among multiple storage devices.

[0070] Please refer to Figure 3 , Figure 3 which is a schematic structural diagram of a PCIe network card provided by the embodiments of the present application;

[0071] As Figure 3 shown, the PCIe network card further includes a power control module 306, a user indication module 307, a temperature sensor 308, and a fan connector 309.

[0072] Among them, there is a power control module 306. The power control module 306 is connected to the gold finger 301, the first interface 304, and the second interface 305. It is used to receive the power transmitted by the gold finger 301, supply power to the first storage device 501 through the first interface 304, and supply power to the second storage device 502 through the second interface 305. Among them, the power control module 306 includes a Power Management Integrated Circuit (PMIC). The PMIC is an integrated circuit used to manage the power conversion and distribution in electronic devices. The main functions of the PMIC include battery management, voltage regulation, power switch control, and power monitoring, etc. It can effectively improve the utilization rate of power, reduce energy consumption, and protect the battery and other electronic components from damage. By integrating multiple power management functions on the PCIe network card, the PMIC can simplify the design of electronic devices, reduce costs, and improve the reliability and stability of the devices.

[0073] In the embodiment of the present application, the SOC chip 302 further includes a General-Purpose Input / Output (GPIO) controller 321. The General-Purpose Input / Output (GPIO) controller 321 is connected to the power control module 306. The General-Purpose Input / Output (GPIO) controller 321 is used to generate a voltage control signal and send the voltage control signal to the power control module 306 to control the voltage output by the power control module 306. Among them, the GPIO is a kind of pin on the SOC chip 302. The GPIO outputs a high level or a low level according to the control of the program, or senses the external level state as an input pin.

[0074] In the embodiment of the present application, the SOC chip 302 further includes a MOS transistor. The MOS transistor is a Metal-Oxide-Semiconductor Field-Effect Transistor. The MOS transistor is used to perform specific functions, such as level conversion, signal amplification, current control, etc.

[0075] In an embodiment of the present application, the GPIO is connected to the gate of the MOS transistor. By programming the level output by the GPIO, the on-state of the MOS transistor can be controlled. A resistor is connected in parallel with the MOS transistor. When the MOS transistor is turned on, its internal resistance changes (usually decreases), thereby changing the total resistance of the parallel circuit. Since voltage is proportional to resistance, the voltage across the parallel circuit can be adjusted by changing the on-state of the MOS transistor to output a voltage control signal, and the voltage control signal is sent to the power control module 306. After receiving the voltage control signal, the power control module 306 outputs the voltage to the first interface 304 and the second interface 305 according to the output voltage indicated by the voltage control signal. For example, 3.3V is output to supply the first interface 304. Among them, the input / output controller 321 sends the voltage control signal to the power control module 306 through I2C (Inter-Integrated Circuit). I2C is a multi-master, two-wire, low-speed serial bus standard, and I2C is applied to short-distance communication between microcontrollers and various sensors, displays, expansion chips, etc.

[0076] The user indication module 307 is connected to the SOC chip 302 and is used to display the status of the first storage device 501 accessing the PCIe network card 300 through the first interface 304, and to display the status of the second storage device 502 accessing the PCIe network card 300 through the second interface 305. Among them, the user indication module 307 includes a light-emitting diode.

[0077] In an embodiment of the present application, the electricity transmitted by the gold finger 301 is transmitted to the first interface 304 and the second interface 305. When any one of the first interface 304 and the second interface 305 accesses a memory, after the SOC chip 302 recognizes that the first interface 304 or the second interface 305 accesses the memory, the SOC chip 302 controls the display brightness, color or blinking mode of the light-emitting diode to display the working status of the external memory (such as the first memory and the second memory). For example, when the external memory is working properly, the light-emitting diode lights up green, and when the external memory has a fault, the light-emitting diode blinks red.

[0078] The temperature sensor 308 is connected to the SOC chip 302. The temperature sensor 308 is used to detect the temperature of the first storage device 501 connected to the first interface 304 and send the temperature to the SOC chip 302.

[0079] The fan connector 309 is connected and controlled by the SOC chip 302. The fan connector 309 is used to adjust the wind speed of the fan to cool the first storage device 501.

[0080] In the embodiment of the present application, after the PCIe network card is connected to an external memory, the SOC chip 302 continuously reads the temperature from the temperature sensor 308. When the read temperature exceeds a certain value, the fan speed is controlled through the fan connector 309 to cool the external memory, reducing errors or failures caused by excessive temperature. By preventing the external memory from overheating, the system can maintain an efficient data transmission rate.

[0081] Please refer to Figure 4 , Figure 4 which is a schematic structural diagram of a PCIe network card provided by an embodiment of the present application;

[0082] As Figure 4 shown, the PCIe network card 300 further includes a clock generator 310. Among them, the clock generator 310 is connected to the SOC chip 302, the first interface 304, and the second interface 305. The clock generator 310 is used to generate a stable clock signal and send the clock signal to the SOC chip 302, the first interface 304, and the second interface 305 to coordinate the working frequencies among the SOC chip 302, the first interface 304, and the second interface 305. For example, to ensure that data can be synchronized during transmission.

[0083] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit them; under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above. For the sake of brevity, they are not provided in detail; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A PCIe network card, characterized in that, The PCIe network card includes a gold finger, an SOC chip, an optical module, a first interface, and a second interface. Among them, the first interface is used to connect to a first storage device, and the second interface is used to connect to a second storage device; One end of the gold finger is connected to the SOC chip, and the other end of the gold finger is connected to the motherboard. The gold finger is used to receive the power transmitted by the motherboard; The optical module, connected to the SOC chip, is used to communicate with external devices; The SOC chip is connected to the first interface and the second interface. The SOC chip is used to manage the first storage device through the first interface and manage the second storage device through the second interface.

2. The PCIe network card according to claim 1, wherein The PCIe network card further includes a user indication module; The user indication module, connected to the SOC chip, is used to display the status of the first storage device accessing the PCIe network card through the first interface and the status of the second storage device accessing the PCIe network card through the second interface.

3. The PCIe network card according to claim 2, wherein The PCIe network card further includes a power control module. The power control module is connected to the gold finger, the first interface, and the second interface, and is used to receive the power delivered by the gold finger and supply power to the first storage device through the first interface and supply power to the second storage device through the second interface.

4. The PCIe network card according to claim 3, characterized in that The SOC chip includes a general-purpose input / output controller. The general-purpose input / output controller is connected to the power control module and is used to generate a voltage control signal and send the voltage control signal to the power control module to control the voltage output by the power control module.

5. The PCIe network card according to claim 4, wherein The PCIe network card further includes a temperature sensor and a fan connector; The temperature sensor, connected to the SOC chip, is used to detect the temperature of the first storage device connected to the first interface and send the temperature to the SOC chip; The fan connector, connected to a fan and controlled by the SOC chip, is used to adjust the wind speed of the fan to cool the first storage device.

6. The PCIe network card according to claim 5, characterized in that, The first interface includes an M.2 interface, and the second interface includes a Slimsas interface; The first storage device includes an M.2 solid-state drive, and the second storage device includes a Slimsas solid-state drive.

7. The PCIe network card according to claim 2, wherein The user indication module includes a light-emitting diode.

8. A management system, characterized in that, The system includes: the PCIe network card according to any one of claims 1-7, a backplane, and a motherboard. Among them, the backplane is connected to the PCIe network card and the motherboard, and the motherboard is used to supply power to the PCIe network card through the backplane; The PCIe network card is communicatively connected to the motherboard through the backplane, and is used to receive the power transmitted by the motherboard and perform data interaction with the motherboard; The PCIe network card is further used to communicate with external devices through the optical module; The PCIe network card is further used to connect to the first storage device and the second storage device, and manage the first storage device through the first interface and manage the second storage device through the second interface.

9. The system according to claim 8, wherein The main board includes a processor and a first connector, and the backplane includes a second connector and an AIC interface; The processor is connected to the first connector, the first connector is connected to the second connector, the second connector is connected to the AIC interface, the AIC interface is connected to the PCIe network card, and the processor is used to perform data interaction with the PCIe network card through the backplane.

10. The system according to claim 9, characterized in that, The PCIe network card includes a gold finger and an SOC chip, wherein the gold finger is connected to the AIC interface; The SOC chip, which is connected to the gold finger, is used to communicate with the processor sequentially through the gold finger, AIC interface, second connector, and first connector.