PoE power supply circuit and electronic equipment

Abstract

The utility model discloses a PoE power supply circuit and electronic equipment, and belongs to the technical field of power supply. The voltage detection circuit detects the voltage of the input direct current so as to output a detection signal; the control circuit outputs a control signal according to the detection signal; the PSE control circuit electrifies a preset number of PD devices based on the control signal under the excitation of the power supply direct current; wherein the power of the power supply direct current is positively correlated with the voltage of the input direct current, and the preset number is correlated with the control signal; therefore, the number of the power-on PD devices can be adjusted according to the power of the power supply direct current, the power of the power supply can be utilized to the maximum extent, and the over-power use of the power supply can be avoided; the control circuit outputs a control signal according to the detection signal, and based on voltage real-time monitoring and automatic control of the input direct current, manual configuration is not needed, and the possibility of manual configuration errors is reduced.

Description

Technical Field

[0001] This application belongs to the technical field of power supply, and particularly relates to a PoE power supply circuit and an electronic device. Background Art

[0002] The maximum output power of a power sourcing equipment (PSE) for power over ethernet (PoE) is often related to the rated power of its power supply. It is required that after the PSE is connected to a powered device (PD), the total power cannot exceed the rated power of its power supply. This goal is achieved through the total power management of the PSE. The maximum power supply of the PSE is preset in the control circuit of the device, and the output power of each PSE port is obtained in real time, so as to calculate the total PSE output power of the device. When the PSE output exceeds the maximum power, the control circuit will turn off the power supply of the low-priority port according to the port priority, so as to control the total PSE output power not to exceed the maximum power supply.

[0003] The above control strategies are all based on the fact that the power output of the PSE device itself is a fixed value. However, when the PSE device itself supports wide voltage input (for example, supports a voltage input range of 12V to 54V), a voltage conversion circuit needs to be used inside the device to convert the input voltage into the PoE power supply voltage. The rated power of the above power conversion module inside the device is generally not a fixed value, but is related to the input voltage. For example, when the input voltage is 12V, the rated power of the module is 100V, and when the input voltage is 48V, the rated power can be provided up to 200W (the reason for this situation is often related to the conversion efficiency of the power conversion module at different voltage inputs). The rated power of the module is the maximum power for the PSE to supply power externally. Therefore, the maximum total power supply of the device PSE is also related to the input voltage. In this case, the main control device responsible for power management cannot obtain the maximum power supply.

[0004] Existing solutions often describe the relationship between the maximum total power supply of the PSE and the input voltage in the product manual, and the user manually configures the upper limit of the PSE output power according to the actual power supply voltage of the device. The method of configuring the maximum power of the PSE by manually checking the manual in combination with the actual input voltage requires the device maintenance personnel to carefully check the product manual for operation. If the manual configuration is incorrect, it may cause the power supply to be used beyond the rated power, resulting in problems such as a decrease in the power supply life and overheating, and even may cause the power supply output protection, leading to the overall power-off of the PSE. Therefore, there is an urgent need for a PoE power supply circuit that does not require manual configuration and can obtain the maximum total power supply of the PSE in real time, so as to realize the automatic adjustment of the PSE output power. Summary of the Invention

[0005] The purpose of this application is to provide a PoE power supply circuit and an electronic device, aiming to solve the problem that existing PSE devices require manual configuration of the maximum power of the PSE and cannot obtain the maximum total power supply of the PSE in real time to achieve automatic adjustment of the PSE output power.

[0006] An embodiment of this application provides a PoE power supply circuit, including:

[0007] A voltage conversion circuit configured to access input direct current and convert the input direct current into supply direct current;

[0008] A voltage detection circuit connected to the voltage conversion circuit and configured to detect the voltage of the input direct current to output a detection signal;

[0009] A control circuit connected to the voltage detection circuit and configured to output a control signal according to the detection signal;

[0010] A PSE control circuit connected to the voltage conversion circuit and the control circuit and configured to power on a preset number of PD devices based on the control signal under the excitation of the supply direct current;

[0011] Wherein, the power of the supply direct current is positively correlated with the voltage of the input direct current, and the preset number is related to the control signal.

[0012] In one embodiment, the detection signal includes n sub-detection signals; the detection circuit includes a voltage division module, n comparison modules, and n isolation modules; n is an integer greater than 1;

[0013] The voltage division module is connected to the voltage conversion circuit and configured to divide the voltage of the input direct current to output a first voltage;

[0014] Each comparison module is connected to the voltage division module and configured to compare the first voltage with each preset voltage to output each comparison signal;

[0015] Each isolation module is connected to each corresponding comparison module and to the control circuit, and is configured to isolate each comparison signal to output each sub-detection signal.

[0016] In one embodiment, the PoE power supply circuit further includes:

[0017] A first isolation circuit connected between the PSE control circuit and the control circuit and configured to isolate the control signal and send the isolated control signal to the PSE control circuit.

[0018] In one embodiment, the control circuit, the voltage detection circuit, and the PSE control circuit are all connected to the I2C bus;

[0019] The voltage detection circuit sends the detection signal to the control circuit through the I2C bus;

[0020] The control circuit sends the control signal to the PSE control circuit through the I2C bus.

[0021] In one embodiment, the PoE power supply circuit further includes:

[0022] A second isolation circuit, connected between the I2C bus and the control circuit, configured to isolate the detection signal, send the isolated detection signal to the control circuit, isolate the control signal, and send the isolated control signal to the PSE control circuit through the I2C bus.

[0023] In one embodiment, the control circuit includes a first microprocessor;

[0024] The I2C data terminal and the I2C clock terminal of the first microprocessor jointly serve as the input terminal for the isolated detection signal of the control circuit and the output terminal for the control signal of the control circuit, and are connected to the second isolation circuit to input the isolated detection signal and output the control signal.

[0025] In one embodiment, the PSE control circuit is specifically configured to output a preset number of PoE voltages according to the control signal under the excitation of the supplied direct current;

[0026] The PoE power supply circuit further includes a network chip and m PoE port circuits; m is an integer greater than 1;

[0027] The network chip is configured to output m groups of network signals;

[0028] Each of the PoE port circuits is connected to the network chip and the PSE control circuit, and is configured to modulate a group of network signals and a PoE voltage to output a group of PoE signals to the PD device.

[0029] In one embodiment, the voltage conversion circuit includes a low-end controller and a field effect transistor, a diode, an inductor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, and a third capacitor;

[0030] The power input terminal of the low-end controller, the first terminal of the first resistor, and the first terminal of the inductor together serve as the input DC power input terminal of the voltage conversion circuit to connect to the input DC power; the input undervoltage lockout terminal of the low-end controller is connected to the second terminal of the first resistor and the first terminal of the second resistor, the output of the error amplifier of the low-end controller is connected to the input terminal of the pulse width modulation comparator, the first terminal of the first capacitor, and the first terminal of the second capacitor, the second terminal of the first capacitor is connected to the first terminal of the third resistor, the feedback terminal of the low-end controller is connected to the second terminal of the second capacitor, the second terminal of the third resistor, the first terminal of the sixth resistor, and the first terminal of the seventh resistor, the current detection input terminal of the low-end controller is connected to the first terminal of the third capacitor and the first terminal of the fourth resistor, the second terminal of the fourth resistor is connected to the source electrode of the field effect transistor, the output terminal of the low-end controller is connected to the gate electrode of the field effect transistor, the second terminal of the inductor is connected to the drain electrode of the field effect transistor and the positive electrode of the diode, the negative electrode of the diode and the second terminal of the sixth resistor together serve as the output DC power supply terminal of the voltage conversion circuit, and are connected to the PSE control circuit and a preset number of the PD devices to output the supply DC power; the ground terminal of the low-end controller is connected to the second terminal of the second resistor, the second terminal of the third capacitor, the second terminal of the fifth resistor, and the second terminal of the seventh resistor to the power ground.

[0031] In one embodiment, the PSE control circuit includes a PSE controller;

[0032] The digital power supply of the PSE controller is connected to the first power supply. The I2C clock terminal of the PSE controller and the I2C data input terminal of the PSE controller together serve as the control signal input terminal of the PSE control circuit and are connected to the control circuit to input the control signal. The main power input terminal of the PSE controller serves as the DC power supply input terminal of the PSE control circuit and is connected to the voltage conversion circuit to input the DC power supply. The 0th power interface return terminal of the PSE controller serves as the first PoE voltage output terminal of the PSE control circuit and is connected to the first PD device to output the first PoE voltage. The 1st power interface return terminal of the PSE controller serves as the second PoE voltage output terminal of the PSE control circuit and is connected to the second PD device to output the second PoE voltage. The 2nd power interface return terminal of the PSE controller serves as the third PoE voltage output terminal of the PSE control circuit and is connected to the third PD device to output the third PoE voltage. The 3rd power interface return terminal of the PSE controller serves as the fourth PoE voltage output terminal of the PSE control circuit and is connected to the fourth PD device to output the fourth PoE voltage.

[0033] An embodiment of the present application also provides an electronic device, and the electronic device includes the above-mentioned PoE power supply circuit.

[0034] The beneficial effects of the embodiment of the present application compared with the prior art are as follows: Therefore, the number of powered-on PD devices can be adjusted according to the power of the DC power supply, so that the power of the power supply can be maximally utilized and the over-power use of the power supply can be avoided. The control circuit outputs a control signal according to the detection signal, and performs real-time monitoring and automatic control based on the voltage of the input direct current, so that manual configuration is not required, and the possibility of manual configuration errors is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solution in the embodiment of the present application, the drawings required for the description of the embodiment will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0036] Figure 1 FIG. 1 is a schematic structural diagram of a PoE power supply circuit provided by an embodiment of the present application;

[0037] Figure 2 FIG. 2 is another schematic structural diagram of a PoE power supply circuit provided by an embodiment of the present application;

[0038] Figure 3Another structural schematic diagram of the PoE power supply circuit provided by an embodiment of the present application;

[0039] Figure 4 Another structural schematic diagram of the PoE power supply circuit provided by an embodiment of the present application;

[0040] Figure 5 Another structural schematic diagram of the PoE power supply circuit provided by an embodiment of the present application;

[0041] Figure 6 Another structural schematic diagram of the PoE power supply circuit provided by an embodiment of the present application;

[0042] Figure 7 A partial example circuit schematic diagram of the PoE power supply circuit provided by an embodiment of the present application;

[0043] Figure 8 Another partial example circuit schematic diagram of the PoE power supply circuit provided by an embodiment of the present application. Detailed implementation manners

[0044] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0045] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0046] It should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0047] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality of" means two or more unless otherwise specifically defined.

[0048] Figure 1 The structural schematic diagram of the PoE power supply circuit provided by an embodiment of the present application is shown. For the sake of convenience of description, only the parts related to this embodiment are shown and are described in detail as follows:

[0049] The above PoE power supply circuit includes a voltage conversion circuit 100, a voltage detection circuit 200, a control circuit 300, and a PSE control circuit 400.

[0050] The voltage conversion circuit 100 is configured to access the input direct current and convert the input direct current into a power supply direct current.

[0051] The voltage detection circuit 200 is connected to the voltage conversion circuit 100 and is configured to detect the voltage of the input direct current to output a detection signal.

[0052] The control circuit 300 is connected to the voltage detection circuit 200 and is configured to output a control signal according to the detection signal.

[0053] The PSE control circuit 400 is connected to the voltage conversion circuit 100 and the control circuit 300 and is configured to power on a preset number of PD devices 99 based on the control signal under the excitation of the power supply direct current.

[0054] Among them, the power of the power supply direct current is positively correlated with the voltage of the input direct current, and the preset number is related to the control signal.

[0055] In a specific implementation, the voltage conversion circuit 100 may be a boost circuit.

[0056] Specifically, the control circuit 300 may obtain the real-time voltage of the input direct current according to the detection signal, and configure the output power upper limit of the PSE control circuit 400 in the current situation according to the relationship between the maximum output power of the PSE control circuit 400 and the voltage of the input direct current that is preset, and then output a control signal carrying the output power upper limit information. It can be understood that the relationship between the maximum output power of the PSE control circuit 400 and the voltage of the input direct current is related to the conversion efficiency of the module, the heat dissipation measures, and the specifications of the peripheral components.

[0057] The PoE power supply circuit can adjust the number of powered-on PD devices according to the power of the power supply direct current, so that it can not only maximize the utilization of the power supply power, but also avoid over-power use of the power supply; the control circuit 300 outputs a control signal according to the detection signal, and based on the real-time monitoring and automatic control of the voltage of the input direct current, there is no need for manual configuration, reducing the possibility of manual configuration errors.

[0058] As an example rather than a limitation, such as Figure 2As shown, the detection signal includes n sub-detection signals; the detection circuit includes a voltage dividing module 210, n comparison modules 220, and n isolation modules 230; n is an integer greater than 1.

[0059] The voltage dividing module 210 is connected to the voltage conversion circuit 100 and is configured to divide the voltage of the input direct current to output a first voltage.

[0060] Each comparison module 220 is connected to the voltage dividing module 210 and is configured to compare the first voltage with each preset voltage to output each comparison signal.

[0061] Each isolation module 230 is connected to each comparison module 220 in one-to-one correspondence and is connected to the control circuit 300, and is configured to isolate each comparison signal to output each sub-detection signal.

[0062] It can be understood that the preset voltages of each comparison module 220 can be different from each other.

[0063] In a specific implementation, it can be set that when the first voltage is greater than the preset voltage, a sub-detection signal with a low level is output, and when the first voltage is less than the preset voltage, a sub-detection signal with a high level is output, so that the control circuit 300 can determine the relationship between the first voltage and the preset voltage according to the level of the sub-detection signal. Thus, when the preset voltages of the n comparison modules 220 are different from each other, the control circuit 300 can divide the voltage of the input direct current into n + 1 levels according to the levels of the different sub-detection signals received.

[0064] This circuit has low cost and is flexible to use.

[0065] As an example rather than a limitation, as Figure 3 shown, the PoE power supply circuit further includes a first isolation circuit 500, which is connected between the PSE control circuit 400 and the control circuit 300, and is configured to isolate the control signal and send the isolated control signal to the PSE control circuit 400.

[0066] The first isolation circuit 500 ensures the isolation requirements between the PSE control circuit 400 and the control circuit 300, and improves the stability of the PoE power supply circuit.

[0067] As an example rather than a limitation, as Figure 4 shown, the control circuit 300, the voltage detection circuit 200, and the PSE control circuit 400 are all connected to the I2C bus.

[0068] The voltage detection circuit 200 sends the detection signal to the control circuit 300 through the I2C bus.

[0069] The control circuit 300 sends the control signal to the PSE control circuit 400 through the I2C bus.

[0070] The I2C bus only requires a clock line and a data line, with simple hardware design, easy to implement and debug.

[0071] By way of example and not limitation, as Figure 5 shown, the PoE power supply circuit further includes a second isolation circuit 600, connected between the I2C bus and the control circuit 300, configured to isolate the detection signal, send the isolated detection signal to the control circuit 300, and isolate the control signal, and send the isolated control signal to the PSE control circuit 400 through the I2C bus.

[0072] The isolation of the voltage detection circuit 200, the PSE control circuit 400 and the control circuit 300 is realized through the second isolation circuit 600, improving the quality of the detection signal and the control signal.

[0073] By way of example and not limitation, as Figure 6 shown, the PSE control circuit 400 is specifically configured to output a preset number of PoE voltages according to the control signal under the excitation of the supplied direct current power.

[0074] The PoE power supply circuit further includes a network chip 700 and m PoE port circuits 800; m is an integer greater than 1.

[0075] The network chip 700 is configured to output m groups of network signals.

[0076] Each PoE port circuit 800 is connected to the network chip 700 and the PSE control circuit 400, and is configured to modulate a group of network signals and a PoE voltage to output a group of PoE signals to the PD device 99.

[0077] The PoE port circuit 800 simplifies the wiring and improves the convenience of use.

[0078] Figure 7 shows a partial example circuit structure of the PoE power supply circuit provided by the embodiment of the present application, Figure 8 shows another partial example circuit structure of the PoE power supply circuit provided by the embodiment of the present application. For the sake of convenience of description, only the parts related to the embodiment of the present application are shown and are described in detail as follows:

[0079] As Figure 7 and Figure 8 shown, the voltage conversion circuit 100 includes a low-end controller U1 and a field effect transistor Q1, a diode D1, an inductor L1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first capacitor C1, a second capacitor C2 and a third capacitor C3.

[0080] The power input terminal VIN of the low-end controller U1, the first end of the first resistor R1, and the first end of the inductor L1 jointly serve as the input DC power input terminal of the voltage conversion circuit 100 to access the input DC power; the input undervoltage lockout terminal ULVO of the low-end controller U1 is connected to the second end of the first resistor R1 and the first end of the second resistor R2, the output of the error amplifier of the low-end controller U1 is connected to the input terminal COMP of the pulse width modulation comparator, the first end of the first capacitor C1, and the first end of the second capacitor C2, the second end of the first capacitor C1 is connected to the first end of the third resistor R3, the feedback terminal FB of the low-end controller U1 is connected to the second end of the second capacitor C2, the second end of the third resistor R3, the first end of the sixth resistor R6, and the first end of the seventh resistor R7, the current detection input terminal CS of the low-end controller U1 is connected to the first end of the third capacitor C3 and the first end of the fourth resistor R4, the second end of the fourth resistor R4 is connected to the source of the field effect transistor Q1, the output terminal OUT of the low-end controller U1 is connected to the gate of the field effect transistor Q1, the second end of the inductor L1 is connected to the drain of the field effect transistor Q1 and the positive electrode of the diode D1, the negative electrode of the diode D1 and the second end of the sixth resistor R6 jointly serve as the output terminal of the supply DC power of the voltage conversion circuit 100, and are connected to the PSE control circuit 400 and a preset number of PD devices 99 to output the supply DC power; the ground terminal GND of the low-end controller U1 is connected to the second end of the second resistor R2, the second end of the third capacitor C3, the second end of the fifth resistor R5, and the second end of the seventh resistor R7 to the power ground.

[0081] The diode D1 prevents the current from flowing back to the low-end controller U1, improving the safety of the circuit.

[0082] As Figure 7 shown, the voltage dividing module 210 includes an eighth resistor R8 and a ninth resistor R9.

[0083] The first end of the eighth resistor R8 serves as the input DC power input terminal of the voltage dividing module 210 and is connected to the voltage conversion circuit 100 to input the input DC power; the second end of the eighth resistor R8 and the first end of the ninth resistor R9 jointly serve as the first voltage output terminal of the voltage dividing module 210 and are connected to each comparison module 220 to output the first voltage; the second end of the ninth resistor R9 is connected to the power ground.

[0084] As Figure 7 shown, the first comparison module 220 includes a first comparator M1, a tenth resistor R10, and an eleventh resistor R11.

[0085] The first end of the tenth resistor R10 is connected to the first power supply. The second end of the tenth resistor R10, the first end of the eleventh resistor R11, and the negative input terminal of the first comparator M1 are connected. The positive input terminal of the first comparator M1 serves as the first voltage input terminal of the first comparison module 220 and is connected to the voltage division module 210 to input the first voltage. The output terminal of the first comparator M1 serves as the comparison signal output terminal of the first comparison module 220 and is connected to the first isolation module 230 to output the first comparison signal. The second end of the eleventh resistor R11 is connected to the power supply ground.

[0086] In a specific implementation, the first preset voltage can be adjusted by adjusting the resistance values of the tenth resistor R10 and the eleventh resistor R11.

[0087] As Figure 7 shown, the second comparison module 220 includes a second comparator M2, a twelfth resistor R12, and a thirteenth resistor R13.

[0088] The first end of the twelfth resistor R12 is connected to the first power supply. The second end of the twelfth resistor R12, the first end of the thirteenth resistor R13, and the negative input terminal of the second comparator M2 are connected. The positive input terminal of the second comparator M2 serves as the first voltage input terminal of the second comparison module 220 and is connected to the voltage division module 210 to input the first voltage. The output terminal of the second comparator M2 serves as the comparison signal output terminal of the second comparison module 220 and is connected to the second isolation module 230 to output the second comparison signal. The second end of the thirteenth resistor R13 is connected to the power supply ground.

[0089] In a specific implementation, the second preset voltage can be adjusted by adjusting the resistance values of the twelfth resistor R12 and the thirteenth resistor R13.

[0090] As Figure 7 shown, the first isolation module 230 includes a first optocoupler N1, a fourteenth resistor R14, and a fifteenth resistor R15.

[0091] The positive electrode of the first optocoupler N1 serves as the comparison signal input terminal of the first isolation module 230 and is connected to the first comparison module 220 to input the first comparison signal. The negative electrode of the first optocoupler N1 is connected to the first end of the fifteenth resistor R15. The collector of the first optocoupler N1 and the first end of the fourteenth resistor R14 together serve as the sub-detection signal output terminal of the first isolation module 230 and are connected to the control circuit 300 to output the first sub-detection signal. The second end of the fourteenth resistor R14 is connected to the second power supply. The second end of the fifteenth resistor R15 is connected to the power supply ground, and the emitter of the first optocoupler N1 is connected to the analog ground.

[0092] As Figure 7As shown, the second isolation module 230 includes a second optocoupler N2, a sixteenth resistor R16, and a seventeenth resistor R17.

[0093] The positive electrode of the second optocoupler N2 serves as the comparison signal input terminal of the second isolation module 230 and is connected to the second comparison module 220 to input the second comparison signal; the negative electrode of the second optocoupler N2 is connected to the first end of the seventeenth resistor R17, and the collector of the second optocoupler N2 and the first end of the sixteenth resistor R16 jointly serve as the sub-detection signal output terminal of the second isolation module 230 and are connected to the control circuit 300 to output the second sub-detection signal; the second end of the sixteenth resistor R16 is connected to the second power supply, the second end of the seventeenth resistor R17 is connected to the power ground, and the emitter of the second optocoupler N2 is connected to the analog ground.

[0094] As Figure 8 shown, the voltage detection circuit 200 includes an analog-to-digital converter U5, an eighteenth resistor R18, and a nineteenth resistor R19.

[0095] The power supply terminal VDD of the analog-to-digital converter U5 is connected to the first power supply. The first end of the eighteenth resistor R18 serves as the input DC power input terminal of the voltage detection circuit 200 and is connected to the voltage conversion circuit 100 to input the input DC power; the second end of the eighteenth resistor R18, the first end of the nineteenth resistor R19, and the analog input terminal INO of the analog-to-digital converter U5 are connected. The I2C data terminal SDA and the I2C clock terminal SCL of the analog-to-digital converter U5 jointly serve as the detection signal output terminal of the voltage detection circuit 200 and are connected to the PSE control circuit 400 and the second isolation circuit 600 to output the detection signal.

[0096] The second end of the nineteenth resistor R19 and the ground terminal GND of the analog-to-digital converter U5 are connected to the power ground.

[0097] As Figure 7 shown, the control circuit 300 includes a first microprocessor U2.

[0098] The first general-purpose input / output terminal P1.0 of the first microprocessor U2 serves as the first sub-detection signal input terminal of the control circuit 300 and is connected to the first isolation module 230 to input the first sub-detection signal; the second general-purpose input / output terminal P1.1 of the first microprocessor U2 serves as the second sub-detection signal input terminal of the control circuit 300 and is connected to the second isolation module 230 to input the second sub-detection signal; the I2C data terminal SDA and the I2C clock terminal SCL of the first microprocessor U2 jointly serve as the control signal output terminal of the control circuit 300 and are connected to the first isolation circuit 500 to output the control signal.

[0099] As Figure 8 shown, the control circuit 300 includes a second microprocessor U7.

[0100] The I2C data terminal SDA of the second microprocessor U7 and the I2C clock terminal SCL of the second microprocessor U7 together serve as the isolated detection signal input terminal of the control circuit 300 and the control signal output terminal of the control circuit 300, and are connected to the second isolation circuit 600 to input the isolated detection signal and output the control signal.

[0101] This circuit is simple and reliable.

[0102] As Figure 7 and Figure 8 shown, the PSE control circuit 400 includes a PSE controller U3.

[0103] The digital power supply DV3P3 of the PSE controller U3 is connected to the first power supply. The I2C clock terminal SCL and the I2C data input terminal SDAI of the PSE controller U3 together serve as the control signal input terminal of the PSE control circuit 400 and are connected to the control circuit 300 to input the control signal. The main power input terminal V54 of the PSE controller U3 serves as the DC power supply input terminal of the PSE control circuit 400 and is connected to the voltage conversion circuit 100 to input the supply DC power. The 0th power interface return terminal PortN0 of the PSE controller U3 serves as the first PoE voltage output terminal of the PSE control circuit 400 and is connected to the first PD device 99 to output the first PoE voltage. The 1st power interface return terminal PortN1 of the PSE controller U3 serves as the second PoE voltage output terminal of the PSE control circuit 400 and is connected to the second PD device 99 to output the second PoE voltage. The 2nd power interface return terminal PortN2 of the PSE controller U3 serves as the third PoE voltage output terminal of the PSE control circuit 400 and is connected to the third PD device 99 to output the third PoE voltage. The 3rd power interface return terminal PortN3 of the PSE controller U3 serves as the fourth PoE voltage output terminal of the PSE control circuit 400 and is connected to the fourth PD device 99 to output the fourth PoE voltage.

[0104] The PSE controller U3 has a high integration level and is convenient to use.

[0105] As Figure 7 shown, the first isolation circuit 500 includes a first isolation chip U4.

[0106] The first power supply terminal VCC1 of the first isolation chip U4 is connected to the second power supply; the first I2C data terminal SDA1 of the first isolation chip U4 and the first I2C clock terminal SCL1 of the first isolation chip U4 jointly serve as the control signal input terminal of the first isolation circuit 500 and are connected to the control circuit 300 to input control signals; the first ground terminal GND1 of the first isolation chip U4 is connected to the analog ground; the second power supply terminal VCC2 of the first isolation chip U4 is connected to the first power supply; the second I2C data terminal SDA2 of the first isolation chip U4 and the second I2C clock terminal SCL2 of the first isolation chip U4 jointly serve as the isolated control signal output terminal of the first isolation circuit 500 and are connected to the PSE control circuit 400 to output isolated control signals; the second ground terminal GND2 of the first isolation chip U4 is connected to the power ground.

[0107] As Figure 8 shown, the second isolation circuit 600 includes a second isolation chip U6.

[0108] The first power supply terminal VCC1 of the second isolation chip U6 is connected to the second power supply; the first I2C data terminal SDA1 of the second isolation chip U6 and the first I2C clock terminal SCL1 of the second isolation chip U6 jointly serve as the control signal input terminal of the second isolation circuit 600 and the isolated detection signal output terminal of the second isolation circuit 600 and are connected to the control circuit 300 to input control signals and output isolated detection signals; the first ground terminal GND1 of the second isolation chip U6 is connected to the analog ground; the second power supply terminal VCC2 of the second isolation chip U6 is connected to the first power supply; the second I2C data terminal SDA2 of the second isolation chip U6 and the second I2C clock terminal SCL2 of the second isolation chip U6 jointly serve as the detection signal input terminal of the second isolation circuit 600 and the isolated control signal output terminal of the second isolation circuit 600 and are connected to the PSE control circuit 400 to input detection signals and output isolated control signals; the second ground terminal GND2 of the second isolation chip U6 is connected to the power ground.

[0109] As Figure 7 and Figure 8 shown, the m-th PoE port includes an m-th transformer Tm.

[0110] The first primary center tap of the m-th transformer Tm is connected to the voltage conversion circuit 100 and the PSE control circuit 400; the second primary center tap of the m-th transformer Tm serves as the PoE voltage input terminal of the m-th PoE port, and is connected to the voltage conversion circuit 100 and the PSE control circuit 400 to input the PoE voltage; the first end of the first secondary side of the m-th transformer Tm, the second end of the first secondary side of the m-th transformer Tm, the center tap of the first secondary side of the m-th transformer Tm, the first end of the second secondary side of the m-th transformer Tm, the second end of the second secondary side of the m-th transformer Tm, and the center tap of the second secondary side of the m-th transformer Tm together serve as the network signal input terminals of the m-th PoE port circuit 800 and are connected to the network chip 700 to input the m-th group of network signals; the first end of the first primary side of the m-th transformer Tm, the second end of the first primary side of the m-th transformer Tm, the first end of the second primary side of the m-th transformer Tm, and the second end of the second primary side of the m-th transformer Tm together serve as the PoE signal output terminals of the m-th PoE port circuit 800 and are connected to the m-th PD device 99 to output the m-th group of PoE signals.

[0111] Wherein, m can be 1, 2, 3 or 4.

[0112] The following further illustrates in combination with the working principle Figures 7 to 8 as shown below:

[0113] As Figure 7 and Figure 8 shown, the power input terminal VIN of the low-end controller U1, the first end of the first resistor R1, and the first end of the inductor L1 are commonly connected to the input direct current. The low-end controller U1 converts the input direct current into a power supply direct current, and outputs the power supply direct current to the main power input terminal V54 of the PSE controller U3 and the first primary center taps of each transformer through the cathode of the diode D1 and the second end of the sixth resistor R6.

[0114] As Figure 7As shown, the first end of the eighth resistor R8 is connected to the input direct current. The eighth resistor R8 and the ninth resistor R9 divide the input direct current, and output the first voltage from the second end of the eighth resistor R8 and the first end of the ninth resistor R9 to the positive input terminal of the first comparator M1 and the positive input terminal of the second comparator M2. The negative input terminal of the first comparator M1 is connected to the first preset voltage. The first comparator M1 compares the first voltage with the first preset voltage. If the first voltage is greater than the first preset voltage, the first comparator M1 outputs the first comparison signal with a high level. The positive pole of the first optocoupler N1 is connected to the first comparison signal with a high level. The first optocoupler N1 conducts, isolates the first comparison signal, and outputs the first sub-detection signal with a low level from the collector of the first optocoupler N1 and the first end of the fourteenth resistor R14 to the first general-purpose input / output terminal P1.0 of the first microprocessor U2. If the first voltage is less than the first preset voltage, the first comparator M1 outputs the first comparison signal with a low level. The positive pole of the first optocoupler N1 is connected to the first comparison signal with a low level. The first optocoupler N1 is cut off, and outputs the first sub-detection signal with a high level from the collector of the first optocoupler N1 and the first end of the fourteenth resistor R14 to the first general-purpose input / output terminal P1.0 of the first microprocessor U2. The negative input terminal of the second comparator M2 is connected to the second preset voltage. The second comparator M2 compares the second voltage with the second preset voltage. If the second voltage is greater than the second preset voltage, the second comparator M2 outputs the second comparison signal with a high level. The positive pole of the second optocoupler N2 is connected to the second comparison signal with a high level. The second optocoupler N2 conducts, isolates the second comparison signal, and outputs the second sub-detection signal with a low level from the collector of the second optocoupler N2 and the first end of the fourteenth resistor R14 to the first general-purpose input / output terminal P1.0 of the first microprocessor U2. If the second voltage is less than the second preset voltage, the second comparator M2 outputs the second comparison signal with a low level. The positive pole of the second optocoupler N2 is connected to the second comparison signal with a low level. The second optocoupler N2 is cut off, and outputs the second sub-detection signal with a high level from the collector of the second optocoupler N2 and the first end of the sixteenth resistor R16 to the second general-purpose input / output terminal P1 of the first microprocessor U2.1. The first microprocessor U2 determines the current input DC voltage level based on two sub-detection signals, configures the output power upper limit of the PSE in the current situation according to the relationship between the current input DC voltage level and the preset maximum output power of the PSE and the input DC voltage, and outputs control signals from the I2C data terminal SDA of the first microprocessor U2 and the I2C clock terminal SCL of the first microprocessor U2 to the first I2C data terminal SDA1 and the first I2C clock terminal SCL1 of the first isolation chip U4. The first isolation chip U4 isolates the control signals and sends the isolated control signals from the second I2C data terminal SDA2 and the second I2C clock terminal SCL2 of the first isolation chip U4 to the I2C clock terminal SCL and the I2C data input terminal SDAI of the PSE controller U3.

[0115] As Figure 8 shown, the first end of the eighteenth resistor R18 is connected to the input DC power. The analog-to-digital converter U5 performs analog-to-digital conversion on the input DC power and outputs detection signals from the I2C data terminal SDA of the analog-to-digital converter U5 and the I2C clock terminal SCL of the analog-to-digital converter U5 to the second I2C data terminal SDA2 and the second I2C clock terminal SCL2 of the second isolation chip U6. The second isolation chip U6 isolates the detection signals and outputs the isolated detection signals from the first I2C data terminal SDA1 and the first I2C clock terminal SCL1 of the second isolation chip U6 to the I2C data terminal SDA and the I2C clock terminal SCL of the second microprocessor U7. The second microprocessor U7 configures the output power upper limit of the PSE in the current situation according to the detection signals and the preset relationship between the maximum output power of the PSE and the input DC voltage, obtains control signals based on the output power upper limit, and outputs control signals from the I2C data terminal SDA of the second microprocessor U7 and the I2C clock terminal SCL of the second microprocessor U7 to the first I2C data terminal SDA1 and the first I2C clock terminal SCL1 of the second isolation chip U6. The second isolation chip U6 isolates the control signals and outputs the isolated control signals from the second I2C data terminal SDA2 and the second I2C clock terminal SCL2 of the second isolation chip U6 to the I2C clock terminal SCL and the I2C data input terminal SDAI of the PSE controller U3.

[0116] As Figure 7 and Figure 8As shown, under the excitation of the supplied direct current, the PSE controller U3 outputs the first PoE voltage from the return end PortN0 of the 0th power interface of the PSE controller U3 to the second primary center tap of the first transformer T1, outputs the second PoE voltage from the return end PortN1 of the 1st power interface of the PSE controller U3 to the second primary center tap of the second transformer T2, outputs the third PoE voltage from the return end PortN2 of the 2nd power interface of the PSE controller U3 to the second primary center tap of the third transformer T3, and outputs the fourth PoE voltage from the return end PortN3 of the 3rd power interface of the PSE controller U3 to the second primary center tap of the fourth transformer T4. The first end of the first secondary side of the first transformer T1, the second end of the first secondary side of the first transformer T1, the center tap of the first secondary side of the first transformer T1, the first end of the second secondary side of the first transformer T1, the second end of the second secondary side of the first transformer T1, and the center tap of the second secondary side of the first transformer T1 input the first group of network signals. The first transformer T1 modulates the first group of network signals and the first PoE voltage to output the first group of PoE signals to the first PD device 99. The working principles of the remaining three transformers are the same as that of the first transformer T1, which will not be elaborated here.

[0117] The embodiment of the present application also provides an electronic device, and the electronic device includes the above-mentioned PoE power supply circuit.

[0118] It should be understood that the magnitudes of the sequence numbers of the steps in the above embodiments do not mean the order of execution. The order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

[0119] The above-mentioned embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A PoE power supply circuit, characterized in that Comprising: A voltage conversion circuit configured to access an input direct current and convert the input direct current into a power supply direct current; A voltage detection circuit connected to the voltage conversion circuit and configured to detect the voltage of the input direct current to output a detection signal; A control circuit connected to the voltage detection circuit and configured to output a control signal according to the detection signal; A PSE control circuit connected to the voltage conversion circuit and the control circuit and configured to power on a preset number of PD devices based on the control signal under the excitation of the power supply direct current; Wherein, the power of the power supply direct current is positively correlated with the voltage of the input direct current, and the preset number is related to the control signal.

2. The PoE power supply circuit according to claim 1, wherein The detection signal includes n sub-detection signals; the detection circuit includes a voltage division module, n comparison modules and n isolation modules; n is an integer greater than 1; The voltage division module, connected to the voltage conversion circuit, is configured to divide the voltage of the input direct current to output a first voltage; Each comparison module, connected to the voltage division module, is configured to compare the first voltage with each preset voltage to output each comparison signal; Each isolation module, connected to each comparison module in one-to-one correspondence and connected to the control circuit, is configured to isolate each comparison signal to output each sub-detection signal.

3. The PoE power supply circuit according to claim 2, characterized in that, Further comprising: A first isolation circuit connected between the PSE control circuit and the control circuit and configured to isolate the control signal and send the isolated control signal to the PSE control circuit.

4. The PoE power supply circuit according to claim 1, characterized in that, The control circuit, the voltage detection circuit and the PSE control circuit are commonly connected to an I2C bus; The voltage detection circuit sends the detection signal to the control circuit through the I2C bus; The control circuit sends the control signal to the PSE control circuit through the I2C bus.

5. The PoE power supply circuit according to claim 4, wherein Further comprising: A second isolation circuit connected between the I2C bus and the control circuit and configured to isolate the detection signal, send the isolated detection signal to the control circuit, and isolate the control signal and send the isolated control signal to the PSE control circuit through the I2C bus.

6. The PoE power supply circuit according to claim 5, characterized in that The control circuit includes a first microprocessor; The I2C data terminal and the I2C clock terminal of the first microprocessor jointly serve as the input terminal of the isolated detection signal of the control circuit and the output terminal of the control signal of the control circuit, and are connected to the second isolation circuit to input the isolated detection signal and output the control signal.

7. The PoE power supply circuit according to claim 1, wherein The PSE control circuit is specifically configured to output a preset number of PoE voltages according to the control signal under the excitation of the power supply direct current; The PoE power supply circuit further includes a network chip and m PoE port circuits; m is an integer greater than 1; The network chip is configured to output m groups of network signals; Each of the PoE port circuits is connected to the network chip and the PSE control circuit, and is configured to modulate a group of the network signals and a PoE voltage to output a group of PoE signals to the PD device.

8. The PoE power supply circuit according to claim 1, characterized in that, The voltage conversion circuit includes a low-end controller, a field effect transistor, a diode, an inductor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first capacitor, a second capacitor, and a third capacitor; The power input terminal of the low-end controller, the first terminal of the first resistor, and the first terminal of the inductor together serve as the input DC power input terminal of the voltage conversion circuit to access the input DC power; the input undervoltage lockout terminal of the low-end controller is connected to the second terminal of the first resistor and the first terminal of the second resistor, the error amplifier output of the low-end controller and the input terminal of the pulse width modulation comparator, the first terminal of the first capacitor, and the first terminal of the second capacitor are connected, the second terminal of the first capacitor is connected to the first terminal of the third resistor, the feedback terminal of the low-end controller and the second terminal of the second capacitor, the second terminal of the third resistor, the first terminal of the sixth resistor, and the first terminal of the seventh resistor are connected, the current detection input terminal of the low-end controller and the first terminal of the third capacitor, the first terminal of the fourth resistor are connected, the second terminal of the fourth resistor is connected to the source electrode of the field effect transistor, the output terminal of the low-end controller is connected to the gate electrode of the field effect transistor, the second terminal of the inductor is connected to the drain electrode of the field effect transistor and the positive electrode of the diode, and the negative electrode of the diode and the second terminal of the sixth resistor together serve as the output DC power supply terminal of the voltage conversion circuit, and are connected to the PSE control circuit and a preset number of the PD devices to output the supply DC power; The ground terminal of the low-end controller is connected to the second terminal of the second resistor, the second terminal of the third capacitor, the second terminal of the fifth resistor, and the second terminal of the seventh resistor to the power ground.

9. The PoE power supply circuit according to claim 1, characterized in that, The PSE control circuit includes a PSE controller; The digital power supply of the PSE controller is connected to the first power supply, and the I2C clock terminal of the PSE controller and the I2C data input terminal of the PSE controller together serve as the control signal input terminal of the PSE control circuit, and are connected to the control circuit to input the control signal; the main power input terminal of the PSE controller serves as the input DC power supply terminal of the PSE control circuit and is connected to the voltage conversion circuit to input the supply DC power; The return terminal of the 0th power interface of the PSE controller serves as the first PoE voltage output terminal of the PSE control circuit and is connected to the first PD device to output the first PoE voltage; the return terminal of the 1st power interface of the PSE controller serves as the second PoE voltage output terminal of the PSE control circuit and is connected to the second PD device to output the second PoE voltage; the return terminal of the 2nd power interface of the PSE controller serves as the third PoE voltage output terminal of the PSE control circuit and is connected to the third PD device to output the third PoE voltage; the return terminal of the 3rd power interface of the PSE controller serves as the fourth PoE voltage output terminal of the PSE control circuit and is connected to the fourth PD device to output the fourth PoE voltage.

10. An electronic device, characterized in that, It includes the PoE power supply circuit according to any one of claims 1 to 9.

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