HBC solar cell and photovoltaic module

The HBC solar cell design simplifies the manufacturing process by forming 'tunnel contact' structures without masks, improving electron transport and passivation through non-crystalline silicon layers with varying doping concentrations.

CN223110430UActive Publication Date: 2025-07-15TRINA SOLAR CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202421958233.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-13
Publication Date
2025-07-15
Estimated Expiration
2034-08-13

AI Technical Summary

Technical Problem

The existing HBC solar cells require masking layers during the preparation process, resulting in cumbersome production process.

Method used

The composite structure of N region set as an intrinsic amorphous silicon layer + N-type doped amorphous silicon layer + P-type doped microcrystalline silicon layer is adopted, and the P-region is set as a composite structure of an intrinsic amorphous silicon layer + P-type doped microcrystalline silicon layer is adopted. The P-type doped microcrystalline silicon layer is deposited under local etching and without a mask, so as to simplify the preparation process and form a tunneling contact structure with good electron selectivity.

Benefits of technology

The preparation steps of HBC solar cells are greatly simplified, the electron transfer capability and passivation effect on the surface of the crystalline silicon substrate are improved, and the contact resistivity is reduced.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223110430U_ABST
    Figure CN223110430U_ABST
Patent Text Reader

Abstract

The utility model relates to the technical field of photovoltaic power generation, and specifically provides an HBC solar cell and a photovoltaic assembly. Specifically, the HBC solar cell provided by the utility model comprises an N-type silicon substrate; the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer are arranged on the front surface and the back surface of the N-type silicon substrate; the N-type doped amorphous silicon layer is arranged on the second intrinsic amorphous silicon layer; the first P-type doped microcrystalline silicon layer is arranged on the N-type doped amorphous silicon layer; and the second P-type doped microcrystalline silicon layer is arranged between the two N-type doped amorphous silicon layers. An N region is arranged to be of a composite structure of an intrinsic amorphous silicon layer, an N-type doped amorphous silicon layer and a P-type doped microcrystalline silicon layer, a P region is arranged to be of a composite structure of the intrinsic amorphous silicon layer and the P-type doped microcrystalline silicon layer, after the N-type doped amorphous silicon layer is prepared, only local etching needs to be carried out, and then the N-type doped amorphous silicon layer is prepared under the condition that a mask is not needed. And the P-type doped microcrystalline silicon layer can be directly deposited, so that the process steps for preparing the battery can be greatly simplified.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to the technical field of photovoltaic power generation, and specifically provides an HBC solar cell and a photovoltaic module. Background Art

[0002] With the increasing shortage of global energy, the utilization of solar energy has received more and more attention. The application area of solar photovoltaic modules is getting wider and wider, covering multiple industries and fields.

[0003] The interdigitated back contact heterojunction monocrystalline silicon solar cell (abbreviated as HBC solar cell) combines the advantages of the interdigitated back contact solar cell (abbreviated as IBC solar cell) and the heterojunction solar cell with a thin intrinsic layer (abbreviated as HIT solar cell). It not only removes the front surface metal electrode, reduces the shading loss, and obtains a larger short-circuit current, but also significantly reduces the interface states and surface recombination by inserting a high-quality intrinsic amorphous silicon passivation layer between the heavily doped amorphous silicon and crystalline silicon, thereby increasing the open-circuit voltage. It is currently the single-crystalline silicon solar cell with the highest photoelectric conversion efficiency in the world.

[0004] However, for the existing HBC solar cells, in order to achieve the partition preparation of the P region and the N region, a mask layer is required, which involves the preparation and cleaning of the mask layer, and the process is relatively cumbersome.

[0005] Therefore, a new technical solution is needed in this field to solve the above problems. Summary of the Utility Model

[0006] The utility model aims to solve the above technical problems, that is, to solve the problem that the existing HBC solar cells need to rely on a mask layer, resulting in a relatively cumbersome manufacturing process.

[0007] In a first aspect, the utility model provides an HBC solar cell, comprising:

[0008] A silicon substrate of a first conductivity type;

[0009] A first intrinsic amorphous silicon layer disposed on a first surface of the silicon substrate;

[0010] A second intrinsic amorphous silicon layer disposed on a second surface of the silicon substrate opposite to the first surface;

[0011] A first conductivity type amorphous silicon layer disposed on the second intrinsic amorphous silicon layer, the number of the first conductivity type amorphous silicon layers being multiple and arranged at intervals along a first direction, and the second intrinsic amorphous silicon layer being exposed between the multiple first conductivity type amorphous silicon layers;

[0012] A first doped microcrystalline or nanocrystalline silicon layer of a second conductivity type, the number of which is plural and are respectively disposed on the corresponding amorphous silicon layer of the first conductivity type, the second conductivity type being opposite to the first conductivity type; and

[0013] A second doped microcrystalline or nanocrystalline silicon layer of a second conductivity type, which is disposed on the exposed second intrinsic amorphous silicon layer.

[0014] In the preferred technical solution of the above HBC solar cell, the doping concentration of the amorphous silicon layer of the first conductivity type is higher than the doping concentration of the first doped microcrystalline or nanocrystalline silicon layer of the second conductivity type.

[0015] In the preferred technical solution of the above HBC solar cell, the doping concentration of the amorphous silicon layer of the first conductivity type is 1E20 cm -3 to 1E21 cm -3 .

[0016] In the preferred technical solution of the above HBC solar cell, the doping concentration of the first doped microcrystalline or nanocrystalline silicon layer of the second conductivity type is 5E19 cm -3 to 5E20 cm -3 .

[0017] In the preferred technical solution of the above HBC solar cell, the thickness of the amorphous silicon layer of the first conductivity type is 5 nanometers to 40 nanometers.

[0018] In the preferred technical solution of the above HBC solar cell, the thickness of the first doped microcrystalline or nanocrystalline silicon layer of the second conductivity type is 5 nanometers to 40 nanometers.

[0019] In the preferred technical solution of the above HBC solar cell, the thickness of the first intrinsic amorphous silicon layer and / or the second intrinsic amorphous silicon layer is 5 nanometers to 30 nanometers.

[0020] In the preferred technical solution of the above HBC solar cell, the dimension of the amorphous silicon layer of the first conductivity type along the first direction is 300 micrometers to 500 micrometers; and / or

[0021] The dimension of the second doped microcrystalline or nanocrystalline silicon layer of the second conductivity type along the first direction is 300 micrometers to 500 micrometers.

[0022] In the preferred technical solution of the above HBC solar cell, the first conductivity type is N-type and the second conductivity type is P-type; or

[0023] The first conductivity type is P-type and the second conductivity type is N-type.

[0024] In a second aspect, the present utility model further provides a photovoltaic module, which includes the above-mentioned HBC solar cell.

[0025] In the case of adopting the above technical solution, the HBC solar cell of the present utility model sets the N region as a composite structure of an intrinsic amorphous silicon layer + an N-type doped amorphous silicon layer + a P-type doped microcrystalline silicon layer, and sets the P region as a composite structure of an intrinsic amorphous silicon layer + a P-type doped microcrystalline silicon layer. In this way, after the N-type doped amorphous silicon layer is prepared, only local etching is required, and then the P-type doped microcrystalline silicon layer can be directly deposited without a mask, thus greatly simplifying the process steps for preparing the HBC solar cell; in addition, an intrinsic amorphous silicon layer is formed in the N region to stack the N-type doped amorphous silicon layer and the P-type doped microcrystalline silicon layer to form a "tunneling contact" structure, where electrons have stronger transmission ability and better passivation of the surface of the crystalline silicon substrate. Further, by making the doping concentration of the N-type doped amorphous silicon layer higher than that of the P-type doped microcrystalline silicon layer, the "tunneling contact" structure has good electron selectivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The preferred embodiments of the present utility model will be described below with reference to the drawings, in which:

[0027] Figure 1 is a schematic structural diagram of the first embodiment of the HBC solar cell of the present utility model;

[0028] Figure 2 is a schematic structural diagram of the second embodiment of the HBC solar cell of the present utility model;

[0029] Figure 3 is a schematic structural diagram of the third embodiment of the HBC solar cell of the present utility model;

[0030] Figure 4 is a schematic structural diagram of the fourth embodiment of the HBC solar cell of the present utility model.

[0031] LIST OF REFERENCE NUMERALS:

[0032] 1a, N-type silicon substrate; 1b, P-type silicon substrate;

[0033] 2, first intrinsic amorphous silicon layer;

[0034] 3, passivation and antireflection layer;

[0035] 4, second intrinsic amorphous silicon layer;

[0036] 5a, N-type doped amorphous silicon layer; 5b, P-type doped amorphous silicon layer;

[0037] 6a. First P-type doped microcrystalline silicon layer; 6b. First N-type doped microcrystalline silicon layer; 6c. First P-type doped nanocrystalline silicon layer; 6d. First N-type doped nanocrystalline silicon layer;

[0038] 7a. Second P-type doped microcrystalline silicon layer; 7b. Second N-type doped microcrystalline silicon layer; 7c. Second P-type doped nanocrystalline silicon layer; 7d. Second N-type doped nanocrystalline silicon layer;

[0039] 8. Transparent conductive layer;

[0040] 9. Electrode layer. Detailed implementation manners

[0041] The preferred implementation manners of the present utility model will be described below with reference to the accompanying drawings. Those skilled in the art should understand that these implementation manners are only used to explain the technical principle of the present utility model and are not intended to limit the protection scope of the present utility model.

[0042] It should be noted that in the description of the present utility model, the terms "left", "right" and other terms indicating directions or positional relationships are based on the directions or positional relationships shown in the drawings. This is only for convenience of description and does not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0043] Specifically, the present utility model provides an HBC solar cell, including:

[0044] A silicon substrate of a first conductivity type;

[0045] A first intrinsic amorphous silicon layer provided on the first surface of the silicon substrate;

[0046] A second intrinsic amorphous silicon layer provided on the second surface of the silicon substrate opposite to the first surface;

[0047] A first conductivity type amorphous silicon layer provided on the second intrinsic amorphous silicon layer. The number of the first conductivity type amorphous silicon layers is multiple and they are arranged at intervals along a first direction, and the second intrinsic amorphous silicon layer is exposed between the multiple first conductivity type amorphous silicon layers;

[0048] A first doped microcrystalline or nanocrystalline silicon layer of a second conductivity type, the number of which is multiple and they are respectively provided on the corresponding first conductivity type amorphous silicon layers, and the second conductivity type is opposite to the first conductivity type; and

[0049] A second doped microcrystalline or nanocrystalline silicon layer of a second conductivity type provided on the exposed second intrinsic amorphous silicon layer.

[0050] Among them, the first surface of the silicon substrate is the front surface, and the second surface of the silicon substrate is the back surface. The first conductivity type is N-type, and the second conductivity type is P-type; alternatively, the first conductivity type is P-type, and the second conductivity type is N-type.

[0051] The following combines Figures 1 to 4 to introduce four specific embodiments of the HBC solar cell of the present utility model in detail.

[0052] Embodiment 1

[0053] The following combines Figure 1 to introduce Embodiment 1 of the HBC solar cell of the present utility model in detail. In this embodiment, the first conductivity type is N-type, and the second conductivity type is P-type.

[0054] As Figure 1 shown, the HBC solar cell of this embodiment includes an N-type silicon substrate 1a, a first intrinsic amorphous silicon layer 2, a passivation and antireflection layer 3, a second intrinsic amorphous silicon layer 4, an N-type doped amorphous silicon layer 5a, a first P-type doped microcrystalline silicon layer 6a, a second P-type doped microcrystalline silicon layer 7a, a transparent conductive layer 8, and an electrode layer 9.

[0055] Among them, the first intrinsic amorphous silicon layer 2 is disposed on the front surface of the N-type silicon substrate 1a, and the passivation and antireflection layer 3 is disposed on the top surface of the first intrinsic amorphous silicon layer 2.

[0056] The second intrinsic amorphous silicon layer 4 is disposed on the back surface of the N-type silicon substrate 1a, the N-type doped amorphous silicon layer 5a is disposed on the second intrinsic amorphous silicon layer 4, the number of the N-type doped amorphous silicon layers 5a is multiple and they are arranged at intervals along the first direction, the second intrinsic amorphous silicon layer 4 is exposed between the multiple N-type doped amorphous silicon layers 5a, and the number of the first P-type doped microcrystalline silicon layers 6a is multiple and they are respectively disposed on the corresponding N-type doped amorphous silicon layers 5a. The second P-type doped microcrystalline silicon layer 7a is disposed on the exposed second intrinsic amorphous silicon layer 4, that is, between two adjacent N-type doped amorphous silicon layers 5a.

[0057] The transparent conductive layer 8 is disposed on both the first P-type doped microcrystalline silicon layer 6a and the second P-type doped microcrystalline silicon layer 7a, and moreover, the transparent conductive layer 8 on the first P-type doped microcrystalline silicon layer 6a is separated from the transparent conductive layer 8 on the second P-type doped microcrystalline silicon layer 7a. The electrode layer 9 is disposed on each transparent conductive layer 8, the electrode layer 9 corresponding to the first P-type doped microcrystalline silicon layer 6a is the positive electrode layer 9, and the electrode layer 9 corresponding to the second P-type doped microcrystalline silicon layer 7a is the negative electrode layer 9.

[0058] In the HBC solar cell of this embodiment, the second intrinsic amorphous silicon layer 4 + N-type doped amorphous silicon layer 5a + first P-type doped microcrystalline silicon layer 6a form the N region, the second intrinsic amorphous silicon layer 4 + second P-type doped microcrystalline silicon layer 7a form the P region, and the N region and the P region are along the first direction (fromFigure 1 Viewed from above (in the left - right direction), they are alternately distributed. By forming a composite structure of an intrinsic amorphous silicon layer stacked with an N - type doped amorphous silicon layer 5a and a P - type doped microcrystalline silicon layer in the N region, that is, forming a "tunneling contact" structure, electrons have stronger transport ability and better passivation of the surface of the crystalline silicon substrate.

[0059] Both the N - type doped amorphous silicon layer 5a and the P - type doped microcrystalline silicon layer (the first P - type doped microcrystalline silicon layer 6a and the second P - type doped microcrystalline silicon layer 7a) are heavily doped layers. The heavily doped layer can narrow the barrier width and ensure a sufficiently low contact resistivity. In the N region, the N - type doped amorphous silicon layer 5a serves as a nucleation layer, and the P - type doped microcrystalline silicon forms grains and grows. This primary crystal growth mechanism provides a sufficiently low lateral conductivity and excellent insulation, preventing leakage between the two electrodes.

[0060] Exemplarily, Figure 1 Viewed from above, on the back surface of the N - type silicon substrate 1a, there are three N regions and two P regions, alternately distributed in the left - right direction. Specifically, the number of N - type doped amorphous silicon layers 5a is three, arranged at intervals in the left - right direction. At the bottom of each N - type doped amorphous silicon layer 5a, there is a first P - type doped microcrystalline silicon layer 6a. The three N - type doped amorphous silicon layers 5a together form two gaps, and in each gap, there is a second P - type doped microcrystalline silicon layer 7a. That is, the number of second P - type doped microcrystalline silicon layers 7a is two.

[0061] It should be noted that the number of N regions is not limited to the three mentioned above, and the number of P regions is not limited to the two mentioned above. For example, more N regions and P regions can also be set.

[0062] Preferably, the doping concentration of the N - type doped amorphous silicon layer 5a is higher than that of the first P - type doped microcrystalline silicon layer 6a.

[0063] By making the doping concentration of the N - type doped amorphous silicon layer 5a higher than that of the first P - type doped microcrystalline silicon layer 6a, the "tunneling contact" structure has good electron selectivity.

[0064] Among them, the doping concentration of the N - type doped amorphous silicon layer 5a is preferably 1E20 cm -3 to 1E21 cm -3 , and the doping concentration of the first P - type doped microcrystalline silicon layer 6a is preferably 5E19 cm -3 to 5E20 cm -3 .

[0065] In Example 1, the doping concentration of the N - type doped amorphous silicon layer 5a is 1×10 20 cm -3 , and the doping concentration of the first P - type doped microcrystalline silicon layer 6a is 5×10 19 cm -3; Example 2, the doping concentration of the N-type doped amorphous silicon layer 5a is 5×10 20 cm -3 , and the doping concentration of the first P-type doped microcrystalline silicon layer 6a is 1×10 20 cm -3 ; Example 3, the doping concentration of the N-type doped amorphous silicon layer 5a is 1×10 21 cm -3 , and the doping concentration of the first P-type doped microcrystalline silicon layer 6a is 5×10 20 cm -3 .

[0066] It should be noted that the doping concentration of the second P-type doped microcrystalline silicon layer 7a is preferably the same as that of the first P-type doped microcrystalline silicon layer 6a.

[0067] Preferably, the thickness of the N-type doped amorphous silicon layer 5a is 5 nanometers to 40 nanometers.

[0068] Exemplarily, those skilled in the art can set the thickness of the N-type doped amorphous silicon layer 5a to 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm or 40nm in actual applications.

[0069] Preferably, the thickness of the first P-type doped microcrystalline silicon layer 6a is 5 nanometers to 40 nanometers.

[0070] Exemplarily, those skilled in the art can set the thickness of the first P-type doped microcrystalline silicon layer 6a to 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm or 40nm in actual applications.

[0071] It should be noted that the thickness of the second P-type doped microcrystalline silicon layer 7a is preferably the same as that of the first P-type doped microcrystalline silicon layer 6a.

[0072] Preferably, the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 is 5 nanometers to 30 nanometers.

[0073] Exemplarily, those skilled in the art can set the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 to 5nm, 10nm, 15nm, 20nm, 25nm or 30nm in actual applications.

[0074] Preferably, the dimension of the second P-type doped microcrystalline silicon layer 7a in the first direction is 300 micrometers to 500 micrometers.

[0075] Wherein, the dimension of the second P-type doped microcrystalline silicon layer 7a in the first direction is the width of the second P-type doped microcrystalline silicon layer 7a.

[0076] Exemplarily, those skilled in the art can set the width of the second P-type doped microcrystalline silicon layer 7a to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0077] Preferably, the dimension of the N-type doped amorphous silicon layer 5a in the first direction is 300 micrometers to 500 micrometers.

[0078] Wherein, the dimension of the N-type doped amorphous silicon layer 5a in the first direction is the width of the N-type doped amorphous silicon layer 5a.

[0079] Exemplarily, those skilled in the art can set the width of the N-type doped amorphous silicon layer 5a to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0080] Embodiment 2

[0081] The following combines Figure 2 to introduce Embodiment 2 of the HBC solar cell of the present utility model in detail. In this embodiment, the first conduction type is N-type and the second conduction type is P-type.

[0082] As Figure 2 shown, the HBC solar cell of this embodiment includes an N-type silicon substrate 1a, a first intrinsic amorphous silicon layer 2, a passivation and antireflection layer 3, a second intrinsic amorphous silicon layer 4, an N-type doped amorphous silicon layer 5a, a first P-type doped nanocrystalline silicon layer 6c, a second P-type doped nanocrystalline silicon layer 7c, a transparent conductive layer 8 and an electrode layer 9.

[0083] Wherein, the first intrinsic amorphous silicon layer 2 is disposed on the front surface of the N-type silicon substrate 1a, and the passivation and antireflection layer 3 is disposed on the top surface of the first intrinsic amorphous silicon layer 2.

[0084] The second intrinsic amorphous silicon layer 4 is disposed on the back surface of the N-type silicon substrate 1a, the N-type doped amorphous silicon layer 5a is disposed on the second intrinsic amorphous silicon layer 4, the number of the N-type doped amorphous silicon layers 5a is multiple and they are arranged at intervals in the first direction, the second intrinsic amorphous silicon layer 4 is exposed between the multiple N-type doped amorphous silicon layers 5a, the number of the first P-type doped nanocrystalline silicon layers 6c is multiple and they are respectively disposed on the corresponding N-type doped amorphous silicon layers 5a. The second P-type doped nanocrystalline silicon layer 7c is disposed on the exposed second intrinsic amorphous silicon layer 4, that is, between two adjacent N-type doped amorphous silicon layers 5a.

[0085] A transparent conductive layer 8 is provided on both the first P-type doped nanosilicon layer 6c and the second P-type doped nanosilicon layer 7c, and the transparent conductive layer 8 on the first P-type doped nanosilicon layer 6c is separated from the transparent conductive layer 8 on the second P-type doped nanosilicon layer 7c. An electrode layer 9 is provided on each transparent conductive layer 8. The electrode layer 9 corresponding to the first P-type doped nanosilicon layer 6c is a positive electrode layer, and the electrode layer 9 corresponding to the second P-type doped nanosilicon layer 7c is a negative electrode layer.

[0086] In the HBC solar cell of this embodiment, the second intrinsic amorphous silicon layer 4 + N-type doped amorphous silicon layer 5a + first P-type doped nanosilicon layer 6c form an N region, and the second intrinsic amorphous silicon layer 4 + second P-type doped nanosilicon layer 7c form a P region. The N region and the P region are alternately distributed along the first direction (from Figure 2 viewed from above, it is the left-right direction). By forming a composite structure of an intrinsic amorphous silicon layer stacked with an N-type doped amorphous silicon layer and a P-type doped nanosilicon layer in the N region, that is, forming a "tunneling contact" structure, electrons have stronger transport ability and better passivation of the surface of the crystalline silicon substrate.

[0087] Both the N-type doped amorphous silicon layer 5a and the P-type doped nanosilicon layer (the first P-type doped nanosilicon layer 6c and the second P-type doped nanosilicon layer 7c) are heavily doped layers. The heavily doped layer can narrow the barrier width and ensure a sufficiently low contact resistivity. In the N region, the N-type doped amorphous silicon layer 5a serves as a nucleation layer, and P-type doped nanosilicon forms grains and grows. This primary crystal growth mechanism provides a sufficiently low lateral conductivity and excellent insulation to prevent leakage between the two electrodes.

[0088] Exemplarily, from Figure 2 viewed from above, the back surface (i.e., the bottom surface) of the N-type silicon substrate 1a is provided with three N regions and two P regions, which are alternately distributed along the left-right direction. Specifically, the number of N-type doped amorphous silicon layers 5a is three, which are arranged at intervals along the left-right direction. Each bottom of the N-type doped amorphous silicon layer 5a is provided with a first P-type doped nanosilicon layer 6c. The three N-type doped amorphous silicon layers 5a altogether form two gaps, and each gap is provided with a second P-type doped nanosilicon layer 7c. That is, the number of second P-type doped nanosilicon layers 7c is two.

[0089] It should be noted that the number of N regions is not limited to the above three, and the number of P regions is not limited to the above two. For example, more N regions and P regions can also be provided.

[0090] Preferably, the doping concentration of the N-type doped amorphous silicon layer 5a is higher than the doping concentration of the first P-type doped nanosilicon layer 6c.

[0091] By making the doping concentration of the N-type doped amorphous silicon layer 5a higher than the doping concentration of the first P-type doped nanosilicon layer 6c, the "tunneling contact" structure has good electron selectivity.

[0092] Among them, the doping concentration of the N-type doped amorphous silicon layer 5a is preferably 1E20 cm -3 to 1E21 cm -3 , and the doping concentration of the first P-type doped nanocrystalline silicon layer 6c is preferably 5E19 cm -3 to 5E20 cm -3 .

[0093] Example 1, the doping concentration of the N-type doped amorphous silicon layer 5a is 1×10 20 cm -3 , and the doping concentration of the first P-type doped nanocrystalline silicon layer 6c is 5×10 19 cm -3 ;

[0094] Example 2, the doping concentration of the N-type doped amorphous silicon layer 5a is 5×10 20 cm -3 , and the doping concentration of the first P-type doped nanocrystalline silicon layer 6c is 1×10 20 cm -3 ;

[0095] Example 3, the doping concentration of the N-type doped amorphous silicon layer 5a is 1×10 21 cm -3 , and the doping concentration of the first P-type doped nanocrystalline silicon layer 6c is 5×10 20 cm -3 .

[0096] It should be noted that the doping concentration of the second P-type doped nanocrystalline silicon layer 7c is preferably the same as that of the first P-type doped nanocrystalline silicon layer 6c.

[0097] Preferably, the thickness of the N-type doped amorphous silicon layer 5a is 5 nanometers to 40 nanometers.

[0098] Exemplarily, those skilled in the art can set the thickness of the N-type doped amorphous silicon layer 5a to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm in actual applications.

[0099] Preferably, the thickness of the first P-type doped nanocrystalline silicon layer 6c is 5 nanometers to 40 nanometers.

[0100] Exemplarily, those skilled in the art can set the thickness of the first P-type doped nanocrystalline silicon layer 6c to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm in actual applications.

[0101] It should be noted that the thickness of the second P-type doped nanocrystalline silicon layer 7c is preferably the same as that of the first P-type doped nanocrystalline silicon layer 6c.

[0102] Preferably, the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 is 5 nanometers to 30 nanometers.

[0103] Exemplarily, those skilled in the art can set the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm or 30 nm in practical applications.

[0104] Preferably, the size of the second P-type doped nanocrystalline silicon layer 7c in the first direction is 300 micrometers to 500 micrometers.

[0105] Wherein, the size of the second P-type doped nanocrystalline silicon layer 7c in the first direction is the width of the second P-type doped nanocrystalline silicon layer 7c.

[0106] Exemplarily, those skilled in the art can set the width of the second P-type doped nanocrystalline silicon layer 7c to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0107] Preferably, the size of the N-type doped amorphous silicon layer 5a in the first direction is 300 micrometers to 500 micrometers.

[0108] Wherein, the size of the N-type doped amorphous silicon layer 5a in the first direction is the width of the N-type doped amorphous silicon layer 5a.

[0109] Exemplarily, those skilled in the art can set the width of the N-type doped amorphous silicon layer 5a to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0110] Embodiment III

[0111] The following combines Figure 3 to introduce Embodiment III of the HBC solar cell of the present invention in detail. In this embodiment, the first conductivity type is P-type and the second conductivity type is N-type.

[0112] As Figure 3 shown, the HBC solar cell of this embodiment includes a P-type silicon substrate 1b, a first intrinsic amorphous silicon layer 2, a passivation and antireflection layer 3, a second intrinsic amorphous silicon layer 4, a P-type doped amorphous silicon layer 5b, a first N-type doped microcrystalline silicon layer 6b, a second N-type doped microcrystalline silicon layer 7b, a transparent conductive layer 8 and an electrode layer 9.

[0113] Among them, the first intrinsic amorphous silicon layer 2 is disposed on the front surface of the P-type silicon substrate 1b, and the passivation and antireflection layer 3 is disposed on the top surface of the first intrinsic amorphous silicon layer 2.

[0114] The second intrinsic amorphous silicon layer 4 is disposed on the back surface of the P-type silicon substrate 1b, and the P-type doped amorphous silicon layer 5b is disposed on the second intrinsic amorphous silicon layer 4. The number of the P-type doped amorphous silicon layers 5b is multiple and they are arranged at intervals in the first direction. The second intrinsic amorphous silicon layer 4 is exposed between the multiple P-type doped amorphous silicon layers 5b. The number of the first N-type doped microcrystalline silicon layers 6b is multiple and they are respectively disposed on the corresponding P-type doped amorphous silicon layers 5b. The second N-type doped microcrystalline silicon layer 7b is disposed on the exposed second intrinsic amorphous silicon layer 4, that is, between two adjacent P-type doped amorphous silicon layers 5b.

[0115] The transparent conductive layer 8 is disposed on both the first N-type doped microcrystalline silicon layer 6b and the second N-type doped microcrystalline silicon layer 7b. Moreover, the transparent conductive layer 8 on the first N-type doped microcrystalline silicon layer 6b is separated from the transparent conductive layer 8 on the second N-type doped microcrystalline silicon layer 7b. The electrode layer 9 is disposed on each transparent conductive layer 8. The electrode layer 9 corresponding to the first N-type doped microcrystalline silicon layer 6b is the negative electrode layer, and the electrode layer 9 corresponding to the second N-type doped microcrystalline silicon layer 7b is the positive electrode layer.

[0116] In the HBC solar cell of this embodiment, the second intrinsic amorphous silicon layer 4 + the P-type doped amorphous silicon layer 5b + the first N-type doped microcrystalline silicon layer 6b form the P region, and the second intrinsic amorphous silicon layer 4 + the second N-type doped microcrystalline silicon layer 7b form the N region. The N region and the P region are alternately distributed in the first direction (from Figure 3 viewed from above, it is the left-right direction).

[0117] Both the P-type doped amorphous silicon layer 5b and the P-type doped microcrystalline silicon layers (the first N-type doped microcrystalline silicon layer 6b and the second N-type doped microcrystalline silicon layer 7b) are heavily doped layers. The heavily doped layer can narrow the barrier width and ensure a sufficiently low contact resistivity.

[0118] Exemplarily, viewed from Figure 3 above, on the back surface (i.e., the bottom surface) of the P-type silicon substrate 1b, there are three P regions and two N regions, which are alternately distributed in the left-right direction. Specifically, the number of the P-type doped amorphous silicon layers 5b is three, and they are arranged at intervals in the left-right direction. Each bottom of the P-type doped amorphous silicon layers 5b is provided with a first N-type doped microcrystalline silicon layer 6b. The three P-type doped amorphous silicon layers 5b together form two gaps, and each gap is provided with a second N-type doped microcrystalline silicon layer 7b. That is, the number of the second N-type doped microcrystalline silicon layers 7b is two.

[0119] It should be noted that the number of the P regions is not limited to the above three, and the number of the N regions is not limited to the above two. For example, more N regions and P regions can also be set.

[0120] Preferably, the doping concentration of the P-type doped amorphous silicon layer 5b is higher than that of the first N-type doped microcrystalline silicon layer 6b.

[0121] By making the doping concentration of the P-type doped amorphous silicon layer 5b higher than that of the first N-type doped microcrystalline silicon layer 6b, the "tunneling contact" structure has good hole selectivity.

[0122] Among them, the doping concentration of the P-type doped amorphous silicon layer 5b is preferably 1E20 cm -3 to 1E21 cm -3 , and the doping concentration of the first N-type doped microcrystalline silicon layer 6b is preferably 5E19 cm -3 to 5E20 cm -3 .

[0123] Example 1, the doping concentration of the P-type doped amorphous silicon layer 5b is 1×10 20 cm -3 , and the doping concentration of the first N-type doped microcrystalline silicon layer 6b is 5×10 19 cm -3 ;

[0124] Example 2, the doping concentration of the P-type doped amorphous silicon layer 5b is 5×10 20 cm -3 , and the doping concentration of the first N-type doped microcrystalline silicon layer 6b is 1×10 20 cm -3 ;

[0125] Example 3, the doping concentration of the P-type doped amorphous silicon layer 5b is 1×10 21 cm -3 , and the doping concentration of the first N-type doped microcrystalline silicon layer 6b is 5×10 20 cm -3 .

[0126] It should be noted that the doping concentration of the second N-type doped microcrystalline silicon layer 7b is preferably the same as that of the first N-type doped microcrystalline silicon layer 6b.

[0127] Preferably, the thickness of the P-type doped amorphous silicon layer 5b is 5 nanometers to 40 nanometers.

[0128] Exemplarily, those skilled in the art can set the thickness of the P-type doped amorphous silicon layer 5b to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm in actual applications.

[0129] Preferably, the thickness of the first N-type doped microcrystalline silicon layer 6b is 5 nanometers to 40 nanometers.

[0130] Exemplarily, those skilled in the art can set the thickness of the first N-type doped microcrystalline silicon layer 6b to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm in actual applications.

[0131] It should be noted that the thickness of the second N-type doped microcrystalline silicon layer 7b is preferably the same as that of the first N-type doped microcrystalline silicon layer 6b.

[0132] Preferably, the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 is 5 nanometers to 30 nanometers.

[0133] Exemplarily, those skilled in the art can set the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm or 30 nm in practical applications.

[0134] Preferably, the dimension of the second N-type doped microcrystalline silicon layer 7b in the first direction is 300 micrometers to 500 micrometers.

[0135] Wherein, the dimension of the second N-type doped microcrystalline silicon layer 7b in the first direction is the width of the second N-type doped microcrystalline silicon layer 7b.

[0136] Exemplarily, those skilled in the art can set the width of the second N-type doped microcrystalline silicon layer 7b to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0137] Preferably, the dimension of the P-type doped amorphous silicon layer 5b in the first direction is 300 micrometers to 500 micrometers.

[0138] Wherein, the dimension of the P-type doped amorphous silicon layer 5b in the first direction is the width of the P-type doped amorphous silicon layer 5b.

[0139] Exemplarily, those skilled in the art can set the width of the P-type doped amorphous silicon layer 5b to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0140] Embodiment Four

[0141] Next, in combination with Figure 4 Embodiment Four of the HBC solar cell of the present invention will be introduced in detail. In this embodiment, the first conduction type is P-type and the second conduction type is N-type.

[0142] As Figure 4 shown, the HBC solar cell of this embodiment includes a P-type silicon substrate 1b, a first intrinsic amorphous silicon layer 2, a passivation and antireflection layer 3, a second intrinsic amorphous silicon layer 4, a P-type doped amorphous silicon layer 5b, a first N-type doped nanocrystalline silicon layer 6d, a second N-type doped nanocrystalline silicon layer 7d, a transparent conductive layer 8 and an electrode layer 9.

[0143] Among them, the first intrinsic amorphous silicon layer 2 is disposed on the front surface of the P-type silicon substrate 1b, and the passivation and antireflection layer 3 is disposed on the top surface of the first intrinsic amorphous silicon layer 2.

[0144] The second intrinsic amorphous silicon layer 4 is disposed on the back surface of the P-type silicon substrate 1b. The P-type doped amorphous silicon layer 5b is disposed on the second intrinsic amorphous silicon layer 4. The number of the P-type doped amorphous silicon layers 5b is multiple and they are arranged at intervals along the first direction. The second intrinsic amorphous silicon layer 4 is exposed between the multiple P-type doped amorphous silicon layers 5b. The number of the first N-type doped nanocrystalline silicon layers 6d is multiple and they are respectively disposed on the corresponding P-type doped amorphous silicon layers 5b. The second N-type doped nanocrystalline silicon layer 7d is disposed on the exposed second intrinsic amorphous silicon layer 4, that is, between two adjacent P-type doped amorphous silicon layers 5b.

[0145] The transparent conductive layers 8 are disposed on both the first N-type doped nanocrystalline silicon layer 6d and the second N-type doped nanocrystalline silicon layer 7d. Moreover, the transparent conductive layer 8 on the first N-type doped nanocrystalline silicon layer 6d is separated from the transparent conductive layer 8 on the second N-type doped nanocrystalline silicon layer 7d. The electrode layers 9 are disposed on each transparent conductive layer 8. The electrode layer 9 corresponding to the first N-type doped nanocrystalline silicon layer 6d is the negative electrode layer, and the electrode layer 9 corresponding to the second N-type doped nanocrystalline silicon layer 7d is the positive electrode layer.

[0146] In the HBC solar cell of this embodiment, the second intrinsic amorphous silicon layer 4 + the P-type doped amorphous silicon layer 5b + the first N-type doped nanocrystalline silicon layer 6d form the P region, and the second intrinsic amorphous silicon layer 4 + the second N-type doped nanocrystalline silicon layer 7d form the N region. The N region and the P region are alternately distributed along the first direction (from Figure 4 viewed from above, it is the left-right direction).

[0147] Both the P-type doped amorphous silicon layer 5b and the P-type doped nanocrystalline silicon layers (the first N-type doped nanocrystalline silicon layer 6d and the second N-type doped nanocrystalline silicon layer 7d) are heavily doped layers. The heavily doped layers can narrow the barrier width and ensure a sufficiently low contact resistivity.

[0148] Exemplarily, from Figure 4 viewed from above, three P regions and two N regions are disposed on the back surface (i.e., the bottom surface) of the P-type silicon substrate 1b, and they are alternately distributed along the left-right direction. Specifically, the number of the P-type doped amorphous silicon layers 5b is three, and they are arranged at intervals along the left-right direction. Each bottom of the P-type doped amorphous silicon layers 5b is provided with a first N-type doped nanocrystalline silicon layer 6d. The three P-type doped amorphous silicon layers 5b altogether form two gaps, and each gap is provided with a second N-type doped nanocrystalline silicon layer 7d, that is, the number of the second N-type doped nanocrystalline silicon layers 7d is two.

[0149] It should be noted that the number of the P regions is not limited to three as described above, and the number of the N regions is not limited to two as described above. For example, more N regions and P regions can also be provided.

[0150] Preferably, the doping concentration of the P-type doped amorphous silicon layer 5b is higher than that of the first N-type doped nanocrystalline silicon layer 6d.

[0151] By making the doping concentration of the P-type doped amorphous silicon layer 5b higher than that of the first N-type doped nanocrystalline silicon layer 6d, the "tunneling contact" structure has good hole selectivity.

[0152] Among them, the doping concentration of the P-type doped amorphous silicon layer 5b is preferably 1E20 cm -3 to 1E21 cm -3 , and the doping concentration of the first N-type doped nanocrystalline silicon layer 6d is preferably 5E19 cm -3 to 5E20 cm -3 .

[0153] Example 1, the doping concentration of the P-type doped amorphous silicon layer 5b is 1×10 20 cm -3 , and the doping concentration of the first N-type doped nanocrystalline silicon layer 6d is 5×10 19 cm -3 ;

[0154] Example 2, the doping concentration of the P-type doped amorphous silicon layer 5b is 5×10 20 cm -3 , and the doping concentration of the first N-type doped nanocrystalline silicon layer 6d is 1×10 20 cm -3 ;

[0155] Example 3, the doping concentration of the P-type doped amorphous silicon layer 5b is 1×10 21 cm -3 , and the doping concentration of the first N-type doped nanocrystalline silicon layer 6d is 5×10 20 cm -3 .

[0156] It should be noted that the doping concentration of the second N-type doped nanocrystalline silicon layer 7d is preferably the same as that of the first N-type doped nanocrystalline silicon layer 6d.

[0157] Preferably, the thickness of the P-type doped amorphous silicon layer 5b is 5 nanometers to 40 nanometers.

[0158] Exemplarily, those skilled in the art can set the thickness of the P-type doped amorphous silicon layer 5b to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm in practical applications.

[0159] Preferably, the thickness of the first N-type doped nanocrystalline silicon layer 6d is 5 nanometers to 40 nanometers.

[0160] Exemplarily, those skilled in the art can set the thickness of the first N-type doped nano-silicon layer 6d to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm or 40 nm in practical applications.

[0161] It should be noted that the thickness of the second N-type doped nano-silicon layer 7d is preferably the same as that of the first N-type doped nano-silicon layer 6d.

[0162] Preferably, the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 is 5 nanometers to 30 nanometers.

[0163] Exemplarily, those skilled in the art can set the thickness of the first intrinsic amorphous silicon layer 2 and / or the second intrinsic amorphous silicon layer 4 to 5 nm, 10 nm, 15 nm, 20 nm, 25 nm or 30 nm in practical applications.

[0164] Preferably, the size of the second N-type doped nano-silicon layer 7d in the first direction is 300 micrometers to 500 micrometers.

[0165] Wherein, the size of the second N-type doped nano-silicon layer 7d in the first direction is the width of the second N-type doped nano-silicon layer 7d.

[0166] Exemplarily, those skilled in the art can set the width of the second N-type doped nano-silicon layer 7d to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0167] Preferably, the size of the P-type doped amorphous silicon layer 5b in the first direction is 300 micrometers to 500 micrometers.

[0168] Wherein, the size of the P-type doped amorphous silicon layer 5b in the first direction is the width of the P-type doped amorphous silicon layer 5b.

[0169] Exemplarily, those skilled in the art can set the width of the P-type doped amorphous silicon layer 5b to 300 μm, 350 μm, 400 μm, 450 μm or 500 μm in practical applications.

[0170] The present utility model also provides a photovoltaic module, which includes the HBC solar cell of any one of the above-described embodiments.

[0171] Finally, taking the HBC solar cell in the first embodiment as an example, the preparation steps of the HBC solar cell will be introduced.

[0172] S1: Clean and polish the N-type silicon substrate.

[0173] S2: Deposit intrinsic amorphous silicon layers on the front and back of the N-type silicon substrate simultaneously.

[0174] That is, a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer are respectively formed on the front and back surfaces of the N-type silicon substrate.

[0175] S3: Deposit a passivation and antireflection layer on the front surface.

[0176] That is, a passivation and antireflection layer is formed on the top surface of the first intrinsic amorphous silicon layer.

[0177] S4: Deposit an N-type doped amorphous silicon layer on the entire back surface.

[0178] That is, a continuous N-type doped amorphous silicon layer is formed on the bottom surface of the second intrinsic amorphous silicon layer.

[0179] S5: Locally etch the N-type doped amorphous silicon layer.

[0180] Among them, laser etching can be used to locally etch the N-type doped amorphous silicon layer, that is, a plurality of strip-shaped grooves are etched along the first direction, so that the continuous N-type doped amorphous silicon layer formed in step S4 becomes a plurality of N-type doped amorphous silicon layers arranged at intervals along the first direction.

[0181] S6: After cleaning, deposit a P-type doped microcrystalline silicon layer on the entire back surface.

[0182] That is, a first P-type doped microcrystalline silicon layer is formed on the N-type doped amorphous silicon layer, and a second P-type doped microcrystalline silicon layer is formed on the second intrinsic amorphous silicon layer between the two N-type doped amorphous silicon layers.

[0183] S7: Deposit a transparent conductive film on the back surface.

[0184] That is, a transparent conductive film is formed on the first P-type doped microcrystalline silicon layer and the second P-type doped microcrystalline silicon layer.

[0185] S8: Locally slot the transparent conductive film.

[0186] That is, the transparent conductive film on the first P-type doped microcrystalline silicon layer and the transparent conductive film on the second P-type doped microcrystalline silicon layer are separated.

[0187] S9: Fabricate a metal electrode.

[0188] That is, an electrode layer is formed on the transparent conductive film.

[0189] Those skilled in the art can understand that although some of the embodiments described herein include certain features included in other embodiments rather than other features, the combination of features of different embodiments means that it is within the scope of this application and forms different embodiments. For example, in the claims of this application, any one of the claimed embodiments can be used in any combination.

[0190] So far, the technical solution of the present utility model has been described in combination with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present utility model is obviously not limited to these specific embodiments. Without departing from the principle of the present utility model, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present utility model.

Claims

1. An HBC solar cell, characterized in that, Comprising: A silicon substrate of a first conductivity type; A first intrinsic amorphous silicon layer provided on a first surface of the silicon substrate; A second intrinsic amorphous silicon layer provided on a second surface of the silicon substrate opposite to the first surface; Amorphous silicon layers of a first conductivity type provided on the second intrinsic amorphous silicon layer, the number of the amorphous silicon layers of the first conductivity type being multiple and arranged at intervals in a first direction, and the second intrinsic amorphous silicon layer being exposed between the multiple amorphous silicon layers of the first conductivity type; First doped microcrystalline or nanocrystalline silicon layers of a second conductivity type, the number of which is multiple and are respectively provided on the corresponding amorphous silicon layers of the first conductivity type, the second conductivity type being opposite to the first conductivity type; and A second doped microcrystalline or nanocrystalline silicon layer of the second conductivity type provided on the exposed second intrinsic amorphous silicon layer.

2. The HBC solar cell according to claim 1, wherein The doping concentration of the amorphous silicon layer of the first conductivity type is higher than the doping concentration of the first doped microcrystalline or nanocrystalline silicon layer of the second conductivity type.

3. The HBC solar cell according to claim 2, wherein, The doping concentration of the amorphous silicon layer of the first conductivity type is 1E20 cm -3 to 1E21 cm -3 .

4. The HBC solar cell according to claim 2, characterized in that, The doping concentration of the first doped microcrystalline or nanocrystalline silicon layer of the second conductivity type is 5E19 cm -3 to 5E20 cm -3 .

5. The HBC solar cell according to claim 1, wherein, The thickness of the amorphous silicon layer of the first conductivity type is 5 nanometers to 40 nanometers.

6. The HBC solar cell according to claim 1, characterized in that, The thickness of the first doped microcrystalline or nanocrystalline silicon layer of the second conductivity type is 5 nanometers to 40 nanometers.

7. The HBC solar cell according to claim 1, wherein The thickness of the first intrinsic amorphous silicon layer and / or the second intrinsic amorphous silicon layer is 5 nanometers to 30 nanometers.

8. The HBC solar cell according to claim 1, characterized in that, The dimension of the amorphous silicon layer of the first conductivity type in the first direction is 300 micrometers to 500 micrometers; and / or The dimension of the second doped microcrystalline or nanocrystalline silicon layer of the second conductivity type in the first direction is 300 micrometers to 500 micrometers.

9. The HBC solar cell according to any one of claims 1 to 8, characterized in that, The first conductivity type is N-type and the second conductivity type is P-type; or The first conductivity type is P-type and the second conductivity type is N-type.

10. A photovoltaic module, characterized in that, The photovoltaic module comprises the HBC solar cell according to any one of claims 1 to 9.