Heterojunction battery covered by total-area TCO conductive film

Abstract

The utility model relates to the technical field of heterojunction cells, in particular to a full-area TCO conductive film covered heterojunction cell, which sequentially comprises an electrode, a TCO transparent conductive film, doped N-type microcrystalline silicon, amorphous silicon, a silicon wafer, amorphous silicon, doped P-type microcrystalline silicon, a TCO transparent conductive film and an electrode from one surface to the other surface, a protective layer is arranged on the side surface of the cell, and the transparent conductive film covers the TCO transparent conductive film. And the protective layer covers the TCO transparent conductive film on the other side from the TCO transparent conductive film on one side. The method comprises the following steps: gettering, texturing and cleaning a silicon wafer; then depositing amorphous silicon, doped N-type microcrystalline silicon and doped P-type microcrystalline silicon on a silicon wafer; tCO transparent conductive film deposition is firstly carried out on the doped N-type microcrystalline silicon surface, TCO transparent conductive film deposition is then carried out on the doped P-type microcrystalline silicon surface, and during deposition, full-area TCO transparent conductive film deposition is carried out, that is, the area of TCO covering a silicon wafer is 100%, so that the conversion efficiency of the battery can be improved, compact protective layer deposition is carried out on the edge after laser, and the conversion efficiency of the battery can be improved. Metal ions and water vapor can be prevented from invading the amorphous / microcrystalline silicon layer of the battery.

Description

Technical Field

[0001] The utility model relates to the technical field of heterojunction batteries, and particularly relates to a heterojunction battery covered with a full-area TCO conductive film. Background Art

[0002] When depositing a TCO transparent conductive film by physical vapor deposition in a heterojunction battery, a silicon wafer passivated by intrinsic amorphous silicon / doped microcrystalline silicon is placed on a hollow carrier plate, and TCO transparent conductive film layers are respectively plated on the upper surface and the lower surface. Among them, the entire upper surface is coated, and the coating area is 100%; the lower surface is placed on the carrier plate step, and the parts of the four edges of the battery wafer placed on the step after coating are not coated, which is called a mask. The function of the mask is isolation and insulation, which is to prevent the front and back sides from being conducted through the edge of the battery wafer to generate a short circuit, thereby increasing the parallel resistance of the battery wafer and improving the battery efficiency.

[0003] At present, in order to increase the parallel resistance of the battery wafer and prevent the front and back sides of the heterojunction solar cell from being conducted, the mask width is generally about 1-2 mm. In the unmasked area, since the TCO transparent conductive thin film is not deposited, sunlight cannot be absorbed and utilized. In addition, the intrinsic amorphous silicon / doped microcrystalline silicon in the unmasked area is exposed, which has an impact on the reliability of the solar cell; moreover, although a certain width of the mask can improve the parallel resistance of the heterojunction battery wafer, it sacrifices the conversion efficiency of the battery wafer.

[0004] The prior art such as CN 219937063U, a heterojunction solar cell with full-area TCO coverage by edge etching, deposits the same full-area TCO thin film on the back of the heterojunction solar cell as on the front, and the etched area is set around the full-area heterojunction solar cell to prevent short circuits; finally, the back of the battery is fully utilized, the light incident area is increased, the battery efficiency is greatly improved, and the power generation is increased. This patent realizes the coverage of the full-area TCO film on the front and back of the heterojunction battery, and removes the edge TCO film by gas etching method. However, there is silicon exposure at the edge of the silicon wafer and a little exposure of the amorphous silicon film on the cross-section of the silicon wafer edge after removal, and the exposure of the amorphous silicon film will also have a significant impact on the long-term reliability of the solar cell. Content of the Utility Model

[0005] The purpose of the utility model is to provide a heterojunction battery covered with a full-area TCO conductive film, so as to solve the technical problem that there is silicon exposure at the edge of the silicon wafer and a little exposure of the amorphous silicon film on the cross-section of the silicon wafer edge in the prior art, and the exposure of the amorphous silicon film will also have a significant impact on the long-term reliability of the solar cell.

[0006] The utility model discloses a heterojunction battery covered with a full-area TCO conductive film. The battery comprises, from one side to the other side in sequence: an electrode, a TCO transparent conductive film, doped N-type microcrystalline silicon, amorphous silicon, a silicon wafer, amorphous silicon, doped P-type microcrystalline silicon, a TCO transparent conductive film and an electrode. A protective layer is arranged on the side surface of the battery, and the protective layer covers from the TCO transparent conductive film on one side to the TCO transparent conductive film on the other side.

[0007] Working principle: First, the silicon wafer is subjected to impurity gettering, texturing and cleaning; then amorphous silicon, doped N-type microcrystalline silicon and doped P-type microcrystalline silicon are deposited on the silicon wafer. First, a TCO transparent conductive film is deposited on the doped N-type microcrystalline silicon surface, and then a TCO transparent conductive film is deposited on the doped P-type microcrystalline silicon surface. During deposition, it is all full-area TCO transparent conductive film deposition, that is, the area where the TCO covers the silicon wafer is 100%, which can improve the battery conversion efficiency. A dense protective layer is deposited on the edge after laser treatment to prevent metal ions and water vapor from invading the amorphous / microcrystalline silicon layer of the battery. The TCO transparent conductive film on the edge of the silicon wafer is removed by laser to prevent the battery from short-circuiting up and down. When removing the edge TCO film by laser, the laser speed is 10000 - 30000 mm / s, the laser frequency is 100 - 500 KHz, and the laser power percentage is 10% - 50%. By setting the protective layer, the exposure of the cross-sectional amorphous silicon is avoided, ensuring the long-term reliability of the solar cell and solving the technical problems existing in the prior art.

[0008] Further, the protective layer is silicon oxynitride.

[0009] Specific implementation steps for growing silicon oxynitride: Nitrous oxide (N2O) is introduced, the temperature is 200 - 300 °C, the flow rate is 2000 - 3000 sccm, the time is 100 - 300 s, the pressure is 1400 - 1800 mTor, and the RF power is 2000 - 3000 W. By setting the protective layer as silicon oxynitride, metal ions can be prevented from invading the battery, ensuring the long-term reliability of the solar cell.

[0010] Further, the thickness of the silicon oxynitride is 30 - 80 nm.

[0011] Further, silicon nitride is arranged outside the protective layer.

[0012] Specific implementation steps for growing silicon nitride: Silane (SiH4) and ammonia (NH3) are introduced. The temperature is 200 - 300 °C, the deposition time is 100 - 200 s, the pressure is 1600 - 1800 mTorr, the SiH4:NH3 flow ratio is 1:5 - 1:10, and the RF power is 2500 - 4000 W. By setting the silicon nitride, taking advantage of its excellent ability to block alkali ions, good hydrophobicity, and low pinhole density, making it extremely difficult for gases and water vapor to penetrate, it protects the edge of the silicon wafer while adjusting the gas flow to achieve the same color as the TCO transparent conductive film, thus achieving the purpose of appearance consistency.

[0013] Further, the refractive index of the silicon nitride is 1.9 - 2.2.

[0014] Further, the thickness of the silicon nitride is 80 - 120 nm.

[0015] Further, the thickness of the silicon nitride is 80 - 110 nm.

[0016] Further, the TCO transparent conductive film is an indium-free tin oxide film or a low-indium tin-doped indium oxide film.

[0017] Further, the silicon wafer is an N-type silicon wafer.

[0018] Further, the electrode is a silver electrode.

[0019] Compared with the prior art, the beneficial effects of the present utility model are as follows:

[0020] 1. By setting a protective layer, the exposure of amorphous silicon in the cross-section is avoided, ensuring the long-term reliability of the solar cell and solving the technical problems existing in the prior art;

[0021] 2. By setting the protective layer as silicon oxynitride, the intrusion of metal ions into the battery can be prevented, ensuring the long-term reliability of the solar cell;

[0022] 3. By setting the silicon nitride, taking advantage of its excellent ability to block alkali ions, good hydrophobicity, and low pinhole density, making it extremely difficult for gases and water vapor to penetrate, it protects the edge of the silicon wafer while adjusting the gas flow to achieve the same color as the TCO transparent conductive film, thus achieving the purpose of appearance consistency. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following will briefly introduce the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present utility model, so they should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other relevant drawings can also be obtained based on these drawings.

[0024] Figure 1 This is a schematic diagram of the heterojunction battery structure of the present utility model.

[0025] Figure 2 This is a schematic diagram of the heterojunction battery structure of the prior art.

[0026] In the above-mentioned drawings, the meanings represented by each mark are as follows: 1 - electrode, 2 - TCO transparent conductive film, 3 - doped N-type microcrystalline silicon, 4 - amorphous silicon, 5 - silicon wafer, 6 - doped P-type microcrystalline silicon, 7 - protective layer, 8 - silicon nitride. Specific embodiments

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are some, but not all, of the embodiments of the present utility model.

[0028] Example 1

[0029] The technical solution adopted in this example is as follows:

[0030] As Figure 1 shown, a heterojunction battery covered with a full-area TCO conductive film, the battery from one side to the other side in sequence is: electrode 1, TCO transparent conductive film 2, doped N-type microcrystalline silicon 3, amorphous silicon 4, silicon wafer 5, amorphous silicon 4, doped P-type microcrystalline silicon 6, TCO transparent conductive film 2, and electrode 1. A protective layer 7 is provided on the side of the battery, and the protective layer 7 covers from the TCO transparent conductive film 2 on one side to the TCO transparent conductive film 2 on the other side.

[0031] Working principle: First, the silicon wafer 5 is subjected to impurity gettering, texturing, and cleaning; then the amorphous silicon 4, doped N-type microcrystalline silicon 3, and doped P-type microcrystalline silicon 6 are deposited on the silicon wafer 5; first, the TCO transparent conductive film 2 is deposited on the doped N-type microcrystalline silicon 3 side, and then the TCO transparent conductive film 2 is deposited on the doped P-type microcrystalline silicon 6 side. During the deposition, the full-area TCO transparent conductive film 2 is deposited, that is, the area of the TCO covering the silicon wafer 5 is 100%, which can improve the battery conversion efficiency. A dense protective layer 7 is deposited on the laser-treated edge to prevent metal ions and water vapor from invading the amorphous / microcrystalline silicon layer of the battery. The TCO transparent conductive film 2 on the edge of the silicon wafer 5 is removed by laser to prevent the battery from short-circuiting up and down. When removing the edge TCO film by laser, the laser speed used is 10,000 - 30,000 mm / s, the laser frequency is 100 - 500 KHz, and the laser power percentage is 10% - 50%. By setting the protective layer 7, the exposed amorphous silicon 4 in the cross-section is avoided, ensuring the long-term reliability of the solar cell and solving the technical problems existing in the prior art ( Figure 2 ).

[0032] Example 2

[0033] In this embodiment, as a preferred embodiment of the present utility model, the specific structure is as Figure 1 shown. Based on Embodiment 1, the following improvements are disclosed. The protective layer 7 is silicon oxynitride, the thickness of the silicon oxynitride is 30 - 80 nm, a silicon nitride 8 is disposed outside the protective layer 7, the refractive index of the silicon nitride 8 is 1.9 - 2.2, the thickness of the silicon nitride 8 is 80 - 120 nm, the TCO transparent conductive film 2 is an indium tin oxide thin film doped with low indium, and the indium content of the indium tin oxide thin film doped with low indium is 40% - 50%. The silicon wafer 5 is an N-type silicon wafer, and the electrode 1 is a silver electrode.

[0034] Specific implementation steps for growing silicon oxynitride: Introduce nitrous oxide (N2O), the temperature is 200 - 300 °C, the flow rate is 2000 - 3000 sccm, the time is 100 - 300 s, the pressure is 1400 - 1800 mTor, and the RF power is 2000 - 3000 W. By setting the protective layer 7 as silicon oxynitride, metal ions can be prevented from invading the battery, ensuring the long-term reliability of the solar cell.

[0035] Specific implementation steps for growing silicon nitride 8: Introduce silane (SiH4) and ammonia (NH3), the temperature is 200 - 300 °C, the deposition time is 100 - 200 s, the pressure is 1600 - 1800 mTorr, the SiH4:NH3 flow rate ratio is 1:5 - 1:10, and the RF power is 2500 - 4000 W. By setting the silicon nitride 8, taking advantage of the strong ability of the silicon nitride 8 to block alkali ions, good hydrophobicity, and low pinhole density, making it extremely difficult for gases and water vapor to penetrate, while protecting the edge of the silicon wafer 5, the gas flow is adjusted to achieve the same color as the TCO transparent conductive film 2, achieving the purpose of appearance consistency.

[0036] Test Example

[0037] The TCO transparent conductive film is deposited over the entire area, and by protecting the silicon wafer edge with silicon oxynitride and silicon nitride, the problem of the reliability of the exposed amorphous silicon at the edge of the heterojunction cell is improved. For the heterojunction cell prepared by the present invention, when made into a solar module and subjected to a DH test (Damp heat test) according to the IEC 61215 standard (test conditions: temperature 85 °C, humidity 85%, time 1000 h), the reliability is better than that of the traditional process.

[0038]

[0039] When the area of the TCO transparent conductive film increases, the conversion efficiency (Eta) of the heterojunction cell increases by 0.1%, and the leakage current (Irev2) and the parallel resistance (Rsh) are not affected.

[0040]

[0041] The above are the implementation manners enumerated in this embodiment. However, this embodiment is not limited to the above optional implementation manners. Those skilled in the art can obtain many other implementation manners by arbitrarily combining the above manners. Anyone can obtain other various forms of implementation manners under the inspiration of this embodiment. The above specific implementation manners should not be construed as limiting the protection scope of this embodiment. The protection scope of this embodiment shall be subject to the definition in the claims, and the specification can be used to interpret the claims.

Claims

1. A heterojunction cell covered with a full-area TCO conductive film, characterized in that: The battery, from one side to the other side in sequence, is: electrode (1), TCO transparent conductive film (2), doped N-type microcrystalline silicon (3), amorphous silicon (4), silicon wafer (5), amorphous silicon (4), doped P-type microcrystalline silicon (6), TCO transparent conductive film (2) and electrode (1). A protective layer (7) is provided on the side of the battery, and the protective layer (7) covers from the TCO transparent conductive film (2) on one side to the TCO transparent conductive film (2) on the other side.

2. The heterojunction cell covered with a full-area TCO conductive film according to claim 1, wherein: The protective layer (7) is silicon oxynitride.

3. The heterojunction cell covered with a full-area TCO conductive film according to claim 2, characterized in that: The thickness of the silicon oxynitride is 30 - 80 nm.

4. A heterojunction cell covered with a full-area TCO conductive film according to any one of claims 1 to 3, characterized in that: A silicon nitride (8) is provided outside the protective layer (7).

5. The heterojunction cell covered with a full-area TCO conductive film according to claim 4, characterized in that: The refractive index of the silicon nitride (8) is 1.9 - 2.

2.

6. The heterojunction cell covered with a full-area TCO conductive film according to claim 4, wherein: The thickness of the silicon nitride (8) is 80 - 120 nm.

7. The heterojunction cell covered with a full-area TCO conductive film according to claim 6, wherein: The thickness of the silicon nitride (8) is 80 - 110 nm.

8. A heterojunction cell covered with a full-area TCO conductive film according to claim 1, characterized in that: The TCO transparent conductive film (2) is an indium-free tin oxide thin film or a low-indium tin-doped indium oxide thin film.

9. A heterojunction cell covered with a full-area TCO conductive film according to claim 1, wherein: The silicon wafer (5) is an N-type silicon wafer.

10. The heterojunction cell covered with a full-area TCO conductive film according to claim 1, characterized in that: The electrode (1) is a silver electrode.

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