Microstrip band elimination filter

Abstract

The utility model relates to the technical field of microwave communication, in particular to a microstrip band elimination filter, which comprises a low-pass filter circuit, a high-pass filter circuit, an integrated circuit and a controller. The output end of the low-pass filter circuit is connected with the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected with one input end of the integrated circuit, and the output end of the integrated circuit is set as a total output end; the two input ends of the integrated circuit are connected with the input end of the low-pass filter circuit, and a total input end is arranged at the node; the controller comprises a main control chip and a plurality of groups of control circuits, the input ends of the plurality of groups of control circuits are respectively connected with the output end of the main control chip, and the output ends of the plurality of groups of control circuits are respectively connected with the first control end and the second control end. According to the utility model, the technical problem that the existing band elimination filter is difficult to adapt to a complex and changeable signal environment due to a fixed band elimination range is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of microwave communication, and in particular, to a microstrip band-stop filter. Background Art

[0002] A band-stop filter is a specially designed filter that can effectively attenuate and suppress signal components within a specific frequency range to an extremely low level while allowing signals of most other frequencies to pass through smoothly. This type of filter has shown extensive application potential in multiple fields, including but not limited to communication systems, audio processing, and biomedical instruments. Especially in the field of satellite communication, since signals need to be transmitted over long distances and are faced with significant signal attenuation and potential interference during the process, extremely high requirements are imposed on the anti-interference ability of the signals. To meet these needs, the receiving and transmitting ends of satellite communication often need to be equipped with band-stop filters with a relatively wide stopband range to accurately filter out those unnecessary interference signals, thereby ensuring the stability of signal transmission and communication quality.

[0003] In existing band-stop filters, the stopband range of the band-stop filter is generally preset and fixed. This fixity greatly weakens the flexible adaptability of the filter to complex and changing signal environments. In practical applications, when the characteristics of the signal source or interference source change dynamically, the fixed cut-off frequency may not accurately cover or exclude these changing interference signals, resulting in a significant reduction in the filtering effect and making it difficult to meet the requirements of high-precision signal processing. Summary of the Utility Model

[0004] The purpose of this application is to provide a microstrip band-stop filter, which solves the technical problem that the existing band-stop filter is difficult to adapt to complex and changing signal environments due to its fixed stopband range.

[0005] To solve the above technical problems, the solution adopted in this application is as follows:

[0006] The utility model provides a microstrip band-stop filter, which is characterized in that it includes a low-pass filter circuit, a high-pass filter circuit, and an integration circuit; the output end of the low-pass filter circuit is connected to the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected to one input end of the integration circuit, and the output end of the integration circuit is set as the total output end; the second input end of the integration circuit is connected to the input end of the low-pass filter circuit, and a total input end is set at this node.

[0007] The low-pass filter circuit includes operational amplifier one and field-effect transistor one. The input terminal of the operational amplifier one serves as the input terminal of the low-pass filter circuit, and the output terminal serves as the output terminal of the low-pass filter circuit. The drain and source of the field-effect transistor one are respectively connected to the total input terminal and the positive input terminal of the operational amplifier one, and the gate of the field-effect transistor one is set as a control terminal.

[0008] The high-pass filter circuit includes operational amplifier two and field-effect transistor two. The positive input terminal of the operational amplifier two serves as the input terminal of the high-pass filter circuit, and the output terminal of the operational amplifier two serves as the output terminal of the high-pass filter circuit. The drain of the field-effect transistor two is connected to the positive input terminal of the operational amplifier two, the source of the field-effect transistor two is grounded, and the gate of the field-effect transistor two is set as a second control terminal.

[0009] The integration circuit includes operational amplifier three. The positive input terminal of the operational amplifier three serves as one input terminal of the integration circuit, the negative input terminal serves as the second input terminal of the integration circuit, and the output terminal serves as the output terminal of the integration circuit.

[0010] In some embodiments, the integration circuit further includes operational amplifier four. The output terminal of the high-pass filter circuit is connected to the positive input terminal of the operational amplifier three through the operational amplifier four.

[0011] In some embodiments, the integration circuit further includes operational amplifier five. The input terminal of the low-pass filter circuit is connected to the negative input terminal of the operational amplifier three through the operational amplifier five.

[0012] In some embodiments, a controller is further included. The controller includes a main control chip and multiple groups of control circuits. The input terminals of the multiple groups of control circuits are respectively connected to the output terminal of the main control chip, and the output terminals of the multiple groups of control circuits are respectively connected to a control terminal and a second control terminal.

[0013] In some embodiments, the control circuit includes a triode. The base of the triode serves as the input terminal of the control circuit, and the emitter of the triode is set as the output terminal and serves as the output terminal of the control circuit.

[0014] In some embodiments, the model of the main control chip is STM32F030K6T6.

[0015] The technical solution of this application has at least the following advantages and beneficial effects:

[0016] The utility model solves the technical problem that the existing band-stop filter is difficult to adapt to a complex and changeable signal environment due to a fixed band-stop range. In the utility model, a field-effect transistor and a resistor are combined to form an equivalent resistor whose resistance value can be adjusted. This equivalent resistor can adjust the cut-off frequency in the filter circuit, thereby realizing the dynamic change of the band-stop range and effectively improving the adaptability of the filter to different signal environments and the filtering effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is the circuit diagram of the band-stop filter of the utility model;

[0018] Figure 2 is the control circuit diagram of the utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0019] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present utility model.

[0020] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. If terms such as "center", "upper", "lower", "inner", "outer", etc. indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of this application is usually placed during use. It is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of this application. It should also be noted that unless otherwise clearly specified and limited, if terms such as "set", "installed", "connected" are understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific situations.

[0021] Embodiment 1

[0022] Please refer to Figure 1 - Figure 2, the present utility model provides a microstrip band-stop filter, which includes a low-pass filter circuit, a high-pass filter circuit, and an integration circuit; the output end of the low-pass filter circuit is connected to the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected to one input end of the integration circuit, and the output end of the integration circuit is set as the total output end; the second input end of the integration circuit is connected to the input end of the low-pass filter circuit, and the total input end is set at this node;

[0023] The low-pass filter circuit includes operational amplifier one and field effect transistor one. The input end of operational amplifier one serves as the input end of the low-pass filter circuit, and the output end serves as the output end of the low-pass filter circuit; the drain and source of field effect transistor one are respectively connected to the total input end and the positive input end of operational amplifier one, and the gate of field effect transistor one is set as a control end;

[0024] The high-pass filter circuit includes operational amplifier two and field effect transistor two. The positive input end of operational amplifier two serves as the input end of the high-pass filter circuit, and the output end of operational amplifier two serves as the output end of the high-pass filter circuit; the drain of field effect transistor two is connected to the positive input end of operational amplifier two, the source of field effect transistor two is grounded, and the gate of field effect transistor two is set as a second control end;

[0025] The integration circuit includes operational amplifier three. The positive input end of operational amplifier three serves as one input end of the integration circuit, the negative input end serves as the second input end of the integration circuit, and the output end serves as the output end of the integration circuit.

[0026] The integration circuit further includes operational amplifier four and operational amplifier five. The output end of the high-pass filter circuit is connected to the positive input end of operational amplifier three through operational amplifier four; the input end of the low-pass filter circuit is connected to the negative input end of operational amplifier three through operational amplifier five.

[0027] This embodiment further includes a controller, which includes a main control chip and multiple groups of control circuits. The input ends of the multiple groups of control circuits are respectively connected to the output end of the main control chip, and the output ends of the multiple groups of control circuits are respectively connected to a control end and a second control end;

[0028] The control circuit includes a triode. The base of the triode serves as the input end of the control circuit, and the emitter of the triode is set as the output end as the output end of the control circuit.

[0029] It should be noted that the model of the main control chip is STM32F030K6T6.

[0030] It should be noted that the working principle of the present utility model is as follows: the original signal first passes through a low-pass filter circuit and then through a high-pass filter circuit to obtain the interference signal range; then the original signal is used to subtract and integrate the interference signal range, and the integrated signal range is the required signal range without including the interference signal; the present utility model can change the cut-off frequency of the low-pass filter circuit or the high-pass filter circuit by the conduction condition of the field effect transistor, so as to adjust the bandwidth of the interference signal.

[0031] Furthermore, as Figure 1 shown, in this embodiment, the overall circuit includes operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U4, operational amplifier U5, field effect transistor Q1, field effect transistor Q2, triode Q3, resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, and capacitors C1, C2;

[0032] Among them, the low-pass filter circuit includes operational amplifier U1, field effect transistor Q1, resistors R1, R2, R3, R4, and capacitor C1; the high-pass filter circuit includes operational amplifier U2, field effect transistor Q2, resistors R5, R6, R7, R8, and capacitor C2; the integration circuit includes operational amplifiers U3, U4, U5, and resistors R9, R10, R12;

[0033] It should be explained that the functions of operational amplifier U4 and operational amplifier U5 are signal isolation.

[0034] Specifically, one end of resistor R1, one end of resistor R2, and one end of resistor R12 are connected, and an input terminal is set at this node, and this input terminal is called the UIN input terminal; the other end of resistor R2 is connected to the drain of field effect transistor Q1, and the source of field effect transistor Q1, the other end of resistor R1, one end of capacitor C1, and the positive input terminal of operational amplifier U1 are connected. The gate of field effect transistor Q1 is set as the control terminal, and this control terminal is called the con1 control terminal; the negative input terminal of operational amplifier U1, one end of resistor R3, and one end of resistor R4 are connected. The other end of resistor R3 is grounded, and the other end of resistor R4, the output terminal of operational amplifier U1, and one end of capacitor C2 are connected. Pin 5 of operational amplifier U1 is connected to the power supply; the other end of capacitor C2, one end of resistor R5, one end of resistor R6, and the positive input terminal of operational amplifier U2 are connected. The other end of resistor R5 is connected to the drain of field effect transistor Q2. The gate of field effect transistor Q2 is set as the control terminal, and this control terminal is called the con2 control terminal; capacitor C1, pin 2 of operational amplifier U1, the source of field effect transistor Q2, the other end of resistor R6, and pin 2 of operational amplifier U2 are connected and grounded; pin 5 of operational amplifier U2 is connected to the power supply. The negative input terminal of operational amplifier U2, one end of resistor R7, and one end of resistor R8 are connected. The other end of resistor R7 is grounded, and the other end of resistor R8, the output terminal of operational amplifier U2, and the positive input terminal of operational amplifier U4 are connected. Pin 5 of operational amplifier U4 is connected to the power supply and pin 2 is grounded. The negative input terminal of operational amplifier U4, the output terminal of operational amplifier U4, and one end of resistor R9 are connected. The other end of resistor R9, the negative input terminal of operational amplifier U3, and one end of resistor R11 are connected. Pin 5 of operational amplifier U3 is connected to the power supply and pin 2 is grounded; the other end of resistor R12 is connected to the positive input terminal of operational amplifier U5. Pin 5 of operational amplifier U5 is connected to the power supply and pin 2 is grounded. The negative input terminal of operational amplifier U5, the output terminal of operational amplifier U5, and one end of resistor R10 are connected. The other end of resistor R10 is connected to the positive input terminal of operational amplifier U3. The other end of resistor R11 is connected to the output terminal of operational amplifier U3, and an output terminal is set at this node, and its output terminal is called the UOUT output terminal.

[0035] It should be noted that the combination of field effect transistor Q1 and resistor R2 constitutes an equivalent resistor whose resistance value can be adjusted; the combination of field effect transistor Q2 and resistor R5 constitutes an equivalent resistor whose resistance value can be adjusted.

[0036] Furthermore, as Figure 2 shown, the control circuit includes triode Q3, resistors R13, R14;

[0037] Specifically, the base of the triode Q3 is set as the input terminal, which is called the in input terminal; one end of the resistor R13 is connected to the power supply, the other end of the resistor R13 is connected to the collector of the triode Q3, and the emitter of the triode Q3 is connected to one end of the resistor R14, and an output terminal is set here, which is called the out output terminal.

[0038] It should be noted that a control circuit needs to be configured for the low-pass filter circuit and the high-pass filter circuit respectively.

[0039] To facilitate the understanding of the present invention, the working process of the present invention will be described as follows:

[0040] The original signal is input into the band-stop filter from the UIN input terminal, and is successively processed by the low-pass filter circuit and the high-pass filter circuit to obtain an interference signal segment, and the interference signal segment is transmitted from the output terminal of the high-pass filter circuit to the integration circuit;

[0041] The interference signal segment is transmitted to the negative input terminal of the operational amplifier three U3 through the operational amplifier four U4. The positive input terminal of the operational amplifier three U3 receives the original signal, and at the same time, the original signal and the interference signal are subtracted to obtain the required signal segment;

[0042] The main control chip receives the instruction and outputs a PWM signal to the control circuit. After receiving the signal, the control circuit outputs a control signal to the low-pass filter circuit or the high-pass filter circuit to adjust the cut-off frequency of the low-pass filter circuit or the high-pass filter circuit, thereby changing the bandwidth range of the interference signal.

[0043] It should be noted that the main control chip outputs a PWM signal to the control circuit. The triode in the control circuit adjusts the conduction state according to the PWM signal, thereby changing the voltage magnitude output by the control circuit, and further adjusting the conduction state of the field effect transistor, and finally adjusting the cut-off frequency of the filter circuit to complete the adjustment of the bandwidth of the interference signal.

[0044] So far, the embodiments of the present invention have been described in detail. In order to avoid obscuring the concept of the present invention, some details well known in the art have not been described. Those skilled in the art can clearly understand how to implement the technical solutions of the present invention according to the above description. The scope of the present invention is defined by the appended claims.

Claims

1. A microstrip band-stop filter, characterized in that: It includes a low-pass filter circuit, a high-pass filter circuit, and an integration circuit; the output end of the low-pass filter circuit is connected to the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected to one input end of the integration circuit, and the output end of the integration circuit is set as the total output end; the two input ends of the integration circuit are connected to the input end of the low-pass filter circuit, and the total input end is set at this node. The low-pass filter circuit includes operational amplifier one and field effect transistor one. The input end of operational amplifier one serves as the input end of the low-pass filter circuit, and the output end serves as the output end of the low-pass filter circuit; the drain and source of field effect transistor one are respectively connected to the total input end and the positive input end of operational amplifier one, and the gate of field effect transistor one is set as a control end. The high-pass filter circuit includes operational amplifier two and field effect transistor two. The positive input end of operational amplifier two serves as the input end of the high-pass filter circuit, and the output end of operational amplifier two serves as the output end of the high-pass filter circuit; the drain of field effect transistor two is connected to the positive input end of operational amplifier two, the source of field effect transistor two is grounded, and the gate of field effect transistor two is set as a second control end. The integration circuit includes operational amplifier three. The positive input end of operational amplifier three serves as one input end of the integration circuit, the negative input end serves as the two input ends of the integration circuit, and the output end serves as the output end of the integration circuit.

2. The microstrip bandstop filter according to claim 1, characterized in that, The integration circuit further includes operational amplifier four. The output end of the high-pass filter circuit is connected to the positive input end of operational amplifier three through operational amplifier four.

3. A microstrip bandstop filter according to claim 1, characterized in that, The integration circuit further includes operational amplifier five. The input end of the low-pass filter circuit is connected to the negative input end of operational amplifier three through operational amplifier five.

4. A microstrip bandstop filter according to claim 1, wherein It further includes a controller, which includes a main control chip and multiple control circuits. The input ends of the multiple control circuits are respectively connected to the output end of the main control chip, and the output ends of the multiple control circuits are respectively connected to a control end and a second control end.

5. A microstrip band-stop filter according to claim 4, characterized in that, The control circuit includes a triode. The base of the triode serves as the input end of the control circuit, and the emitter of the triode is set with an output end as the output end of the control circuit.

6. A microstrip bandstop filter according to claim 4, wherein The model of the main control chip is STM32F030K6T6.

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