LDO protection circuit

Abstract

The utility model discloses an LDO (Low Dropout Regulator) protection circuit, which belongs to the field of integrated circuit design and is characterized in that a power supply anode is electrically connected with one end of a first resistor, the other end of the first resistor is electrically connected with an E end of a second triode, and a B end of the second triode is electrically connected with one end of a second resistor; the other end of the second resistor is electrically connected with the negative electrode of the power source and the grounding terminal, the C end of the second triode is electrically connected with one end of the third resistor, the other end of the third resistor is electrically connected with the input end of the three-terminal voltage stabilizer, and the grounding end of the three-terminal voltage stabilizer is electrically connected with the grounding terminal. The output end of the three-terminal voltage stabilizer is electrically connected with one end of the fourth resistor, and the other end of the fourth resistor is electrically connected with the grounding end of the three-terminal voltage stabilizer. The circuit of the LDO is effectively protected under the condition that the input and output voltage difference is large, and the safety and the stability of the LDO under the condition are improved.

Description

Technical Field

[0001] The utility model discloses an LDO protection circuit, belonging to the field of integrated circuit design. Background Art

[0002] Traditional fuel vehicles require approximately 300 to 500 chips, while new energy vehicles require significantly more, exceeding 1,000 chips per vehicle, with high-end new energy vehicles exceeding 3,000. The chip's power supply typically utilizes a switching power supply and LDO for stable power supply. LDOs (low dropout regulators) are widely used in electronic circuits such as portable electronics, communications equipment, and computer systems due to their simple structure and low output ripple.

[0003] Generally speaking, switching power supplies are suitable for circuits with high power and large input-output voltage differentials, while LDOs are suitable for circuits with lower power and smaller voltage differentials. However, in some applications, such as those with large input-output voltage differentials and special requirements for output ripple, switching power supplies are not suitable. Therefore, LDOs must be able to function properly under these large input-output voltage differentials. Consequently, the majority of the power dissipated by this voltage differential is dissipated by the LDO, significantly increasing the risk of LDO overheating and affecting system operation. Therefore, designing a circuit that can effectively protect LDOs under these special conditions is crucial. Utility Model Content

[0004] The utility model aims to solve the problem that most of the power consumption caused by the existing voltage difference is consumed by the LDO, which greatly increases the possibility of LDO overheating and affects the normal operation of the system. An LDO protection circuit is proposed.

[0005] The problem to be solved by the present invention is achieved by the following technical solutions:

[0006] An LDO protection circuit includes a positive electrode of a power supply electrically connected to one end of a first resistor, the other end of the first resistor electrically connected to the E end of a second transistor, the B end of the second transistor electrically connected to one end of the second resistor, the other end of the second resistor electrically connected to the negative electrode of the power supply and a ground terminal, respectively, the C end of the second transistor electrically connected to one end of a third resistor, the other end of the third resistor electrically connected to the input end of a three-terminal regulator, the ground end of the three-terminal regulator electrically connected to the ground terminal, the output end of the three-terminal regulator electrically connected to one end of a fourth resistor, and the other end of the fourth resistor electrically connected to the ground end of the three-terminal regulator.

[0007] Preferably, it further includes a first transistor, wherein the E end of the first transistor is electrically connected to the positive pole of the power supply, the C end of the first transistor is electrically connected to one end of the second resistor, and the B end of the first transistor is electrically connected to the other end of the first resistor.

[0008] The present invention has the following beneficial effects compared with the existing ones:

[0009] The utility model discloses an LDO protection circuit, which effectively protects the LDO circuit under the condition of large input-output voltage difference, thereby improving the safety and stability of the LDO under this condition. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a working diagram of the first embodiment of an LDO protection circuit of the utility model.

[0011] Figure 2 This is a working diagram of the second embodiment of an LDO protection circuit of the present utility model.

[0012] Figure 3 This is a working diagram of the third embodiment of an LDO protection circuit of the utility model. DETAILED DESCRIPTION

[0013] The following is based on the attached Figure 1-3 The utility model is further described as follows:

[0014] The following is a clear and complete description of the technical solution of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0015] In the description of the present invention, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they cannot be understood as limitations on the present invention.

[0016] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on the specific circumstances.

[0017] like Figure 1 As shown, the first embodiment of the present invention provides an LDO protection circuit based on the prior art, which is characterized in that it includes an electrical connection between the positive electrode of the power supply V1 and one end of the first resistor R1, the other end of the first resistor R1 is electrically connected to the E end of the second transistor Q2, the B end of the second transistor Q2 is electrically connected to one end of the second resistor R2, the other end of the second resistor R2 is electrically connected to the negative electrode of the power supply V1 and the ground terminal respectively, the C end of the second transistor Q2 is electrically connected to one end of the third resistor R3, the other end of the third resistor R3 is electrically connected to the input end of the three-terminal regulator U1, the ground end of the three-terminal regulator U1 is electrically connected to the ground terminal, the output end of the three-terminal regulator U1 is electrically connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is electrically connected to the ground end of the three-terminal regulator U1.

[0018] In this embodiment, the input voltage of the power supply V1 is 15V (±5%) or 18V (±5%), that is, the input voltage limit range is 14.25V~18.9V, the power circuit is a chip, the output is rated 5V, the maximum load is about 35mA, and the three-terminal voltage regulator U1 uses a 7805 three-terminal voltage regulator.

[0019] Thus, Figure 1 As shown, in the light load state, the b-pole of the second transistor Q2 is grounded through the second resistor R2, and the second transistor Q2 is turned on. At this time, the main current flows from the first resistor R1 → the second transistor Q2 → the third resistor R3 → the three-terminal regulator U1 (LDO) → the fourth resistor R4 (load).

[0020] This embodiment further includes a first transistor Q1, wherein the E terminal of the first transistor Q1 is electrically connected to the positive electrode of the power supply V1, the C terminal of the first transistor Q1 is electrically connected to one end of the second resistor R2, and the B terminal of the first transistor Q1 is electrically connected to the other end of the first resistor R1.

[0021] Therefore, when the load gradually increases to the critical current-limiting state, assuming load R4 ≈ 145.5Ω, 34.4mA, the current in first resistor R1 increases, increasing the voltage drop across it. The emitter of first transistor Q1 becomes forward-biased, and current flows from first transistor Q1 into second resistor R2, causing second transistor Q2 to enter the amplification region. This means that the current supplied to three-terminal regulator U1 through third resistor R3 begins to be limited, causing the input voltage of three-terminal regulator U1 to drop. However, this does not affect the output of three-terminal regulator U1. In this mode, the power consumption of three-terminal regulator U1 is reduced.

[0022] When the load continues to increase, such as Figure 3 As shown, the front-stage circuit enters the constant current mode. When the load is short-circuited, the voltage drops, thereby protecting the three-terminal regulator U1.

[0023] The current limiting circuit disclosed in this embodiment is only suitable for protection control of circuits with low current limiting accuracy, and a temperature compensation circuit can also be added to perform precise control.

[0024] Although the embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and exemplary embodiments. They can be applied to a variety of fields suitable for the present invention. Further modifications will be readily apparent to those skilled in the art. Therefore, the present invention is not limited to the specific details and illustrations shown and described herein without departing from the general concept defined by the claims and their equivalents.

Claims

1. An LDO protection circuit, characterized in that: The invention comprises a circuit electrically connected to the positive electrode of a power supply (V1) and one end of a first resistor (R1), the other end of the first resistor (R1) is electrically connected to the E end of a second transistor (Q2), the B end of the second transistor (Q2) is electrically connected to one end of a second resistor (R2), the other end of the second resistor (R2) is electrically connected to the negative electrode of the power supply (V1) and a ground terminal, the C end of the second transistor (Q2) is electrically connected to one end of a third resistor (R3), the other end of the third resistor (R3) is electrically connected to the input end of a three-terminal voltage regulator (U1), the ground end of the three-terminal voltage regulator (U1) is electrically connected to the ground terminal, the output end of the three-terminal voltage regulator (U1) is electrically connected to one end of a fourth resistor (R4), and the other end of the fourth resistor (R4) is electrically connected to the ground end of the three-terminal voltage regulator (U1).

2. The LDO protection circuit according to claim 1, wherein: The device further comprises a first transistor (Q1), wherein the E end of the first transistor (Q1) is electrically connected to the positive electrode of the power supply (V1), the C end of the first transistor (Q1) is electrically connected to one end of the second resistor (R2), and the B end of the first transistor (Q1) is electrically connected to the other end of the first resistor (R1).

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