Solid time delay relay

Abstract

The utility model relates to the technical field of relays, in particular to a solid time-delay relay. Comprising a power supply circuit, a control circuit, a drive control circuit, an isolation circuit and a drive circuit. The circuit is characterized in that the power supply circuit inputs voltage to the control circuit and the isolation circuit, and a control signal of the control circuit is connected to the driving circuit through the isolation circuit; the driving circuit comprises an NMOS tube, and a protection circuit of the driving circuit comprises a diode V6 and a transient suppression diode V5. According to the utility model, the transient voltage is subjected to clamping control through the transient suppression diode V5, and the diode V6 is connected with the drain electrode of the NMOS tube V4 to prevent reverse connection of a load, so that the purpose of avoiding circuit damage is achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of relays, in particular to a solid time-delay relay. Background Art

[0002] Solid-state time delay relays are an important type of time relay, widely used in aviation, aerospace, shipbuilding, weapons, rail transportation, and other fields. In addition to varying time durations, solid-state time delay relays also offer different functional types, including action delay, release delay, time limit, and repeat cycle time.

[0003] The control signal of a solid-state time-delay relay usually controls the output of a drive circuit through an isolation circuit. However, during operation, the drive circuit is at risk of being damaged by excessive transient voltage or reverse load connection. Utility Model Content

[0004] The purpose of the utility model is to provide a solid-state time delay relay, which clamps the transient voltage through the transient suppression diode V5 and connects the drain of the NMOS tube V4 through the diode V6 to prevent the load from being reversed, thereby achieving the purpose of avoiding circuit damage.

[0005] In a first aspect, the utility model provides a solid-state time delay relay, comprising: a power supply circuit, a control circuit, an isolation circuit, and a drive circuit; characterized in that: the power supply circuit provides input voltage to the control circuit and the isolation circuit, and the control signal of the control circuit is connected to the drive circuit through the isolation circuit; the drive circuit includes an NMOS transistor V4, and the OUT1 port and OUT2 port of the drive circuit are respectively connected to the drain and source of the NMOS transistor V4; the positive isolated output port of the isolation circuit is connected to the gate of the NMOS transistor V4, and the common end of the source of the NMOS transistor V4 and the OUT2 port is connected to the negative isolated output port of the isolation circuit;

[0006] The protection circuit of the drive circuit includes a diode V6 and a transient suppression diode V5; the anode of the diode V6 is connected to the OUT1 port, the cathode of the diode V6 is connected to the drain of the NMOS transistor V4, the common end of the cathode of the diode V6 and the drain of the NMOS transistor V4 is connected to the first port of the transient suppression diode V5, and the second port of the transient suppression diode V5 is connected between the source of the NMOS transistor V4 and the common end of the OUT2 port and the OUT2 port.

[0007] Optionally, the power supply circuit includes: a Zener diode V2, a resistor R1, an NPN transistor V1, and a linear regulator; the positive electrode of the Zener diode V2 is used to connect to the negative electrode of the external system power supply, the negative electrode of the Zener diode V2 is connected to the base of the NPN transistor V1, and the collector of the NPN transistor V1 is used to connect to the positive electrode of the external system power supply; the resistor R1 is connected between the collector and the base of the NPN transistor V1; the emitter of the NPN transistor V1 is connected to the second input port of the isolation circuit, which is the input voltage of the isolation circuit; the emitter of the NPN transistor V1 is also connected to the input port of the linear regulator, and the output port of the linear regulator is the input voltage of the control circuit.

[0008] Optionally, the voltage of the system power supply is 5V-60V, and the voltage of the output port of the linear regulator is 3.3V.

[0009] Optionally, the control circuit includes a microcontroller for outputting a control signal; the control signal of the control circuit is connected to the isolation circuit via a drive control circuit.

[0010] Optionally, it also includes a drive control circuit, which includes a resistor R3, an NPN transistor V3, and a resistor R2; the control signal is connected to the base of the NPN transistor V3 through the resistor R3; the emitter of the NPN transistor V3 is grounded, and the collector of the NPN transistor V3 is connected to the first input port of the isolation circuit through the resistor R2.

[0011] Optionally, the resistor R3 is 3.3 kΩ.

[0012] Optionally, the microcontroller leads to a JTAG pin, a TXD pin, a RXD pin and a CTRL pin; the JTAG pin is used for program burning and upgrading, the TXD pin and the RXD pin are used for external interactive communication, and the CTRL pin is used for outputting a control signal.

[0013] Optionally, the isolation circuit comprises a photovoltaic isolator.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] 1. The utility model controls the transient voltage by clamping it through a protection circuit, and at the same time connects the drain of the NMOS tube V4 through a diode V6 to prevent the load from being reversely connected and damaging the circuit.

[0016] 2. The TXD pin and RXD pin of the microcontroller in the utility model can be used for human-computer interaction, which can not only realize the online modification and setting of the delay time of the solid-state delay relay, but also directly set and modify different types of relay delays on site, such as action delay, release delay, time limit timing, cycle delay, etc.

[0017] 3. The power supply circuit in the present invention can provide power supply voltage for the isolation module and the microcontroller at the same time, wherein the power supply circuit can provide a converted low-voltage power supply for the microcontroller alone. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a principle block diagram of the solid-state time delay relay in this utility model;

[0019] Figure 2 This is a circuit diagram of the power supply circuit in the present utility model;

[0020] Figure 3 This is a circuit diagram of the control circuit and the drive control circuit in the utility model;

[0021] Figure 4 This is a circuit diagram of the isolation circuit in the present utility model;

[0022] Figure 5 This is a circuit diagram of the driving circuit and protection circuit in the utility model. DETAILED DESCRIPTION Example 1

[0023] Combine Figure 1 This embodiment provides a solid-state time delay relay, which includes: a power supply circuit, a control circuit, a drive control circuit, an isolation circuit, and a drive circuit; the power supply circuit inputs voltage to the control circuit and the isolation circuit, and the control signal of the control circuit is connected to the drive circuit through the drive control circuit and the isolation circuit;

[0024] The power supply circuit includes: a Zener diode V2, a resistor R1, an NPN transistor V1, and a linear regulator; the positive electrode of the Zener diode V2 is used to connect to the negative electrode of the external system power supply, the negative electrode of the Zener diode V2 is connected to the base of the NPN transistor V1, and the collector of the NPN transistor V1 is used to connect to the positive electrode of the external system power supply; the resistor R1 is connected between the collector and the base of the NPN transistor V1; the emitter of the NPN transistor V1 is connected to the second input port of the isolation circuit, and inputs voltage to the isolation circuit; the emitter of the NPN transistor V1 is also connected to the input port of the linear regulator, the output port of the linear regulator is the input voltage of the control circuit, and the ground port of the linear regulator is grounded.

[0025] This embodiment adopts a two-stage voltage stabilization design to supply the 5V~60V system power to the isolation circuit and the control circuit respectively. In this embodiment, the control circuit is a microcontroller, such as Figure 2 As shown, the system power supply first stabilizes the voltage through the voltage regulator diode V2, and then the V BE After reaching the on-state voltage, the voltage is input to pin 2 of the isolation circuit N1 as the input port. Furthermore, after a second stage of voltage regulation by a linear regulator, the voltage is input to the microcontroller to generate the 3.3V power supply voltage required by the microcontroller.

[0026] Combine Figure 3 The control circuit includes a microcontroller for outputting a control signal. In this embodiment, a microcontroller with an undervoltage protection function is selected. When the input voltage value of the microcontroller is less than a set threshold, the microcontroller is reset to protect the microcontroller.

[0027] This embodiment uses a low-power microcontroller model, taking into account both economical considerations and demand. The microcontroller includes a general-purpose input / output (GPIO) interface, a communication interface, and a program programming interface. The GPIO interface can be configured as a control interface or a data interface, depending on the requirements. The microcontroller in this embodiment is an existing product, and the specific circuitry is not described in detail here.

[0028] The microcontroller has JTAG pins, TXD pins, RXD pins and CTRL pins; the JTAG pins are used for program burning and upgrading, the TXD pins and RXD pins are used for human-computer interaction to set and change the delay type and delay duration, and the CTRL pin is used to output control signals.

[0029] After the microcontroller is powered on, the internal program runs and generates the required delay signal and control type. The signal controls the power-on timing of pin 1 of the isolation circuit N1 through the drive control circuit, thereby achieving the output end of the control isolation circuit N1 ( Figure 4 The purpose of the status of pins 3 and 4, which serve as the positive isolated output port and negative isolated output port respectively.

[0030] Specifically, this embodiment extracts the delay type, adjustable delay, and fixed delay in the delay requirements into key fields such as delay mode, delay period, and duty cycle, and designs a delay program with key fields as parameters. By inputting the relevant parameters of the key fields through the communication interface, the delay output result of the program can be changed to make the output result consistent with the requirements.

[0031] The JTAG port of the microprocessor in this project allows direct modification of the relay source code, enabling online programmability and program upgrades. The program defaults to a power-on delay of 0.5s, and function modifications can be achieved through the agreed communication protocol.

[0032] In order to reduce the impact of temperature changes on delay accuracy, this embodiment uses the temperature sensor integrated inside the microcontroller to calibrate the delay time and design temperature compensation through software algorithms, which greatly improves the delay time accuracy and consistency, and can achieve high-precision delay function.

[0033] The typical output current of a single pin of the microcontroller selected in this embodiment needs to be less than 25mA, and the typical pin voltage is 3.3V. A 3.3kΩ resistor R3 is connected in series between the CTRL pin of the microcontroller and the base of the NPN transistor V3 controlled by the driver. Theoretically, the output current of the microcontroller output pin is 1mA, which is far less than the design requirement of 25mA.

[0034] Solid-state relays require input and output isolation. Common isolation methods include photovoltaic isolation and transformer isolators (magnetic isolators). Photovoltaic isolation offers excellent resistance to electromagnetic interference. This embodiment uses a photovoltaic isolator, which is an existing product. The following describes the operating principle of isolation circuit N1:

[0035] Combine Figure 4 The output side of the isolation circuit N1 forms a floating power supply, and the positive isolated output port and the negative isolated output port of the isolation circuit N1 are the positive and negative poles of the floating power supply respectively. Figure 4 Pins 3 and 4 of N1 are respectively the negative and positive poles of the floating power supply.

[0036] Isolation circuit N1 includes a light-emitting diode (LED) and a photocell. The LED's anode is connected to pin 2 of isolation circuit N1, while the LED's cathode is connected to pin 1 of isolation circuit N1. The photocell converts light energy generated by the LED into electrical energy, forming a floating power supply on the output side of isolation circuit N1. Specifically, an input DC voltage passes through the LED's carrier, converting electrical energy into light energy. Through physical isolation, the converted light energy is irradiated onto the photocell. Upon receiving light, the photocell converts the light energy into electrical energy to drive the subsequent NMOS transistor.

[0037] Combine Figure 5 The driving circuit includes an NMOS tube, and the OUT1 port and OUT2 port of the driving circuit are respectively connected to the drain and source of the NMOS tube; the positive isolated output port of the isolation circuit N1 is connected to the gate of the NMOS tube, and the source of the NMOS tube and the common end of the OUT2 port are connected to the negative isolated output port of the isolation circuit N1.

[0038] The output of the solid-state relay in this embodiment is a normally open DC output. A field-effect transistor is selected as the output driver stage of the product according to the rated output current of the solid-state relay.

[0039] In this embodiment, the isolation circuit N1 uses a photovoltaic optocoupler. The output voltage of the floating power supply on the output side of the isolation circuit N1 can cover the turn-on voltage of the field effect transistor chip. In this embodiment, an NMOS tube (N-channel enhancement mode field effect transistor) is selected as the output circuit. The characteristics of the NMOS tube are that V GS The gate voltage is higher than the threshold voltage, the source and drain are turned on, and the gate and source voltage V GS Below the threshold voltage, the source and drain are turned off.

[0040] When the MOS tube is turned on, the current can flow from the OUT1 terminal to the OUT2 terminal.

[0041] Combine Figure 5 The protection circuit of the drive circuit includes a diode V6 and a transient suppression diode V5; the anode of the diode V6 is connected to the OUT1 port, the cathode of the diode V6 is connected to the drain of the NMOS transistor, the common end of the cathode of the diode V6 and the drain of the NMOS transistor is connected to the first port of the transient suppression diode V5, and the second port of the transient suppression diode V5 is connected between the OUT2 port and the common end of the source of the NMOS transistor and the OUT2 port.

[0042] In order to meet the output load current index requirements, according to the comprehensive analysis of device parameters, Figure 5 The reverse breakdown voltage range of TVS diode V5 meets the transient voltage suppression requirements, allowing transient voltages to be clamped and controlled by TVS diode V5. Furthermore, diode V6's anode is connected to the OUT1 port, and its cathode is connected to the drain of NMOS transistor V4, preventing damage to the drive circuit caused by reverse load connection. Example 2

[0043] This embodiment differs from Example 1 in that the drive control circuit includes a resistor R3, an NPN transistor V3, and a resistor R2; the control signal is connected to the base of the NPN transistor V3 via resistor R3; the emitter of the NPN transistor V3 is grounded, and the collector of the NPN transistor V3 is connected to pin 1 of the isolation circuit N1, which serves as the first input port, via resistor R2. This embodiment utilizes the gain of the NPN transistor V3 to increase the collector output voltage of the NPN transistor V3 to match the voltage difference between the microcontroller and the isolation circuit. In this embodiment, the resistor R3 is 3.3 kΩ.

[0044] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more. In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0045] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention.

Claims

1. A solid-state time delay relay comprising: A power supply circuit, a control circuit, an isolation circuit, and a drive circuit; characterized in that: the power supply circuit provides input voltage to the control circuit and the isolation circuit, and the control signal of the control circuit is connected to the drive circuit through the isolation circuit; the drive circuit includes an NMOS transistor V4, and the OUT1 port and OUT2 port of the drive circuit are respectively connected to the drain and source of the NMOS transistor V4; the positive isolated output port of the isolation circuit is connected to the gate of the NMOS transistor V4, and the common end of the source of the NMOS transistor V4 and the OUT2 port is connected to the negative isolated output port of the isolation circuit; The protection circuit of the drive circuit includes a diode V6 and a transient suppression diode V5; the anode of the diode V6 is connected to the OUT1 port, the cathode of the diode V6 is connected to the drain of the NMOS transistor V4, the common end of the cathode of the diode V6 and the drain of the NMOS transistor V4 is connected to the first port of the transient suppression diode V5, and the second port of the transient suppression diode V5 is connected between the source of the NMOS transistor V4 and the common end of the OUT2 port and the OUT2 port.

2. A solid-state time delay relay according to claim 1, characterized in that: The power supply circuit includes: a voltage regulator diode V2, a resistor R1, an NPN transistor V1, and a linear voltage regulator; the positive electrode of the voltage regulator diode V2 is used to connect to the negative electrode of the external system power supply, the negative electrode of the voltage regulator diode V2 is connected to the base of the NPN transistor V1, and the collector of the NPN transistor V1 is used to connect to the positive electrode of the external system power supply; the resistor R1 is connected between the collector and base of the NPN transistor V1; the emitter of the NPN transistor V1 is connected to the second input port of the isolation circuit, providing input voltage to the isolation circuit; the emitter of the NPN transistor V1 is also connected to the input port of the linear voltage regulator, and the output port of the linear voltage regulator is the input voltage to the control circuit.

3. A solid-state time delay relay according to claim 2, characterized in that: The voltage of the system power supply is 5V-60V, and the voltage of the output port of the linear regulator is 3.3V.

4. A solid-state time delay relay according to claim 1, characterized in that: The control circuit includes a microcontroller for outputting a control signal; the control signal of the control circuit is connected to the isolation circuit via a drive control circuit.

5. A solid-state time delay relay according to claim 4, characterized in that: It also includes a drive control circuit, which includes a resistor R3, an NPN transistor V3, and a resistor R2; the control signal is connected to the base of the NPN transistor V3 through the resistor R3; the emitter of the NPN transistor V3 is grounded, and the collector of the NPN transistor V3 is connected to the first input port of the isolation circuit through the resistor R2.

6. A solid-state time delay relay according to claim 5, characterized in that: The resistor R3 is 3.3 kΩ.

7. The solid-state time delay relay according to claim 5, characterized in that: The microcontroller leads to a JTAG pin, a TXD pin, a RXD pin and a CTRL pin; the JTAG pin is used for program burning and upgrading, the TXD pin and the RXD pin are used for interactive communication with the outside, and the CTRL pin is used for outputting a control signal.

8. The solid-state time delay relay according to claim 1, characterized in that: The isolation circuit includes a photovoltaic isolator.

Images