Miniature point-to-point control unit based on chip special for electronic detonator

Abstract

The utility model discloses a miniature point-to-point control unit based on a chip special for an electronic detonator. The miniature point-to-point control unit comprises a micro-control unit, a sampling unit, a first MOS (Metal Oxide Semiconductor) unit, a second MOS unit, a third MOS unit and a fourth MOS unit, the first MOS unit, the second MOS unit, the third MOS unit and the fourth MOS unit are respectively controlled through the micro-control unit, positive voltage or negative voltage is controlled to be formed between the first bus output and the second bus output, communication waveforms are generated, communication is achieved, and the circuit has the technical advantages of being low in power consumption, high in communication speed, low in cost, small in size and the like.

Description

Technical Field

[0001] The utility model relates to the field of electronic circuit control, in particular to a micro point-to-point control unit based on a special chip for electronic detonators. Background Art

[0002] Currently, H-bridges are commonly used in electronic detonator applications to control bus communication. Specifically, an H-bridge consists of four switches, which can be transistors (such as MOSFETs or IGBTs), relays, or other types of switches. When different switch combinations are activated, they change the polarity of the output voltage to control the communication waveform.

[0003] H-bridge communication circuits are generally divided into two categories: one using an H-bridge integrated IC, and the other using a circuit built with common switching devices. Both have advantages and disadvantages, which are briefly described below.

[0004] While commonly used H-bridge ICs are highly integrated and compact, they suffer from slow polarity switching speeds and are not suitable for high-speed communication environments. Most H-bridge ICs are unsuitable for devices requiring low power due to their small size and poor heat dissipation, resulting in high power consumption.

[0005] H-bridge communication circuits constructed with commonly used switching devices are complex, relatively low-cost, and offer fast polarity switching, making them suitable for most high-speed communication environments. However, the large number of components occupies more space on the PCB design, resulting in a larger overall PCB size and indirectly increasing costs.

[0006] With the rapid development and continuous iteration of electronic detonators, there are more and more application scenarios such as low power consumption, high-speed communication, low cost, and small size. However, the above two solutions are not applicable. Therefore, there is an urgent need to design a control solution that can achieve low power consumption, high-speed communication, low cost, and small size. Utility Model Content

[0007] In view of the above-mentioned defects of the prior art, the purpose of the present invention is to provide a miniature point-to-point control unit based on a dedicated chip for electronic detonators, which has the technical advantages of low power consumption, high-speed communication, low cost and small size.

[0008] The purpose of this utility model is achieved through such technical solution:

[0009] A micro point-to-point control unit based on a dedicated chip for electronic detonators, comprising:

[0010] microcontrol unit;

[0011] The sampling unit has a current input terminal electrically connected to the negative electrode of the power supply, a sampling output terminal electrically connected to the micro control unit, and transmits sampling information to the micro control unit;

[0012] A first MOS unit, wherein the current input terminal is electrically connected to the positive electrode of the power supply, the current output terminal is electrically connected to the second bus output, and the control terminal is electrically connected to the micro control unit;

[0013] a second MOS unit, wherein the current input end is electrically connected to the current output end of the sampling unit, the current output end is electrically connected to the second bus output, and the control end is electrically connected to the micro control unit;

[0014] a third MOS unit, wherein the current input terminal is electrically connected to the positive electrode of the power supply, the current output terminal is electrically connected to the first bus output, and the control terminal is electrically connected to the micro control unit;

[0015] The fourth MOS unit has a current input terminal electrically connected to the current output terminal of the sampling unit, a current output terminal electrically connected to the first bus output, and a control terminal electrically connected to the micro control unit.

[0016] Furthermore, the sampling unit includes:

[0017] A first sampling circuit, wherein the current output terminal is grounded, the current input terminal is electrically connected to the current input terminals of the second MOS unit and the fourth MOS unit via a 19th resistor, and the collection terminal is electrically connected to the micro control unit;

[0018] A second sampling circuit, wherein the current output terminal is grounded, the current input terminal is electrically connected to the current input terminals of the second MOS unit and the fourth MOS unit via a 20th resistor, and the collection terminal is electrically connected to the micro control unit;

[0019] The first sampling circuit and the second sampling circuit have the same circuit structure;

[0020] The resistance of the 19th resistor is 1K, and the resistance of the 20th resistor is 10R.

[0021] Furthermore, the first sampling circuit includes:

[0022] an enhancement mode NMOS transistor Q12, having a source connected to ground, a drain electrically connected to the nineteenth resistor, and a gate electrically connected to the micro control unit;

[0023] The 28th resistor has two ends electrically connected to the source and gate of the enhancement-mode NMOS transistor Q12 respectively; the resistance of the 28th resistor is 10K.

[0024] Furthermore, the first MOS unit includes:

[0025] An NMOS component circuit, wherein the current input terminal is grounded and the control terminal is electrically connected to the micro control unit;

[0026] The PMOS component circuit has a current input terminal electrically connected to the positive pole of the power supply, a current output terminal electrically connected to the second bus output, and a control terminal electrically connected to the current output terminal of the NMOS component circuit.

[0027] Furthermore, the NMOS component circuit includes:

[0028] Enhanced NMOS transistor Q3, with a source connected to the ground, a drain electrically connected to the control terminal of the PMOS component circuit, and a gate electrically connected to the micro control unit;

[0029] The fourth resistor has two ends electrically connected to the source and gate of the enhancement-mode NMOS transistor Q3 respectively; the resistance of the fourth resistor is 10K.

[0030] Furthermore, the PMOS component circuit includes:

[0031] Enhanced PMOS tube Q1, the source is electrically connected to the positive electrode of the power supply;

[0032] A fifth resistor, both ends of which are electrically connected to the gate of the enhancement mode PMOS transistor Q1 and the current output terminal of the NMOS component circuit respectively; the resistance of the fifth resistor is 10K;

[0033] The first resistor has two ends electrically connected to the positive electrode of the power supply and the gate of the enhancement mode PMOS transistor Q1 respectively; the resistance of the first resistor is 10K;

[0034] The eighth resistor has two ends electrically connected to the second bus output and the drain of the enhancement-mode PMOS transistor Q1 respectively. The resistance of the eighth resistor is 1R.

[0035] Furthermore, the circuit structure of the second MOS unit is the same as the circuit structure of the third MOS unit, and the current output end of the PMOS component circuit in the third MOS unit is electrically connected to the first bus output.

[0036] Furthermore, the second MOS unit includes:

[0037] Enhanced NMOS transistor Q6, with a source electrically connected to the current output terminal of the sampling unit, a drain electrically connected to the second bus output, and a gate electrically connected to the micro control unit;

[0038] a 14th resistor, one end of which is grounded, and the other end of which is electrically connected to the gate of the enhancement-mode NMOS transistor Q6; the resistance of the 14th resistor is 10K;

[0039] A twelfth resistor has one end grounded and the other end electrically connected to the gate of the enhancement-mode NMOS transistor Q6 ; the resistance of the twelfth resistor is 10K.

[0040] Furthermore, the circuit structure of the fourth MOS unit is the same as the circuit structure of the second MOS unit; the drain of the enhancement mode NMOS transistor in the fourth MOS unit is electrically connected to the first bus output.

[0041] Furthermore, the current output terminal of the first MOS unit and the current output terminal of the second MOS unit are electrically connected to the second bus output through a tenth resistor; the resistance of the tenth resistor is 10R;

[0042] The current output end of the third MOS unit and the current output end of the fourth MOS unit are electrically connected to the first bus output through a ninth resistor; the resistance value of the ninth resistor is 10R.

[0043] Due to the adoption of the above technical solution, the utility model has the following advantages:

[0044] 1. The main control chip (microcontroller unit) logically controls the on / off switching of each MOS unit to achieve polarity switching between the first bus output (A) and the second bus output (B), outputting the corresponding communication protocol waveform. Each MOS unit is a MOS transistor at its core. The turn-off time of a single MOS transistor is typically in the nanosecond range, resulting in fast polarity switching, enabling high-speed communication. Furthermore, the compact size of the MOS transistor allows for a smaller control unit. Furthermore, the low unit price and power consumption of MOS transistors contribute to low cost and energy consumption for the entire control unit.

[0045] 2. The current value of the current connected to the load is accurately collected by the sampling unit, so that the status of the electronic detonator can be accurately monitored.

[0046] Other advantages, objectives and features of the present invention will be described in part in the following description and will be apparent to those skilled in the art based on an examination of the following or may be learned from the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The accompanying drawings of the present invention are as follows:

[0048] Figure 1 This is a functional diagram of the application of a micro point-to-point control unit based on a dedicated chip for electronic detonators in this embodiment.

[0049] Figure 2 This is a schematic diagram of the bus output switching principle of a micro point-to-point control unit based on a dedicated chip for electronic detonators in this embodiment.

[0050] Figure 3 This is the principle circuit diagram of the micro point-to-point control unit based on the electronic detonator dedicated chip in this embodiment.

[0051] Figure 4 This is a block diagram of the control principle when the first MOS unit or the third MOS unit in the micro point-to-point control unit based on the electronic detonator dedicated chip in this embodiment outputs a high level.

[0052] Figure 5This is a block diagram of the control principle when the second MOS unit or the fourth MOS unit in the micro point-to-point control unit based on the electronic detonator dedicated chip in this embodiment outputs a low level. DETAILED DESCRIPTION

[0053] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0054] Example:

[0055] like Figure 2 As shown, a micro point-to-point control unit based on a dedicated chip for electronic detonators includes:

[0056] microcontrol unit;

[0057] The sampling unit has a current input terminal electrically connected to the negative electrode of the power supply, a sampling output terminal electrically connected to the micro control unit, and transmits sampling information to the micro control unit;

[0058] A first MOS unit, wherein the current input terminal is electrically connected to the positive electrode of the power supply, the current output terminal is electrically connected to the second bus output, and the control terminal is electrically connected to the micro control unit;

[0059] a second MOS unit, wherein the current input end is electrically connected to the current output end of the sampling unit, the current output end is electrically connected to the second bus output, and the control end is electrically connected to the micro control unit;

[0060] a third MOS unit, wherein the current input terminal is electrically connected to the positive electrode of the power supply, the current output terminal is electrically connected to the first bus output, and the control terminal is electrically connected to the micro control unit;

[0061] The fourth MOS unit has a current input terminal electrically connected to the current output terminal of the sampling unit, a current output terminal electrically connected to the first bus output, and a control terminal electrically connected to the micro control unit.

[0062] like Figure 3 As shown, the sampling unit includes:

[0063] A first sampling circuit, wherein the current output terminal is grounded, the current input terminal is electrically connected to the current input terminals of the second MOS unit and the fourth MOS unit via a 19th resistor, and the collection terminal is electrically connected to the micro control unit;

[0064] A second sampling circuit, wherein the current output terminal is grounded, the current input terminal is electrically connected to the current input terminals of the second MOS unit and the fourth MOS unit via a 20th resistor, and the collection terminal is electrically connected to the micro control unit;

[0065] The first sampling circuit and the second sampling circuit have the same circuit structure;

[0066] The resistance of the 19th resistor is 1K, and the resistance of the 20th resistor is 10R.

[0067] The first sampling circuit includes:

[0068] an enhancement mode NMOS transistor Q12, having a source connected to ground, a drain electrically connected to the nineteenth resistor, and a gate electrically connected to the micro control unit;

[0069] The 28th resistor has two ends electrically connected to the source and gate of the enhancement-mode NMOS transistor Q12 respectively; the resistance of the 28th resistor is 10K.

[0070] like Figure 3 As shown, the first MOS unit includes:

[0071] An NMOS component circuit, wherein the current input terminal is grounded and the control terminal is electrically connected to the micro control unit;

[0072] The PMOS component circuit has a current input terminal electrically connected to the positive pole of the power supply, a current output terminal electrically connected to the second bus output, and a control terminal electrically connected to the current output terminal of the NMOS component circuit.

[0073] The NMOS component circuit includes:

[0074] Enhanced NMOS transistor Q3, with a source connected to the ground, a drain electrically connected to the control terminal of the PMOS component circuit, and a gate electrically connected to the micro control unit;

[0075] The fourth resistor has two ends electrically connected to the source and gate of the enhancement-mode NMOS transistor Q3 respectively; the resistance of the fourth resistor is 10K.

[0076] The PMOS component circuit includes:

[0077] Enhanced PMOS tube Q1, the source is electrically connected to the positive electrode of the power supply;

[0078] A fifth resistor, both ends of which are electrically connected to the gate of the enhancement mode PMOS transistor Q1 and the current output terminal of the NMOS component circuit respectively; the resistance of the fifth resistor is 10K;

[0079] The first resistor has two ends electrically connected to the positive electrode of the power supply and the gate of the enhancement mode PMOS transistor Q1 respectively; the resistance of the first resistor is 10K;

[0080] The eighth resistor has two ends electrically connected to the second bus output and the drain of the enhancement-mode PMOS transistor Q1 respectively. The resistance of the eighth resistor is 1R.

[0081] like Figure 3 As shown, the circuit structure of the second MOS unit is the same as the circuit structure of the third MOS unit, and the current output end of the PMOS component circuit in the third MOS unit is electrically connected to the first bus output.

[0082] like Figure 3 As shown, the second MOS unit includes:

[0083] Enhanced NMOS transistor Q6, with a source electrically connected to the current output terminal of the sampling unit, a drain electrically connected to the second bus output, and a gate electrically connected to the micro control unit;

[0084] a 14th resistor, one end of which is grounded, and the other end of which is electrically connected to the gate of the enhancement-mode NMOS transistor Q6; the resistance of the 14th resistor is 10K;

[0085] A twelfth resistor has one end grounded and the other end electrically connected to the gate of the enhancement-mode NMOS transistor Q6 ; the resistance of the twelfth resistor is 10K.

[0086] like Figure 3 As shown, the circuit structure of the fourth MOS unit is the same as that of the second MOS unit; the drain of the enhancement mode NMOS tube in the fourth MOS unit is electrically connected to the first bus output.

[0087] like Figure 3 As shown, the current output end of the first MOS unit and the current output end of the second MOS unit are electrically connected to the second bus output through the 10th resistor; the resistance value of the 10th resistor is 10R;

[0088] The current output end of the third MOS unit and the current output end of the fourth MOS unit are electrically connected to the first bus output through a ninth resistor; the resistance value of the ninth resistor is 10R.

[0089] The working principle of this embodiment is as follows:

[0090] The output voltage is provided by the positive and negative poles of the power supply. The polarity of the first bus output (A) and the second bus output (B) voltage is changed by the microcontroller unit (MCU) controlling the on and off of each MOS unit tube.

[0091] Figure 3 The third and fourth MOS cells cannot be turned on simultaneously, otherwise the positive and negative power supply electrodes will be directly short-circuited. The first and second MOS cells cannot be turned on simultaneously either. Alternatively, if the first and third MOS cells are turned on simultaneously, the voltages on both the first bus output (A) and the second bus output (B) will be the positive power supply electrode, and the voltage difference between them will be zero, which is unacceptable for communication. If the second and fourth MOS cells are turned on simultaneously, the voltages on both the first bus output (A) and the second bus output (B) will be the negative power supply electrode, which is also unacceptable for communication.

[0092] In the above description, the logic control shows that only when the first and fourth MOS cells are turned on simultaneously, the first bus output (A) becomes negative and the second bus output (B) becomes positive. Alternatively, when the third and second MOS cells are turned on simultaneously, the first bus output (A) becomes positive and the second bus output (B) becomes negative. By continuously switching between these two control logics, the polarity of the first bus output (A) and the second bus output (B) also continuously switches, achieving the desired communication waveform. The output logic table is shown below:

[0093] First MOS unit Second MOS unit The third MOS unit Fourth MOS unit First bus output Second bus output closure closure closure closure No output No output conduction closure closure conduction Output positive Output negative closure conduction conduction closure Output negative Output positive

[0094] When the output terminal is high level controlled, it is controlled by MCU and needs small current to control large current. P-MOS and N-MOS are used in combination. The principle is as follows Figure 4 The bus output current can reach over 500mA. This type of design uses very few components to achieve the control of large currents from small currents.

[0095] When outputting a low level, the voltage on a single bus will be pulled to a low level instantly. We can solve this problem by using only one N-MOS. The principle is as follows: Figure 5 shown.

[0096] This shows that the voltages on the first bus output (A) and the second bus output (B) are constantly switching. For example, if a voltmeter is connected to the positive terminal of the first bus output (A) and the negative terminal of the second bus output (B), when the first bus output (A) is high and the MOS transistor is turned on, and the second bus output (B) is low and the MOS transistor is turned on, the voltmeter will display a positive voltage. Conversely, a negative voltage will be displayed. When the switching speed is fast enough, a near-square wave waveform will be generated at the output terminals, thus achieving communication.

[0097] The sampling unit circuit is designed to monitor the current on the first bus output (A) and the second bus output (B) in real time. The resistors in the current sampling circuit use high-precision 10Ω sampling resistors. When current flows through the bus, it flows to GND through the sampling resistors, generating a voltage drop across the resistors. The MCU monitors the current by sampling this voltage drop.

[0098] The resistor of the resistance sampling circuit uses a 1K resistor. When there is current on the bus, the current will flow into GND through the sampling resistor, and a voltage drop will be generated on the resistor. The MCU monitors the resistance (voltage) by collecting the voltage drop on the resistor.

[0099] When the system of this embodiment is used, Figure 1 As shown, the dedicated chip in the electronic detonator matches the communication signal generated in this embodiment, so that communication with multiple electronic detonators can be carried out.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model and are not limiting. Although the utility model is described in detail with reference to the preferred embodiments, ordinary technicians in this field should understand that the technical solution of the utility model can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the utility model.

Claims

1. A micro point-to-point control unit based on a dedicated chip for electronic detonators, characterized in that: include: microcontrol unit; The sampling unit has a current input terminal electrically connected to the negative electrode of the power supply, a sampling output terminal electrically connected to the micro control unit, and transmits sampling information to the micro control unit; A first MOS unit, wherein the current input terminal is electrically connected to the positive electrode of the power supply, the current output terminal is electrically connected to the second bus output, and the control terminal is electrically connected to the micro control unit; a second MOS unit, wherein the current input end is electrically connected to the current output end of the sampling unit, the current output end is electrically connected to the second bus output, and the control end is electrically connected to the micro control unit; a third MOS unit, wherein the current input terminal is electrically connected to the positive electrode of the power supply, the current output terminal is electrically connected to the first bus output, and the control terminal is electrically connected to the micro control unit; The fourth MOS unit has a current input terminal electrically connected to the current output terminal of the sampling unit, a current output terminal electrically connected to the first bus output, and a control terminal electrically connected to the micro control unit.

2. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 1 is characterized in that: The sampling unit comprises: A first sampling circuit, wherein the current output terminal is grounded, the current input terminal is electrically connected to the current input terminals of the second MOS unit and the fourth MOS unit via a 19th resistor, and the collection terminal is electrically connected to the micro control unit; A second sampling circuit, wherein the current output terminal is grounded, the current input terminal is electrically connected to the current input terminals of the second MOS unit and the fourth MOS unit via a 20th resistor, and the collection terminal is electrically connected to the micro control unit; The first sampling circuit and the second sampling circuit have the same circuit structure; The resistance of the 19th resistor is 1K, and the resistance of the 20th resistor is 10R.

3. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 2 is characterized in that: The first sampling circuit includes: an enhancement mode NMOS transistor Q12, having a source connected to ground, a drain electrically connected to the nineteenth resistor, and a gate electrically connected to the micro control unit; The 28th resistor has two ends electrically connected to the source and gate of the enhancement-mode NMOS transistor Q12 respectively; the resistance of the 28th resistor is 10K.

4. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 1 is characterized in that: The first MOS unit includes: An NMOS component circuit, wherein the current input terminal is grounded and the control terminal is electrically connected to the micro control unit; The PMOS component circuit has a current input terminal electrically connected to the positive pole of the power supply, a current output terminal electrically connected to the second bus output, and a control terminal electrically connected to the current output terminal of the NMOS component circuit.

5. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 4 is characterized in that: The NMOS component circuit includes: Enhanced NMOS transistor Q3, with a source connected to the ground, a drain electrically connected to the control terminal of the PMOS component circuit, and a gate electrically connected to the micro control unit; The fourth resistor has two ends electrically connected to the source and gate of the enhancement-mode NMOS transistor Q3 respectively; the resistance of the fourth resistor is 10K.

6. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 4 is characterized in that: The PMOS component circuit includes: Enhanced PMOS tube Q1, the source is electrically connected to the positive electrode of the power supply; A fifth resistor, both ends of which are electrically connected to the gate of the enhancement mode PMOS transistor Q1 and the current output terminal of the NMOS component circuit respectively; the resistance of the fifth resistor is 10K; The first resistor has two ends electrically connected to the positive electrode of the power supply and the gate of the enhancement mode PMOS transistor Q1 respectively; the resistance of the first resistor is 10K; The eighth resistor has two ends electrically connected to the second bus output and the drain of the enhancement-mode PMOS transistor Q1 respectively. The resistance of the eighth resistor is 1R.

7. The micro point-to-point control unit based on the electronic detonator dedicated chip according to any one of claims 4 to 6, characterized in that: The circuit structure of the second MOS unit is the same as that of the third MOS unit, and the current output end of the PMOS component circuit in the third MOS unit is electrically connected to the first bus output.

8. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 1 is characterized in that: The second MOS unit includes: Enhanced NMOS transistor Q6, with a source electrically connected to the current output terminal of the sampling unit, a drain electrically connected to the second bus output, and a gate electrically connected to the micro control unit; a 14th resistor, one end of which is grounded, and the other end of which is electrically connected to the gate of the enhancement-mode NMOS transistor Q6; the resistance of the 14th resistor is 10K; A twelfth resistor has one end grounded and the other end electrically connected to the gate of the enhancement-mode NMOS transistor Q6 ; the resistance of the twelfth resistor is 10K.

9. The micro point-to-point control unit based on the electronic detonator dedicated chip according to claim 8, characterized in that: The circuit structure of the fourth MOS unit is the same as that of the second MOS unit; the drain of the enhancement mode NMOS transistor in the fourth MOS unit is electrically connected to the first bus output.

10. The micro point-to-point control unit based on a dedicated chip for electronic detonators according to any one of claims 1-6, 8, and 9, characterized in that: The current output end of the first MOS unit and the current output end of the second MOS unit are electrically connected to the second bus output through a tenth resistor; the resistance of the tenth resistor is 10R; The current output end of the third MOS unit and the current output end of the fourth MOS unit are electrically connected to the first bus output through the ninth resistor; The resistance of the ninth resistor is 10R.

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