Logic circuit with active short circuit ASC and hardware protection functions

Abstract

The utility model discloses a logic circuit with active short circuit (ASC) and hardware protection functions, which is characterized in that the R end of a latch U12A, the R end of a latch U12B, the R end of a latch U12C and the R end of a latch U12D are all used for accessing reset signals, the S end of the latch U12A is used for accessing input signals FAULT-OV, the S end of the latch U12B is used for accessing input signals FAULT-OC, and the R end of the latch U12D is used for accessing input signals FAULT-OV. An S end of the latch U12C is used for accessing an input signal FLT1, an S end of the latch U12D is used for accessing an input signal FLT2, a Q end output signal of the latch U12A, a Q end output signal of the latch U12B, a Q end output signal of the latch U12C and a Q end output signal of the latch U12D are all transmitted to a first end of the resistor R209, a second end of the resistor R209 is grounded, and a second end of the resistor R209 is grounded. A first end of the resistor R209 is connected to a first input pin of the positive AND gate U11, a second input pin of the positive AND gate U11 is used for accessing an enable signal PWM-EN-ODSP, and an output end of the positive AND gate U11 is used for outputting a LOCK signal. According to the utility model, active short-circuit protection can be realized, and normal hardware wave locking can be executed.

Description

Technical Field

[0001] The utility model relates to a sampling safety protection circuit in an electric drive system, in particular to a logic circuit with active short circuit ASC and hardware protection functions. Background Art

[0002] Existing electric drive systems require a sampling safety protection circuit to ensure that the main control board receives timely overvoltage, overcurrent, and driver board upper and lower arm fault signals. Traditional fault signal sampling circuits usually directly feed back the fault to the main control board, and only take protective measures after the main control board processes the fault. These circuits lack the functions of fault protection and signal latching, and the effectiveness of fault signal processing cannot meet application requirements. Utility Model Content

[0003] The technical problem to be solved by the present invention is to provide a logic circuit which can realize active short-circuit protection and execute normal hardware lock wave in view of the deficiencies of the existing technology.

[0004] In order to solve the above technical problems, the present utility model adopts the following technical solutions.

[0005] A logic circuit with active short circuit (ASC) and hardware protection functions, comprising a latch U12A, a latch U12B, a latch U12C, a latch U12D, a positive AND gate U11 and the resistor R209, wherein the R end of the latch U12A, the R end of the latch U12B, the R end of the latch U12C and the R end of the latch U12D are all used to access a reset signal, the S end of the latch U12A is used to access an input signal FAULT-OV, the S end of the latch U12B is used to access an input signal FAULT-OC, and the S end of the latch U12C is used to access an input signal FAULT-0V. LT1, the S end of the latch U12D is used to access the input signal FLT2, the Q end output signal of the latch U12A, the Q end output signal of the latch U12B, the Q end output signal of the latch U12C and the Q end output signal of the latch U12D are all transmitted to the first end of the resistor R209, the second end of the resistor R209 is grounded, the first end of the resistor R209 is connected to the first input pin of the positive AND gate U11, the second input pin of the positive AND gate U11 is used to access the enable signal PWM-EN-ODSP, and the output end of the positive AND gate U11 is used to output the LOCK signal.

[0006] Preferably, a resistor R99 and an indicator light LED1 are connected in series between the Q end of the latch U12A and the ground, a resistor R98 and an indicator light LED2 are connected in series between the Q end of the latch U12B and the ground, a resistor R97 and an indicator light LED3 are connected in series between the Q end of the latch U12C and the ground, and a resistor R96 and an indicator light LED4 are connected in series between the Q end of the latch U12D and the ground.

[0007] Preferably, a diode D31, a diode D32, a diode D34 and a diode D82 are included, and the anode of the diode D31, the anode of the diode D32, the anode of the diode D34 and the anode of the diode D82 are respectively connected to the Q end of the latch U12A, the Q end of the latch U12B, the Q end of the latch U12C and the Q end of the latch U12D, and the cathode of the diode D31, the cathode of the diode D32, the cathode of the diode D34 and the cathode of the diode D82 are all connected to the first end of the resistor R209.

[0008] Preferably, the second input pin of the positive AND gate U11 is connected to a 3.3V voltage terminal via a pull-up resistor R248.

[0009] Preferably, the model of the positive AND gate U11 is SN74AHC1G09.

[0010] Preferably, the latch U12A, the latch U12B, the latch U12C, and the latch U12D are all of model CD4044.

[0011] In the logic circuit with active short circuit ASC and hardware protection function disclosed in the present utility model, the latch U12A, the latch U12B, the latch U12C and the latch U12D are respectively used to latch the overvoltage signal, the overcurrent signal, the bridge arm fault signal on the driver board and the bridge arm fault signal under the driver board. Under normal conditions, if no fault occurs, the first pin of the positive AND gate U11 inputs a low level, the second pin of the positive AND gate U11 is in any state, and the first pin of the positive AND gate U11 is in a low level. Pin 4 outputs a low level to ensure normal PWM signal output. When a fault occurs, pin 1 of the positive-AND gate U11 inputs a high level. This situation is divided into two cases: if the active short-circuit function is required, pin 2 of the positive-AND gate U11 inputs a low level, pin 4 of the positive-AND gate U11 outputs a low level, and the PWM signal is output normally; if the active short-circuit function is not required, pin 2 of the positive-AND gate U11 inputs a high level, pin 4 of the positive-AND gate U11 outputs a high level, and the PWM signal is not output. Based on the above circuit principle, the utility model effectively implements the active short-circuit protection function while also performing the normal hardware lock wave function, effectively meeting application requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 Partial schematic diagram of a logic circuit with active short circuit (ASC) and hardware protection functions Figure 1 ;

[0013] Figure 2 Partial schematic diagram of a logic circuit with active short circuit (ASC) and hardware protection functions Figure 2 . DETAILED DESCRIPTION

[0014] The present invention will be described in more detail below with reference to the accompanying drawings and embodiments.

[0015] The utility model discloses a logic circuit with active short circuit ASC and hardware protection functions, combined with Figure 1 and Figure 2As shown, it includes a latch U12A, a latch U12B, a latch U12C, a latch U12D, a positive AND gate U11 and the resistor R209. The R end of the latch U12A, the R end of the latch U12B, the R end of the latch U12C and the R end of the latch U12D are all used to access the reset signal, the S end of the latch U12A is used to access the input signal FAULT-OV, the S end of the latch U12B is used to access the input signal FAULT-OC, the S end of the latch U12C is used to access the input signal FLT1, and the latch U1 The S end of 2D is used to access the input signal FLT2, the Q end output signal of the latch U12A, the Q end output signal of the latch U12B, the Q end output signal of the latch U12C and the Q end output signal of the latch U12D are all transmitted to the first end of the resistor R209, the second end of the resistor R209 is grounded, the first end of the resistor R209 is connected to the first input pin of the positive AND gate U11, the second input pin of the positive AND gate U11 is used to access the enable signal PWM-EN-ODSP, and the output end of the positive AND gate U11 is used to output the LOCK signal.

[0016] In the above structure, the latch U12A, the latch U12B, the latch U12C and the latch U12D are respectively used to latch the overvoltage signal, the overcurrent signal, the upper bridge arm fault signal of the driver board and the lower bridge arm fault signal of the driver board. Under normal conditions, if no fault occurs, the first pin of the positive AND gate U11 inputs a low level, the second pin of the positive AND gate U11 is in any state, and the fourth pin of the positive AND gate U11 outputs a low level to enable the PWM signal to be output normally. When a fault occurs, the first pin of the positive AND gate U11 inputs a high level. There are two situations at this time: if the active short-circuit function needs to be executed, the second pin of the positive AND gate U11 inputs a low level, the fourth pin of the positive AND gate U11 outputs a low level, and the PWM signal is output normally; if the active short-circuit function does not need to be executed, the second pin of the positive AND gate U11 inputs a high level, the fourth pin of the positive AND gate U11 outputs a high level, and the PWM signal is not output. Based on the above circuit principle, the utility model can better realize the active short-circuit protection function, and at the same time has the function of executing normal hardware lock wave, which better meets the application requirements.

[0017] It should be noted that the latch U12A, the latch U12B, the latch U12C and the latch U12D in the present invention can respectively latch the overvoltage signal, the overcurrent signal, the upper bridge arm fault signal of the driver board and the lower bridge arm fault signal of the driver board, but in actual applications it is not limited to this. According to the specific application needs of the electric drive system, the signal types required for sampling can be increased or decreased, and a corresponding number of latches can be set. However, no matter how they are increased or decreased, they are equivalent replacements made under the guidance of the spirit of the present invention, and therefore they all fall within the scope of protection of the present invention.

[0018] In order to issue a light prompt when a fault occurs in each signal, in this embodiment, see Figure 1 A resistor R99 and an indicator LED1 are connected in series between the Q end of the latch U12A and the ground, a resistor R98 and an indicator LED2 are connected in series between the Q end of the latch U12B and the ground, a resistor R97 and an indicator LED3 are connected in series between the Q end of the latch U12C and the ground, and a resistor R96 and an indicator LED4 are connected in series between the Q end of the latch U12D and the ground.

[0019] Furthermore, this embodiment includes a diode D31, a diode D32, a diode D34 and a diode D82, wherein the anode of the diode D31, the anode of the diode D32, the anode of the diode D34 and the anode of the diode D82 are respectively connected to the Q end of the latch U12A, the Q end of the latch U12B, the Q end of the latch U12C and the Q end of the latch U12D, and the cathode of the diode D31, the cathode of the diode D32, the cathode of the diode D34 and the cathode of the diode D82 are all connected to the first end of the resistor R209.

[0020] See Figure 2 As shown, the diode D31, the diode D32, the diode D34 and the diode D82 all play a unidirectional conduction role, and their role is to prevent the reverse current from interfering with the latches.

[0021] To ensure that the signal at the second pin of the positive AND gate U11 is accurate and reliable, in this embodiment, the second input pin of the positive AND gate U11 is connected to a 3.3V voltage terminal via a pull-up resistor R248.

[0022] As a preferred embodiment, the model of the positive-AND gate U11 is SN74AHC1G09. The models of the latches U12A, U12B, U12C, and U12D are all CD4044. In practical applications, the positive-AND gate U11 and the latches are not limited to the above-mentioned models and can be replaced with other devices with equivalent functions. These equivalent replacements are all within the scope of protection of the present invention.

[0023] In the logic circuit with active short circuit ASC and hardware protection functions disclosed by the present utility model, when the main control board receives overvoltage, overcurrent, and faults of the upper bridge arm and lower bridge arm of the driver board, the main control board determines whether it is necessary to execute the active short circuit function according to the actual situation: if the active short circuit function needs to be executed, the main control board DSP gives a low level to the logic signal, shields all faults through the logic gate, and determines whether the upper bridge arm or the lower bridge arm is faulty, continuously turns on the corresponding bridge arm, and executes the active short circuit safety protection strategy; if the active short circuit function does not need to be executed, the main control board DSP gives a high level to the logic signal, and the fault protection circuit executes the normal hardware lock wave function.

[0024] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements or improvements made within the technical scope of the present invention should be included in the scope of protection of the present invention.

Claims

1. A logic circuit with active short circuit (ASC) and hardware protection functions, characterized in that: The circuit includes a latch U12A, a latch U12B, a latch U12C, a latch U12D, a positive AND gate U11 and a resistor R209. The R end of the latch U12A, the R end of the latch U12B, the R end of the latch U12C and the R end of the latch U12D are all used to access the reset signal. The S end of the latch U12A is used to access the input signal FAULT-OV, the S end of the latch U12B is used to access the input signal FAULT-OC, the S end of the latch U12C is used to access the input signal FLT1, and the latch U12D is used to access the input signal FAULT-OV. The S end is used to access the input signal FLT2, the Q end output signal of the latch U12A, the Q end output signal of the latch U12B, the Q end output signal of the latch U12C and the Q end output signal of the latch U12D are all transmitted to the first end of the resistor R209, the second end of the resistor R209 is grounded, the first end of the resistor R209 is connected to the first input pin of the positive AND gate U11, the second input pin of the positive AND gate U11 is used to access the enable signal PWM-EN-ODSP, and the output end of the positive AND gate U11 is used to output the LOCK signal.

2. The logic circuit with active short circuit (ASC) and hardware protection function according to claim 1, characterized in that: A resistor R99 and an indicator LED1 are connected in series between the Q end of the latch U12A and the ground, a resistor R98 and an indicator LED2 are connected in series between the Q end of the latch U12B and the ground, a resistor R97 and an indicator LED3 are connected in series between the Q end of the latch U12C and the ground, and a resistor R96 and an indicator LED4 are connected in series between the Q end of the latch U12D and the ground.

3. The logic circuit with active short circuit (ASC) and hardware protection function according to claim 1, characterized in that: It includes a diode D31, a diode D32, a diode D34 and a diode D82. The anode of the diode D31, the anode of the diode D32, the anode of the diode D34 and the anode of the diode D82 are respectively connected to the Q end of the latch U12A, the Q end of the latch U12B, the Q end of the latch U12C and the Q end of the latch U12D. The cathode of the diode D31, the cathode of the diode D32, the cathode of the diode D34 and the cathode of the diode D82 are all connected to the first end of the resistor R209.

4. The logic circuit with active short circuit (ASC) and hardware protection function according to claim 1, characterized in that: The second input pin of the positive AND gate U11 is connected to the 3.3V voltage terminal through a pull-up resistor R248.

5. The logic circuit with active short circuit (ASC) and hardware protection function according to claim 1, characterized in that: The model of the positive AND gate U11 is SN74AHC1G09.

6. The logic circuit with active short circuit (ASC) and hardware protection function according to claim 1, characterized in that: The latch U12A, the latch U12B, the latch U12C, and the latch U12D are all CD4044.

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