High-side bootstrap drive control circuit

Abstract

The high-side bootstrap drive control circuit comprises an NMOS tube Q1, an NMOS tube Q2, an NMOS tube Q3, an NMOS tube Q4, an MOS tube Q9, an MOS tube Q11, a capacitor C1, a capacitor CE1, a capacitor C2, an input level A point and an input high-frequency pulse signal B point, and further comprises a triode Q28 and a triode Q27 which are connected with the input level A point, and a triode Q10 and a triode Q14 which are connected with the input high-frequency pulse signal B point, the NMOS tube Q1, the NMOS tube Q2, the NMOS tube Q3 and the NMOS tube Q4 are mutually connected to form an anti-backflow circuit, and the anti-backflow circuit is connected with the capacitor C2, the capacitor CE1 and the capacitor C1; one end of the MOS tube Q11 is connected with the triode Q10 and the triode Q14, the other end of the MOS tube Q11 is connected with one end of the capacitor C1 and one end of the MOS tube Q9, the other end of the MOS tube Q9 is connected with the capacitor CE1 and the capacitor C2, one end of the triode Q27 is connected with the triode Q28, and the other end of the triode Q27 is connected with the capacitor C1, the capacitor CE1 and the capacitor C2. According to the high-side bootstrap drive control circuit, the anti-backflow circuit is added in the circuit, so that the effect of controlling the use cost of the circuit is achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of control circuits, in particular to a high-side bootstrap drive control circuit. Background Art

[0002] During battery charging, it's often necessary to add a backflow protection circuit to prevent reverse current flow. There are two common methods for implementing backflow protection: one uses PMOS transistors, and the other uses NMOS transistors. The advantage of using PMOS for backflow protection is that it's simple to drive. The disadvantage is that PMOS transistors are more expensive than NMOS transistors. Because PMOS transistors have a relatively low current flow, they can't handle high-current charging, and their efficiency is significantly lower than that of NMOS transistors. Using NMOS for backflow protection is cheaper than PMOS transistors, but the disadvantage is that NMOS transistors require a high-side bootstrap driver chip or driver transformer for high-side drive, increasing costs. Therefore, designing a high-side bootstrap driver control circuit to control costs is an inevitable industry requirement. Utility Model Content

[0003] In order to overcome the defects of the prior art, the purpose of the present invention is to provide a high-side bootstrap drive control circuit.

[0004] To achieve the above-mentioned object, the technical solution of the present invention is implemented as follows: a high-side bootstrap drive control circuit, comprising an NMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, an NMOS transistor Q4, a MOS transistor Q9, a MOS transistor Q11, a capacitor C1, a capacitor CE1, a capacitor C2, an input level point A, and an input high-frequency pulse signal point B, further comprising a transistor Q28 and a transistor Q27 connected to the input level point A, a transistor Q10 and a transistor Q14 connected to the input high-frequency pulse signal point B, the NMOS transistor Q1, the NMOS transistor Q2, the NMOS transistor Q3, and the NMOS transistor Q4 being interconnected to form an anti-backflow circuit, which is connected to the capacitor C2, the capacitor CE1, and the capacitor C1;

[0005] One end of the MOS transistor Q11 is connected to the transistor Q10 and the transistor Q14, and the other end is connected to the capacitor C1 and one end of the MOS transistor Q9. The other end of the MOS transistor Q9 is connected to the capacitor CE1 and the capacitor C2. One end of the transistor Q27 is connected to the transistor Q28, and the other end is connected to the capacitor C1, the capacitor CE1, and one end of the capacitor C2.

[0006] Preferably, a diode D3 is connected between the transistor Q27 and the capacitor C1 , and a diode D4 is connected between the capacitor C1 , the capacitor CE1 and the capacitor C2 .

[0007] Preferably, a diode D7 is provided between the MOS transistor Q11 and the capacitor C1.

[0008] Preferably, the anti-backflow circuit is further connected to a resistor R1 and a resistor R2.

[0009] Preferably, the power supply voltage at the input level point A is +12VL.

[0010] Preferably, one end of the capacitor C1, capacitor CE1 and capacitor C2 is connected to the G end of the NMOS transistor Q1, NMOS transistor Q2, NMOS transistor Q3 and NMOS transistor Q4, and the other end of the capacitor C1, capacitor CE1 and capacitor C2 is connected to the S end of the NMOS transistor Q1, NMOS transistor Q2, NMOS transistor Q3 and NMOS transistor Q4.

[0011] The beneficial effects of the utility model are:

[0012] The utility model discloses a high-side bootstrap drive control circuit, which mainly includes an NMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, an NMOS transistor Q4, a MOS transistor Q9, a MOS transistor Q11, a capacitor C1, a capacitor CE1, and a capacitor C2. The NMOS transistors Q1, Q2, Q3, and Q4 are interconnected to form an anti-backflow circuit. The anti-backflow circuit is a bidirectional circuit that mainly prevents current backflow. By adding the anti-backflow circuit to the circuit, the cost of the circuit can be controlled. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In the attached figure:

[0014] Figure 1 This is a schematic diagram of a high-side bootstrap drive control circuit of the utility model. DETAILED DESCRIPTION

[0015] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is apparent that the embodiments described are only a portion of the embodiments of the utility model, not all of them. The embodiments and features in the embodiments of this application may be combined with each other unless there is a conflict. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the utility model without creative effort are also within the scope of protection of the utility model.

[0016] It should be noted that if the embodiments of the utility model involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0017] In addition, "multiple" means more than two. Furthermore, the technical solutions of the various embodiments may be combined with each other, but this must be based on the premise that they can be implemented by a person of ordinary skill in the art. If the combination of technical solutions is mutually inconsistent or cannot be implemented, it shall be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the utility model.

[0018] Please refer to the instruction manual Figure 1 The utility model provides a high-side bootstrap drive control circuit, including NMOS transistor Q1, NMOS transistor Q2, NMOS transistor Q3, NMOS transistor Q4, MOS transistor Q9, MOS transistor Q11, capacitor C1, capacitor CE1, capacitor C2, input level point A and input high-frequency pulse signal point B, and also includes transistors Q28 and Q27 connected to the input level point A, transistors Q10 and Q14 connected to the input high-frequency pulse signal point B, the NMOS transistors Q1, NMOS transistor Q2, NMOS transistor Q3 and NMOS transistor Q4 They are connected to each other to form an anti-backflow circuit, which is connected to capacitor C2, capacitor CE1, and capacitor C1. One end of the MOS transistor Q11 is connected to the transistor Q10 and the transistor Q14. The transistors Q10 and the transistor Q14 help the MOS transistor Q11 to turn on. The other end is connected to the capacitor C1 and one end of the MOS transistor Q9. The other end of the MOS transistor Q9 is connected to the capacitor CE1 and the capacitor C2. One end of the transistor Q27 is connected to the transistor Q28. The transistor Q28 helps the transistor Q27 to start turning on. The other end is connected to the capacitor C1, the capacitor CE1, and one end of the capacitor C2.

[0019] The utility model discloses a high-side bootstrap drive control circuit that can be applied to photovoltaic energy storage. In the power supply industry, specifically, solar photovoltaic charging, it is suitable for high-current charging, with high overall output conversion efficiency and low circuit cost. It mainly includes NMOS transistors Q1, Q2, Q3, Q4, Q9, Q11, capacitors C1, CE1, and C2. NMOS transistors Q1, Q2, Q3, and Q4 are interconnected to form an anti-backflow circuit. This anti-backflow circuit is a bidirectional circuit that primarily prevents current backflow. This anti-backflow circuit is connected to capacitors C2, CE1, and C1, and to MOS transistors Q9 and Q11. MOS transistors Q9 and Q11 are connected to point B of the input high-frequency pulse signal and primarily function to boost voltage within the circuit. Capacitors CE1 and C1 primarily function to store the boosted voltage within the control circuit.

[0020] In a preferred embodiment, referring to Figure 1In this high-side bootstrap drive control circuit, a diode D3 is connected between transistor Q27 and capacitor C1. A diode D4 is connected between capacitor C1, capacitor CE1, and capacitor C2. A diode D7 is provided between MOS transistor Q11 and capacitor C1. Diodes D3, D4, and D7 prevent current backflow. Resistors R1 and R2 are also connected to the backflow prevention circuit. The power supply voltage at input level point A is +12VL. One end of capacitors C1, CE1, and C2 is connected to the G terminals of NMOS transistors Q1, Q2, Q3, and Q4. The other ends of capacitors C1, CE1, and C2 are connected to the S terminals of NMOS transistors Q1, Q2, Q3, and Q4.

[0021] The working principle of the high-side bootstrap drive control circuit is as follows: when charging starts, the input level at point A is high, causing the power supply to enter the high-side bootstrap drive control circuit. At the same time, a high-frequency pulse signal is input at point B, turning on MOS transistor Q11 and charging capacitor C1 to the power supply voltage of 12V. When a low-frequency pulse signal is input at point B, MOS transistor Q11 is turned off and MOS transistor Q9 is turned on. At this time, the upper terminal voltage of capacitor C1, capacitor CE1, and capacitor C2 is 24V, and the lower terminal voltage is 12V. The voltage difference between the G and S terminals of NMOS transistors Q1, NMOS transistor Q2, NMOS transistor Q3, and NMOS transistor Q4 is 12V. The high-frequency pulse signal at point B is repeated in this way, turning on all NMOS transistors, thus realizing high-side bootstrap drive of the NMOS transistors.

[0022] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A high-side bootstrap drive control circuit, characterized in that: It includes an NMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, an NMOS transistor Q4, a MOS transistor Q9, a MOS transistor Q11, a capacitor C1, a capacitor CE1, a capacitor C2, an input level point A, and an input high-frequency pulse signal point B, further including a transistor Q28 and a transistor Q27 connected to the input level point A, and a transistor Q10 and a transistor Q14 connected to the input high-frequency pulse signal point B. The NMOS transistor Q1, the NMOS transistor Q2, the NMOS transistor Q3, and the NMOS transistor Q4 are interconnected to form an anti-backflow circuit, and the anti-backflow circuit is connected to the capacitor C2, the capacitor CE1, and the capacitor C1; One end of the MOS transistor Q11 is connected to the transistor Q10 and the transistor Q14, and the other end is connected to the capacitor C1 and one end of the MOS transistor Q9. The other end of the MOS transistor Q9 is connected to the capacitor CE1 and the capacitor C2. One end of the transistor Q27 is connected to the transistor Q28, and the other end is connected to the capacitor C1, the capacitor CE1, and one end of the capacitor C2.

2. A high-side bootstrap drive control circuit according to claim 1, characterized in that: A diode D3 is connected between the transistor Q27 and the capacitor C1 , and a diode D4 is connected between the capacitor C1 , the capacitor CE1 and the capacitor C2 .

3. A high-side bootstrap drive control circuit according to claim 1, characterized in that: A diode D7 is provided between the MOS transistor Q11 and the capacitor C1.

4. A high-side bootstrap drive control circuit according to claim 1, characterized in that: The anti-backflow circuit is further connected to a resistor R1 and a resistor R2.

5. The high-side bootstrap drive control circuit according to claim 1, characterized in that: The power supply voltage at the input level point A is +12VL.

6. The high-side bootstrap drive control circuit according to claim 1, characterized in that: One end of the capacitor C1, capacitor CE1 and capacitor C2 is connected to the G end of the NMOS transistor Q1, NMOS transistor Q2, NMOS transistor Q3 and NMOS transistor Q4, and the other end of the capacitor C1, capacitor CE1 and capacitor C2 is connected to the S end of the NMOS transistor Q1, NMOS transistor Q2, NMOS transistor Q3 and NMOS transistor Q4.

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