Integrated circuit substrate structure

By using AUS308 ink material and optimized structural design on the integrated circuit substrate, the problem of nickel-palladium-enzyme nickel penetration is solved, and the effect of reducing costs and increasing shipments is achieved.

CN223285991UActive Publication Date: 2025-08-29RIRONG SEMICON (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202422728559.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-09
Publication Date
2025-08-29
Estimated Expiration
2034-11-09

AI Technical Summary

Technical Problem

In the prior art, the use of mismatched SolderMask materials in high-integration integrated circuit substrates leads to abnormal nickel seepage of nickel, palladium, resulting in reduced shipments and increased production costs.

Method used

AUS308 ink material is used as the solder resist layer, and is designed as a two-layer structure with upper and lower layers to optimize the matching degree between the material and the substrate and avoid nickel leakage abnormalities.

Benefits of technology

It effectively avoids abnormal nickel seepage, reduces product defect rate, reduces production costs, and improves production efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of integrated circuit substrates, and discloses an integrated circuit substrate structure, which comprises a core plate arranged in the middle of the structure and configured as a basic structure of a circuit substrate; the copper foils are positioned on the two sides of the core plate; the metal treatment layer is arranged on the outer side of the copper foil; and the solder mask layer covers the outer layer of the metal processing layer. According to the utility model, by reasonably selecting materials and optimizing the structural design, the problem of abnormal nickel-palladium-gold nickelizing caused by the use of unmatched solder mask materials (such as SR1) is avoided; aUS308 is used as a solder mask layer material, and compared with SR1, abnormal nickelizing does not occur, so that the problem that the shipment quantity is reduced due to poor products is reduced, the production cost is greatly reduced, and the production benefit is improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuit substrates, in particular to an integrated circuit substrate structure. Background Art

[0002] With the rapid development of electronic technology, the integration of integrated circuits is getting higher and higher, and the performance requirements for integrated circuit substrates are becoming increasingly stringent. In the substrate design required by customers, SolderMask (solder mask) materials are required, and sometimes better materials such as SR1 are required. However, when it comes to the actual substrate conditions of the design, the good SolderMask material does not match the substrate design well. At this time, abnormal nickel-palladium-gold nickel infiltration will occur, which will lead to a decrease in substrate shipments and a significant increase in costs. To avoid cost increases, it is necessary to adjust and use an appropriate SolderMask material.

[0003] The use of SR1 will lead to the abnormal short nickel penetration during nickel-palladium-gold plating, which will lead to a reduction in shipments. Compared with SR1, the use of AUS308 does not have this abnormality, and the production cost is greatly reduced. Therefore, an integrated circuit substrate structure is proposed. Utility Model Content

[0004] The purpose of the utility model is to solve the shortcomings of the prior art and to propose an integrated circuit substrate structure.

[0005] In order to achieve the above-mentioned purpose, the present invention adopts the following technical solutions: an integrated circuit substrate structure, comprising: a core board, which is arranged in the middle of the structure and configured as the basic structure of the circuit substrate; copper foil, which is located on both sides of the core board; a metal treatment layer, which is arranged on the outside of the copper foil; and a solder resist layer, which covers the outer layer of the metal treatment layer.

[0006] As a further description of the above technical solution:

[0007] The solder resist layer is provided with an upper and a lower layers, wherein the thickness of the upper layer is 15+ / -5 microns; and the thickness of the lower layer is 15+ / -7 microns.

[0008] As a further description of the above technical solution:

[0009] The thickness of the copper foil is 18 microns.

[0010] As a further description of the above technical solution:

[0011] The solder resist layer adopts AUS308 ink material.

[0012] The utility model has the following beneficial effects:

[0013] 1. In the present invention, by rationally selecting materials and optimizing structural design, the problem of abnormal nickel infiltration of nickel-palladium-gold caused by the use of mismatched solder mask materials (such as SR1) is avoided; when AUS308 is used as the solder mask material, compared with SR1, no abnormal nickel infiltration occurs, thereby reducing the problem of reduced shipments due to product defects, greatly reducing production costs, and improving production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 The figure is a structural diagram of an integrated circuit substrate structure proposed by the present invention.

[0015] Legend:

[0016] 1. Core board; 2. Copper foil; 3. Metal treatment layer; 4. Solder mask layer. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0018] Reference Figure 1 The utility model provides an embodiment: an integrated circuit substrate structure, comprising: a core board integrated circuit substrate 1 integrated circuit substrate, the core board integrated circuit substrate 1 integrated circuit substrate is arranged in the middle of the structure, and is configured as the basic structure of the circuit substrate; a copper foil integrated circuit substrate 2 integrated circuit substrate, the copper foil integrated circuit substrate 2 integrated circuit substrate is located on both sides of the core board integrated circuit substrate 1 integrated circuit substrate; a metal treatment layer integrated circuit substrate 3 integrated circuit substrate, the metal treatment layer integrated circuit substrate 3 integrated circuit substrate is arranged on the outer side of the copper foil integrated circuit substrate 2 integrated circuit substrate; a solder resist layer integrated circuit substrate 4 integrated circuit substrate, the solder resist layer integrated circuit substrate 4 integrated circuit substrate covers the outer layer of the metal treatment layer integrated circuit substrate 3 integrated circuit substrate;

[0019] The core board 1 is located in the middle of the structure and serves as the basic structure of the circuit substrate. It provides the necessary mechanical support and a certain electrical performance foundation for the entire substrate. Its thickness is generally within a certain tolerance range. In this embodiment, the thickness of the core board 1 is 60+ / -15 microns. This thickness design not only ensures the strength of the substrate, but also meets the electrical performance requirements of the circuit design.

[0020] The copper foil 2 is located on both sides of the core board 1 and is a key part in achieving the conductive function of the circuit. In this embodiment, the thickness of the copper foil 2 is 18 microns, which can meet the requirements of most conventional circuit designs while maintaining the overall performance and structural rationality of the substrate.

[0021] The metal treatment layer 3 is provided on the outside of the copper foil 2. Its main function is to treat the surface of the copper foil to improve the solderability, corrosion resistance and electrical properties of the copper foil. This ensures that the electronic components can be better connected to the substrate in the subsequent soldering process and can maintain good electrical performance and stability under different environmental conditions.

[0022] The solder resist layer integrated circuit substrate 4 has two layers, the upper layer has a thickness of 15+ / -5 microns; the lower layer has a thickness of 15+ / -7 microns, and the solder resist layer integrated circuit substrate 4 adopts AUS308 ink material.

[0023] The thickness of the copper foil integrated circuit substrate 2 is 18 microns.

[0024] In this embodiment, the final thickness is 232 + / - 30 microns;

[0025] In the metal treatment layer 3, the nickel content is 3-9; the palladium content is 0.05-0.15; and the gold content is 0.05-0.15.

[0026] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or make equivalent replacements for some of the technical features therein. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An integrated circuit substrate structure, characterized in that: include: A core board (1), the core board (1) being arranged in the middle of the structure and configured as a basic structure of a circuit substrate; Copper foil (2), the copper foil (2) is located on both sides of the core board (1); A metal treatment layer (3), the metal treatment layer (3) being arranged on the outer side of the copper foil (2); A solder resist layer (4), the solder resist layer (4) covers the outer layer of the metal treatment layer (3).

2. The integrated circuit substrate structure according to claim 1, wherein: The solder resist layer (4) is provided with an upper and lower layer, wherein the thickness of the upper layer is 15+ / -5 microns; and the thickness of the lower layer is 15+ / -7 microns.

3. The integrated circuit substrate structure according to claim 1, wherein: The thickness of the copper foil (2) is 18 microns.

4. The integrated circuit substrate structure according to claim 1, wherein: The solder resist layer (4) adopts AUS308 ink material.