DC-DC testing device with high integration level

Abstract

The utility model relates to a DC-DC testing device with high integration level, which comprises a testing device main body, and a pin module and a pin module which are matched for use are arranged on the testing device main body. The special test seat of the DUT is connected to the adapter plate, the adapter plate is matched with and connected with the pin module, the pin module is communicated with the machine mother jig to obtain all test signals output by related equipment and feed back the test signals to the upper computer, and a highly-integrated DC-DC test structure is formed.

Description

Technical Field

[0001] The utility model relates to a power module testing technology and use equipment, specifically a highly integrated DC-DC testing device. Background Art

[0002] Currently, ATE machines are mostly used to test DC-DC and AC-DC devices, namely power modules. However, there are many types of power modules, and the device packaging varies, so the parameters that need to be tested are too numerous to list.

[0003] For devices with fixed components, existing devices mostly use alligator clip connections, which can only test output voltage, output current, ripple, efficiency, line regulation, load regulation, and cross regulation parameters. The large number of cables makes it easy for human wiring errors to occur, resulting in low efficiency and safety factors during batch testing.

[0004] Therefore, it is necessary to provide a highly integrated DC-DC testing device to solve the above problems. Utility Model Content

[0005] The purpose of the utility model is to provide a highly integrated DC-DC testing device.

[0006] The utility model achieves the above-mentioned purpose through the following technical solutions:

[0007] A highly integrated DC-DC test device includes a test device body, on which a pin module and a pin module for use are provided;

[0008] The dedicated test socket of the DUT device under test is connected to the adapter board, the adapter board matches and connects the pin module, and the pin module is connected to the machine's mother fixture to obtain all test signals output by related equipment and feed them back to the host computer, forming a highly integrated DC-DC test structure.

[0009] The pin module includes a first upper pin, a second upper pin, a third upper pin, a fourth upper pin, a fifth upper pin, a sixth upper pin, a seventh upper pin, an eighth upper pin, a ninth upper pin, a tenth upper pin, an eleventh upper pin, a twelfth upper pin, a fourteenth upper pin, a fifteenth upper pin, a sixteenth upper pin, a seventeenth upper pin, an eighteenth upper pin, a nineteenth upper pin, a twentieth upper pin, a twenty-first upper pin, and a twenty-second upper pin, which are distributed on the upper end surface of the test device body;

[0010] The pin module includes several pins that match the pin module.

[0011] Furthermore, the plurality of pins include a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, a tenth pin, an eleventh pin, a twelfth pin, a fourteenth pin, a fifteenth pin, a sixteenth pin, a seventeenth pin, an eighteenth pin, a nineteenth pin, a twentieth pin, a twenty-first pin, and a twenty-second pin.

[0012] Furthermore, a CH module is also provided on the main body of the testing device.

[0013] Furthermore, the CH module includes a first CH connection part, a second CH connection part, a third CH connection part, and a fourth CH connection part.

[0014] Further,

[0015] The first upper pin is the positive input of the device, connected to the Vin+ pin of the device;

[0016] The second upper pin is the negative input of the device and is connected to the Vin- pin of the device;

[0017] The third upper pin is the inhibit terminal, connected to the INH pin of the device;

[0018] The fourth upper pin is the negative output of the device's fourth channel, connected to the Vo4- pin of the device;

[0019] The fifth upper pin is the 4th output positive of the device, connected to the Vo4+ pin of the device;

[0020] The sixth upper pin is the positive output of the device, connected to the Vo1+ pin of the device;

[0021] The seventh upper pin is the negative output of the device's first channel, connected to the Vo1- pin of the device;

[0022] The eighth upper pin is the second positive output of the device, connected to the Vo2+ pin of the device;

[0023] The ninth upper pin is the negative output of the device's second channel, connected to the device's Vo2- pin;

[0024] The tenth upper pin is the third positive output of the device, connected to the Vo3+ pin of the device;

[0025] The eleventh upper pin is the negative output of the device's third channel, connected to the Vo3- pin of the device;

[0026] The twelfth upper pin is the device input S+, connected to the device's Vin+ pin;

[0027] The fourteenth upper pin is the device input S-, connected to the device's Vin- pin;

[0028] The fifteenth upper pin is the 4th output S- of the device, connected to the S4- pin of the device;

[0029] The upper sixteenth pin is the 4th output S+ of the device, which is connected to the S4+ pin of the device;

[0030] The seventeenth upper pin is the device's first output S+, connected to the device's S1+ pin;

[0031] The eighteenth upper pin is the device's first output S-, connected to the device's S1- pin;

[0032] The upper nineteenth pin is the second output S+ of the device, which is connected to the S2+ pin of the device;

[0033] The 20th upper pin is the device's second output S-, connected to the device's S2- pin;

[0034] The 21st upper pin is the device's third output S+, connected to the device's S3+ pin;

[0035] The 22nd upper pin is the device's third output S-, which is connected to the device's S3- pin.

[0036] Furthermore, a handle module is provided on the main body of the testing device.

[0037] Furthermore, the handle module includes a first handle and a second handle provided on both sides of the test body.

[0038] Compared with the existing technology, the utility model connects the test device and the test system, and can realize the required test circuit by simple settings in the ATE machine software. It is simple to use, reliable in operation, and can perform batch testing to realize the automated testing function of all static parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 This is a structural diagram of the main body of the testing device of the present utility model.

[0040] Figure 2 This is a schematic diagram of the adapter plate of the present invention.

[0041] Figure 3 This is a test flow chart of the utility model.

[0042] Figure 4 This is a test principle diagram of the utility model.

[0043] Figure 5 Schematic diagram of a highly integrated detection structure of an embodiment. DETAILED DESCRIPTION

[0044] Example:

[0045] See Figure 1-4 , this embodiment shows a highly integrated DC-DC test device, including a test device body, on which a pin module and a pin module for use are provided;

[0046] The dedicated test socket of the DUT device under test is connected to the adapter board, the adapter board matches and connects the pin module, and the pin module is connected to the machine's mother fixture to obtain all test signals output by related equipment and feed them back to the host computer, forming a highly integrated DC-DC test structure.

[0047] The pin module includes a first upper pin 1A, a second upper pin 2A, a third upper pin 3A, a fourth upper pin 4A, a fifth upper pin 5A, a sixth upper pin 6A, a seventh upper pin 7A, an eighth upper pin 8A, a ninth upper pin 9A, a tenth upper pin 10A, an eleventh upper pin 11A, a twelfth upper pin 12A, a fourteenth upper pin 14A, a fifteenth upper pin 15A, a sixteenth upper pin 16A, a seventeenth upper pin 17A, an eighteenth upper pin 18A, a nineteenth upper pin 19A, a twentieth upper pin 20A, a twenty-first upper pin 21A, and a twenty-second upper pin 22A, which are distributed on the upper end surface of the test device body;

[0048] The pin module includes several pins that match the pin module.

[0049] Several pins include a first pin 1, a second pin 2, a third pin 3, a fourth pin 4, a fifth pin 5, a sixth pin 6, a seventh pin 7, an eighth pin 8, a ninth pin 9, a tenth pin 10, an eleventh pin 11, a twelfth pin 12, a fourteenth pin 14, a fifteenth pin 15, a sixteenth pin 16, a seventeenth pin 17, an eighteenth pin 18, a nineteenth pin 19, a twentieth pin 20, a twenty-first pin 21, and a twenty-second pin 22.

[0050] A CH module is also provided on the main body of the test device.

[0051] The CH module includes a first CH connection part CH1 , a second CH connection part CH2 , a third CH connection part CH3 , and a fourth CH connection part CH4 .

[0052] in:

[0053] The first upper pin 1A is the positive input of the device and is connected to the Vin+ pin of the device;

[0054] The second upper pin 2A is the negative input of the device and is connected to the Vin- pin of the device;

[0055] The third upper pin 3A is the inhibit terminal, connected to the INH pin of the device;

[0056] The fourth upper pin 4A is the negative output of the device's fourth channel, connected to the Vo4- pin of the device;

[0057] The fifth upper pin 5A is the fourth positive output of the device, connected to the Vo4+ pin of the device;

[0058] The sixth upper pin 6A is the positive output of the device, connected to the Vo1+ pin of the device;

[0059] The seventh upper pin 7A is the negative output of the device's first channel, connected to the device's Vo1- pin;

[0060] The eighth upper pin 8A is the second positive output of the device, connected to the Vo2+ pin of the device;

[0061] The ninth upper pin 9A is the negative output of the device's second channel, connected to the device's Vo2- pin;

[0062] The tenth upper pin 10A is the third positive output of the device, connected to the Vo3+ pin of the device;

[0063] The eleventh upper pin 11A is the negative output of the device's third channel, connected to the device's Vo3- pin;

[0064] The twelfth upper pin 12A is the device input S+, connected to the device's Vin+ pin;

[0065] The fourteenth upper pin 14A is the device input S-, connected to the device's Vin- pin;

[0066] The fifteenth upper pin 15A is the fourth output S- of the device, connected to the S4- pin of the device;

[0067] The sixteenth upper pin 16A is the device's fourth output S+, connected to the device's S4+ pin;

[0068] The seventeenth upper pin 17A is the device's first output S+, connected to the device's S1+ pin;

[0069] The eighteenth upper pin 18A is the first output S- of the device, connected to the S1- pin of the device;

[0070] The nineteenth upper pin 19A is the second output S+ of the device, connected to the S2+ pin of the device;

[0071] The 20th upper pin 20A is the device's second output S-, connected to the device's S2- pin;

[0072] The 21st upper pin 21A is the device's third output S+, connected to the device's S3+ pin;

[0073] The 22nd upper pin 22A is the device's third output S-, connected to the device's S3- pin.

[0074] The testing device body 100 is also provided with a handle module.

[0075] The handle module includes a first handle 23 and a second handle 24 provided on both sides of the test body.

[0076] The testing process includes:

[0077] Set the input voltage and input current and send them to the power module under test. Pin 1: device input positive, connected to the device's Vin+ pin; Pin 2: device input negative, connected to the device's Vin- pin; Pin 3: inhibit terminal, connected to the device's INH pin;

[0078] Control the power module under test to work and obtain the output vector generated by the power module under test:

[0079] The fourth pin 4: the fourth output negative of the device, connected to the Vo4- pin of the device;

[0080] The fifth pin 5: the fourth output positive of the device, connected to the Vo4+ pin of the device;

[0081] Pin 6: positive output of the device, connected to the Vo1+ pin of the device;

[0082] Pin 7: Negative output of the device, connected to the Vo1- pin of the device;

[0083] Pin 8: The second positive output of the device, connected to the Vo2+ pin of the device;

[0084] Pin 9: The second negative output of the device, connected to the Vo2- pin of the device;

[0085] Pin 10: The third positive output of the device, connected to the Vo3+ pin of the device;

[0086] Pin 11: The third output negative of the device, connected to the Vo3- pin of the device;

[0087] The host computer obtains the output voltage and output current according to the output vector;

[0088] The host computer calculates the output efficiency, load regulation and power regulation based on the output voltage, output current, input voltage and input current;

[0089] Whether the power module to be tested functions normally is determined based on the output vector and / or output efficiency and / or load regulation and / or power regulation, and the output vector is sent to the host computer for display.

[0090] The host computer sets the preset output efficiency, load regulation, switching frequency, start-up delay, start-up overshoot, cross regulation and preset power regulation;

[0091] If the power supply module under test generates an output vector after operation, the output efficiency is consistent with the preset output efficiency, the load regulation rate is consistent with the preset load regulation rate, the switching frequency is consistent with the preset output efficiency, the startup delay is consistent with the preset output efficiency, the startup overshoot is consistent with the preset output efficiency, the cross regulation rate is consistent with the preset output efficiency, and the power regulation rate is consistent with the preset load regulation rate, then the power supply module under test functions normally; if the power supply module under test does not generate an output vector after operation, the output efficiency is inconsistent with the preset output efficiency, the load regulation rate is inconsistent with the preset load regulation rate, the switching frequency is inconsistent with the preset output efficiency, the startup delay is inconsistent with the preset output efficiency, the startup overshoot is inconsistent with the preset output efficiency, the cross regulation rate is inconsistent with the preset output efficiency, and the power regulation rate is inconsistent with the preset load regulation rate, then the power supply module under test functions abnormally.

[0092] The output vector and / or output efficiency and / or load regulation and / or line regulation determine whether the power module under test functions normally and sends the output vector to the test system for display. The display also includes:

[0093] The timing analyzer obtains the output voltage ripple and sends the output voltage ripple measurement result to the test system for display.

[0094] The oscilloscope obtains the output voltage switching frequency and sends the output voltage ripple measurement results to the test system for display.

[0095] The host computer obtains whether the prohibition end function is normal based on the output vector and sends the analysis result to the test system for display.

[0096] The oscilloscope obtains the input and output voltages and startup time according to the output vector, and the startup delay measurement results are sent to the test system for display.

[0097] The oscilloscope obtains the output voltage based on the output vector and sends the startup overshoot measurement result to the test system for display.

[0098] This embodiment can also form a highly integrated detection structure, see Figure 5, a setting unit, a main control unit, a data transceiver unit and a calculation unit; the setting unit is used to set the input voltage and input current; the main control unit is connected to the setting unit, and the main control unit is used to generate an input voltage vector and an input current vector according to the input voltage and input current; the data transceiver unit is connected to both the main control unit and the power module to be tested, and the data transceiver unit is used to send the input voltage vector and input current vector generated by the main control unit to the power module to be tested, and transmit the output vector generated by the power module back to the main control unit so that the main control unit obtains the output voltage and output current; the calculation unit is connected to the main control unit, and the calculation unit is used to calculate the output efficiency, load regulation rate and power regulation rate according to the output voltage, output current, input voltage and input current.

[0099] The power module detection device also includes a power supply unit, which is connected to the setting unit, the main control unit, the data transceiver unit and the calculation unit to supply power to the setting unit, the main control unit, the data transceiver unit and the calculation unit.

[0100] The power module detection device also includes an oscilloscope sampling unit, which is connected to both the main control unit and the oscilloscope. The main control unit is connected to the oscilloscope through the oscilloscope sampling unit; wherein the main control unit obtains the output voltage ripple according to the output vector and sends it to the oscilloscope through the oscilloscope sampling unit so that the output voltage ripple is displayed on the oscilloscope.

[0101] The power module detection device also includes multiple groups of test points, each group of test points includes multiple test points, and the multiple groups of test points are connected to the power module to be tested and the data transceiver unit. The multiple groups of test points are used to connect external multimeters and oscilloscopes to visually detect the output vector.

[0102] During testing, the input voltage and input current are set and sent to the power module under test; the power module under test is controlled to operate and the output vector generated by the power module under test is obtained; the output voltage and output current are obtained based on the output vector; the ripple, efficiency, line regulation, load regulation, cross regulation, inhibit terminal function, startup overshoot, startup delay, and switching frequency are calculated based on the output voltage, output current, input voltage, and input current; the function of the power module under test is determined to be normal based on the output vector and / or output efficiency and / or load regulation and / or line regulation, and the output vector is sent to the test system for display. This solves the problem of automated testing of all static parameters of DC-DC power modules.

[0103] The above are only some embodiments of the present invention. For those skilled in the art, several modifications and improvements can be made without departing from the inventive concept of the present invention, and these all fall within the scope of protection of the present invention.

Claims

1. A highly integrated DC-DC test device, characterized by: The test device comprises a main body, on which a pin module and a pin module are provided for use together; The dedicated test socket of the DUT device under test is connected to the adapter board, which matches and connects to the pin module. The pin module is connected to the mother fixture of the machine to obtain all test signals output by related equipment and feed them back to the host computer, forming a highly integrated DC-DC test structure; The pin module includes a first upper pin, a second upper pin, a third upper pin, a fourth upper pin, a fifth upper pin, a sixth upper pin, a seventh upper pin, an eighth upper pin, a ninth upper pin, a tenth upper pin, an eleventh upper pin, a twelfth upper pin, a fourteenth upper pin, a fifteenth upper pin, a sixteenth upper pin, a seventeenth upper pin, an eighteenth upper pin, a nineteenth upper pin, a twentieth upper pin, a twenty-first upper pin, and a twenty-second upper pin, which are distributed on the upper end surface of the test device body; The pin module includes several pins that match the pin module.

2. The highly integrated DC-DC test device according to claim 1, characterized in that: The plurality of pins include a first pin, a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, a tenth pin, an eleventh pin, a twelfth pin, a fourteenth pin, a fifteenth pin, a sixteenth pin, a seventeenth pin, an eighteenth pin, a nineteenth pin, a twentieth pin, a twenty-first pin, and a twenty-second pin.

3. The highly integrated DC-DC test device according to claim 2, characterized in that: A CH module is also provided on the main body of the test device.

4. The highly integrated DC-DC test device according to claim 3, characterized in that: The CH module includes a first CH connection part, a second CH connection part, a third CH connection part, and a fourth CH connection part.

5. The highly integrated DC-DC test device according to claim 2, characterized in that: The first upper pin is the positive input of the device, connected to the Vin+ pin of the device; The second upper pin is the negative input of the device and is connected to the Vin- pin of the device; The third upper pin is the inhibit terminal, connected to the INH pin of the device; The fourth upper pin is the negative output of the device's fourth channel, connected to the Vo4- pin of the device; The fifth upper pin is the 4th output positive of the device, connected to the Vo4+ pin of the device; The sixth upper pin is the positive output of the device, connected to the Vo1+ pin of the device; The seventh upper pin is the negative output of the device's first channel, connected to the Vo1- pin of the device; The eighth upper pin is the second positive output of the device, connected to the Vo2+ pin of the device; The ninth upper pin is the negative output of the device's second channel, connected to the device's Vo2- pin; The tenth upper pin is the third positive output of the device, which is connected to the Vo3+ pin of the device.

6. The highly integrated DC-DC test device according to claim 5, characterized in that: The eleventh upper pin is the negative output of the device's third channel, connected to the Vo3- pin of the device; The twelfth upper pin is the device input S+, connected to the device's Vin+ pin; The fourteenth upper pin is the device input S-, connected to the device's Vin- pin; The fifteenth upper pin is the 4th output S- of the device, connected to the S4- pin of the device; The upper sixteenth pin is the 4th output S+ of the device, which is connected to the S4+ pin of the device; The seventeenth upper pin is the device's first output S+, connected to the device's S1+ pin; The eighteenth upper pin is the device's first output S-, connected to the device's S1- pin; The upper nineteenth pin is the second output S+ of the device, which is connected to the S2+ pin of the device; The 20th upper pin is the device's second output S-, connected to the device's S2- pin; The 21st upper pin is the device's third output S+, connected to the device's S3+ pin; The 22nd upper pin is the device's third output S-, which is connected to the device's S3- pin.

7. The highly integrated DC-DC test device according to claim 6, characterized in that: The main body of the test device is also provided with a handle module.

8. The highly integrated DC-DC test device according to claim 7, characterized in that: The handle module includes a first handle and a second handle which are arranged on both sides of the test body.

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