Discrete device packaging structure

Abstract

The utility model belongs to the technical field of semiconductor devices, and discloses a discrete device packaging structure, which comprises a heat-conducting insulating plate, a titanium-silver composite layer, a copper plate layer and a chip which are sequentially stacked from bottom to top, and also comprises a plastic package body, the copper plate layer partially extends out of the heat-conducting insulating plate to form pins, and each electrode of the chip is electrically connected with the corresponding pin; the plastic package body carries out plastic package on the heat-conducting insulating plate, the titanium-silver composite layer, the copper plate layer except the pins and the chip, and the back surface of the heat-conducting insulating plate is exposed. Therefore, both thermal conductivity and insulativity can be effectively considered.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a discrete device packaging structure. Background Art

[0002] Among existing discrete device packaging structures, the vast majority are semi-insulating packages (such as TO247, TO220, etc.), which use a vertical chip with one of the chip's conductive electrodes welded to a metal bracket, leaving the bottom of the metal bracket exposed. When in use, this type of package needs to be bonded to the heat sink at the bottom of the device. To prevent a short circuit between the high potential and the ground, an additional layer of insulating medium, such as a mica sheet, silicone pad, or ceramic sheet, needs to be added between the two. Although the use of an insulating medium can block the conductive path between the metal backplate and the heat sink, avoiding the risk of short circuits, the thermal conductivity and insulation properties of the insulating medium are not uniform, and its thermal conductivity is generally not as good as direct contact, which greatly affects the heat dissipation effect of the device during use. As a result, thermal conductivity and insulation cannot be taken into account at the same time, which makes it quite inconvenient for customers to use.

[0003] Another type of fully insulated packaged discrete device exists in the prior art. This method encapsulates the entire metal frame, except for the pins, with a plastic package. This significantly enhances the device's insulation during use. However, the poor thermal conductivity of commonly used plastic packaging materials hinders chip heat dissipation, significantly reducing device reliability. Poor heat dissipation can increase chip temperature, potentially leading to performance degradation or even damage.

[0004] Therefore, existing discrete device packaging structures lack the ability to balance thermal conductivity and insulation, failing to fully meet the demands of practical applications. In particular, achieving efficient heat dissipation while maintaining good insulation is a key challenge facing current discrete device packaging technology in applications requiring high-power heat dissipation.

[0005] In view of the above problems, the existing technology is in urgent need of improvement. Utility Model Content

[0006] The purpose of this application is to provide a discrete device packaging structure that can effectively balance thermal conductivity and insulation.

[0007] The present application provides a discrete device packaging structure, comprising a heat-conducting insulating plate, a titanium-silver composite layer, a copper plate layer, and a chip stacked sequentially from bottom to top, and also comprising a plastic package;

[0008] The copper plate layer partially extends out of the thermally conductive insulating plate to form pins, and each electrode of the chip is electrically connected to the corresponding pins; the plastic package body plastic-packages the thermally conductive insulating plate, the titanium-silver composite layer, the portion of the copper plate layer except the pins, and the chip, and the back side of the thermally conductive insulating plate is exposed.

[0009] Preferably, the heat-conducting insulating plate is a diamond plate or a heat-conducting ceramic plate.

[0010] Preferably, the titanium-silver composite layer comprises a titanium layer and a silver layer, and the silver layer is located on the upper side of the titanium layer.

[0011] Preferably, the thickness of the titanium layer is 100 nm, and the thickness of the silver layer is 1 μm.

[0012] Preferably, the thickness of the copper plate layer is 0.5mm-0.8mm;

[0013] The thickness of the thermally conductive insulating plate is 0.38 mm to 0.5 mm.

[0014] Preferably, the copper plate layer includes a main body and a plurality of pins, and the chip is arranged on the main body.

[0015] Preferably, one of the electrodes of the chip is located at the bottom of the chip, and the other electrodes are located at the top of the chip. The pins corresponding to the electrodes located at the bottom are integrated with the main body, and the other pins are independent of the main body. Each of the other pins is connected one-to-one with the electrodes located at the top of the chip through a lead.

[0016] Preferably, the chip has a drain, a source, a gate and a Kelvin pole; the drain is arranged at the bottom of the chip; the lead wire diameter between the source and the corresponding pin is 12mil-15mil, the lead wire diameter between the gate and the corresponding pin is 4mil-5mil, and the lead wire diameter between the Kelvin pole and the corresponding pin is 4mil-5mil.

[0017] Preferably, a plurality of first notches are arranged at intervals on the edge of the main body.

[0018] Preferably, an arc-shaped notch is provided at a position close to the plastic package body where the portion of the pin extending out of the plastic package body is located.

[0019] Beneficial effect: The discrete device packaging structure provided in the present application adopts a thermally conductive insulating plate as the bottom and exposes it to the outside, and is plastic-sealed at the same time, which effectively solves the problem of balancing thermal conductivity and insulation in the existing technology, and has the advantages of good thermal conductivity and insulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A side view of the discrete device packaging structure provided in an embodiment of the present application.

[0021] Figure 2 This is a top view of the discrete device packaging structure provided in an embodiment of the present application.

[0022] Figure 3 This is a comparison chart of the overall temperature distribution of the simulation model.

[0023] Figure 4 This is a comparison chart of chip temperature distribution of the simulation model.

[0024] Figure 5 This is the parasitic parameter curve of simulation model 1.

[0025] Figure 6 This is the parasitic parameter curve of simulation model 2.

[0026] Explanation of reference numerals: 1. Thermally conductive insulating plate; 2. Titanium-silver composite layer; 3. Copper plate layer; 301. Pin; 302. Main body; 303. First notch; 304. Arc-shaped notch; 4. Chip; 5. Plastic package; 6. Lead. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work fall within the scope of protection of the present application.

[0028] It should be noted that similar reference numerals and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and should not be understood as indicating or implying relative importance.

[0029] Please refer to Figure 1-Figure 2 In some embodiments of the present application, a discrete device packaging structure includes a thermally conductive insulating plate 1, a titanium-silver composite layer 2, a copper plate layer 3, and a chip 4 stacked sequentially from bottom to top, and also includes a plastic package 5;

[0030] The copper plate layer 3 partially extends out of the thermally conductive insulating plate 1 to form pins 301, and each electrode of the chip 4 is electrically connected to the corresponding pins 301; the plastic package 5 plastic-packages the thermally conductive insulating plate 1, the titanium-silver composite layer 2, the portion of the copper plate layer 3 except the pins 301, and the chip 4, and the back side (i.e., the lower surface) of the thermally conductive insulating plate 1 is exposed.

[0031] It should be noted that the up and down directions in this application are based on Figure 1The description of the placement direction is for the convenience of description and does not limit the orientation during use.

[0032] The heat-conducting insulating plate 1 is a plate-like structure having both heat-conducting and electrical-insulating capabilities, and is mainly used to conduct away the heat generated by the chip 4 and provide electrical insulation.

[0033] Among them, the titanium-silver composite layer 2 is a composite structure layer arranged between different material layers, which can be formed by processes such as sputtering, evaporation or electroplating, and is mainly used to improve the adhesion between adjacent layers. The titanium-silver composite layer 2 provides bonding ability between the thermally conductive insulating plate 1 and the copper plate layer 3. This bonding ability ensures a firm bond between the two different material layers, thereby maintaining the integrity and stability of the packaging structure. Secondly, the titanium-silver composite layer 2 acts as a diffusion barrier layer, which can prevent the mutual penetration or diffusion of materials between the thermally conductive insulating plate 1 and the copper plate layer 3 under high temperature or long-term operating conditions. This barrier effect is important for maintaining the performance integrity of each layer of material and the long-term operation reliability of the packaging structure. Compared with the connection structure using titanium-nickel-silver composite layers or other titanium silver and multiple metal composite layers, the titanium-silver composite layer 2 of the present application has the following advantages:

[0034] Since nickel has relatively poor thermal conductivity, it will become a bottleneck in heat conduction and weaken the heat dissipation capacity. The titanium-silver composite layer 2 can avoid this problem, thus having better thermal conductivity.

[0035] Since the titanium-silver composite layer 2 has only two metal layers, it can be prepared by only two sputtering or electroplating processes, which has higher preparation efficiency and lower preparation cost;

[0036] Multilayer interfaces are more likely to introduce microvoids or brittle metal compounds (such as Ni-Sn), reducing long-term reliability. However, the titanium-silver composite layer 2 of the present application has fewer interlayer interfaces and therefore has higher long-term reliability.

[0037] Nickel is ferromagnetic and easily introduces eddy current loss in high-frequency applications, affecting signal integrity. Therefore, the titanium-silver composite layer 2 has less impact on signal integrity than the titanium-nickel-silver composite layer.

[0038] The copper plate layer 3 is a plate-like structure with electrical and thermal conductivity, which can be formed into a specific shape by processes such as stamping or etching. It is mainly used to carry the chip 4, conduct current and heat, and form external connection pins.

[0039] The plastic package body 5 is used to encapsulate the internal structure and is a protective layer. It can be formed by plastic packaging materials such as epoxy resin or silicone. It is mainly used to protect internal components from environmental influences and provide mechanical support and electrical insulation.

[0040] Among them, the exposed back side of the thermally conductive insulating plate 1 refers to the structural state in which the side of the thermally conductive insulating plate 1 facing the external heat sink is not covered by the plastic package 5. It is mainly used to achieve direct contact between the thermally conductive insulating plate 1 and the external heat sink, thereby utilizing the heat conduction and insulation capabilities of the thermally conductive insulating plate 1 itself.

[0041] The package structure is constructed using a stacked structure. Chip 4 is placed on copper plate layer 3, and heat generated by chip 4 is transferred downward to copper plate layer 3. Copper plate layer 3 is connected to thermally conductive insulating plate 1 via titanium-silver composite layer 2. Heat is further transferred to thermally conductive insulating plate 1 through titanium-silver composite layer 2. Thermally conductive insulating plate 1, as the bottom layer of the package structure, has its backside directly exposed, allowing heat to be efficiently transferred from thermally conductive insulating plate 1 to an external heat sink. Furthermore, the thermally conductive insulating plate 1 material itself has electrical insulation properties, isolating the electrical path between copper plate layer 3 and the external heat sink, thus preventing the risk of short circuits. Portions of copper plate layer 3 extend to form pins 301, which extend outside the plastic package 5 for electrical connection to external circuits. The electrodes of chip 4 are electrically connected to the corresponding pins 301, enabling signal and current transmission. The plastic package 5 covers the thermally conductive insulating plate 1, titanium-silver composite layer 2, copper plate layer 3 (excluding pins 301), and chip 4, providing environmental protection, mechanical support, and electrical insulation for the internal structure. The entire structure works together to achieve effective heat dissipation from the chip and secure electrical connection of the device.

[0042] Through the above solution, the present application achieves a discrete device packaging structure that simultaneously achieves heat conduction and electrical insulation without the need for an additional insulating medium. Heat is efficiently conducted through the thermally conductive insulating plate 1, and electrical insulation is provided by the thermally conductive insulating plate 1 itself. This avoids the difficulty of balancing heat conduction and electrical insulation in traditional solutions and facilitates direct connection of the device to an external heat sink.

[0043] Optionally, the heat-conducting insulating plate 1 is a diamond plate or a heat-conducting ceramic plate.

[0044] The diamond plate refers to a plate-like structure made of diamond material. The thermal conductive ceramic plate refers to a plate-like structure made of ceramic material with high thermal conductivity, which can be made of ceramic materials such as aluminum nitride, aluminum oxide, and silicon nitride.

[0045] By limiting the thermally conductive insulating plate 1 to a diamond plate or a thermally conductive ceramic plate, these materials themselves have the characteristics of high thermal conductivity and high insulation. Combined with the structure of the exposed back of the thermally conductive insulating plate 1, the high thermal conductivity plate can efficiently conduct the heat generated by the chip 4 to the bottom, and closely contact with the external heat sink through the exposed back, thereby achieving effective heat dissipation and reducing the temperature of the chip 4. At the same time, the high insulation plate can provide reliable electrical insulation, isolate the potential difference that may exist between the bottom of the device and the heat sink, avoid the risk of short circuit, and improve the safety and reliability of the device. Therefore, choosing a diamond plate or a thermally conductive ceramic plate as the thermally conductive insulating plate 1 can give full play to its thermal conductivity and insulation properties, further optimize the heat dissipation effect and insulation reliability of the packaging structure, better solve the problem of thermal conductivity and insulation being difficult to balance in the existing technology, and provide convenience for downstream applications.

[0046] Preferably, the titanium-silver composite layer 2 includes a titanium layer and a silver layer, and the silver layer is located on the upper side of the titanium layer.

[0047] Titanium was chosen as the lower layer of the composite layer because it has good wettability and chemical reactivity with a variety of thermally conductive and insulating materials, such as ceramics or diamond, and can form a strong interfacial bond, thereby ensuring reliable adhesion between the titanium-silver composite layer 2 and the thermally conductive insulating plate 1. Silver was chosen as the upper layer of the composite layer because silver has excellent electrical and thermal conductivity, and can efficiently transmit electrical signals and heat. The silver layer is positioned on the upper side of the titanium layer. This specific stacking order is intended to optimize the functions of each layer. The titanium layer is located below, close to the thermally conductive insulating plate 1, and mainly provides strong adhesion; the silver layer is located above, close to the copper plate layer 3, and mainly provides an efficient electrical and thermal conduction channel. In addition, the titanium layer can also act as a diffusion barrier, preventing silver atoms from diffusing into the thermally conductive insulating plate 1 and maintaining the stability of the interface structure. The thickness of the titanium and silver layers can be adjusted according to specific application requirements and preparation processes.

[0048] Through the above-described structure and operating principle, the proposed solution effectively addresses the issues of a weak connection between the thermally conductive insulating plate 1 and the copper plate layer 3, as well as insufficient thermal and electrical conductivity. By defining the specific composition and stacking sequence of the titanium-silver composite layer 2, a strong connection and efficient thermal and electrical transfer between the thermally conductive insulating plate 1 and the copper plate layer 3 are achieved, thereby improving the reliability and performance of the discrete device packaging structure.

[0049] In some preferred embodiments, the thickness of the titanium layer is 100 nm, and the thickness of the silver layer is 1 μm.

[0050] The thickness of the titanium layer is limited to 100nm. The titanium layer acts as an adhesion layer, which can enhance the adhesion between the silver layer and the underlying heat-conducting insulating plate 1, ensuring a firm bond between the layers. The thickness of 100nm takes into account both material cost and process feasibility while ensuring effective adhesion. The thickness of the silver layer is limited to 1μm. The silver layer has electrical and thermal conductivity and welding capabilities, and is used to form a connection with the upper copper plate layer 3. The thickness of 1μm is sufficient to provide a heat conduction path and a welding interface, while avoiding the cost increase and process complexity caused by the silver layer exceeding a specific thickness. By setting the thickness of the titanium layer to 100nm and the thickness of the silver layer to 1μm, the two work together to enable the titanium-silver composite layer 2 to establish a connection between the heat-conducting insulating plate 1 and the copper plate layer 3 that is both firm and electrically conductive and highly efficient, solving problems such as insufficient adhesion, insufficient welding reliability, insufficient thermal conductivity or high cost that may occur when the thickness is not limited, thereby improving the performance and reliability of the entire packaging structure.

[0051] In some preferred embodiments, the thickness of the copper plate layer 3 is 0.5 mm to 0.8 mm;

[0052] The thickness of the heat-conducting insulating plate 1 is 0.38 mm to 0.5 mm.

[0053] The thickness ranges of the copper plate layer 3 and the thermally conductive insulating plate 1 defined in this application are determined based on the basic discrete device packaging structure to address the problem of performance imbalance caused by improper selection of the thickness of each layer. The thickness of the copper plate layer 3 is limited to between 0.5mm and 0.8mm, which can ensure sufficient electrical conductivity to carry current, provide reliable electrical connections, and have the necessary mechanical strength, while avoiding the increase in material cost and volume or adverse effects on overall thermal resistance due to excessive thickness. The thickness of the thermally conductive insulating plate 1 is limited to between 0.38mm and 0.5mm, which can ensure that the insulation and withstand voltage requirements required by the device are met while providing low thermal resistance, so that the heat generated by the chip 4 can be effectively conducted away through the thermally conductive insulating plate 1. By limiting the thickness of the copper plate layer 3 and the thermally conductive insulating plate 1 to these specific ranges, this solution optimizes the electrical performance, mechanical performance, insulation performance, and heat dissipation performance of the device, especially in terms of thermal conductivity and insulation, providing a better performance balance, thereby improving the reliability and applicability of the device.

[0054] In some embodiments, see Figure 2 The copper plate layer 3 includes a main body 302 and a plurality of pins 301 , and the chip 4 is arranged on the main body 302 .

[0055] The main body 302 refers to the main area of ​​the copper plate layer 3 used to support the chip 4, which can be implemented as a plate-shaped structure with a certain area. The pins 301 refer to the extended portion of the copper plate layer 3 used to achieve electrical connection with the external circuit. They are generally strip-shaped, but can also be sheet-shaped or other suitable shapes for connection. The chip 4 is spatially located above or on the surface of the main body 302 and establishes a physical connection with it. This can be achieved by welding, bonding, or other fixing methods.

[0056] The type of chip 4 can be set according to actual needs, for example, a power MOSFET chip, but not limited thereto.

[0057] In some preferred embodiments, one of the electrodes of the chip 4 is located at the bottom of the chip 4, and the other electrodes are located at the top of the chip 4. The pins 301 corresponding to the electrodes located at the bottom are integrally provided with the body 302 (for example Figure 2 The D pin in the figure, whose meaning is introduced later), the other pins 301 are independent of the main body 302, and each other pin 301 is connected to the electrode on the top of the chip 4 through the lead 6 in a one-to-one correspondence.

[0058] The pin 301 corresponding to the electrode at the bottom is integrally provided with the main body 302, meaning that the pin 301 structurally forms a continuous entity with the main body 302. This can be achieved by directly extending from the main body 302 or by forming an integral structure through a high-reliability connection method. The other pins 301 are independent of the main body 302, meaning that these pins 301 are not directly connected to the main body 302. This can be achieved by isolating them with insulating materials such as the plastic package 5. The lead 6 is a conductive material used to establish an electrical connection between the electrode of the chip 4 and the pin 301, and can be implemented as a metal wire (e.g., aluminum wire).

[0059] By adopting the above scheme, the present application can achieve the following technical effects. One of the electrodes of chip 4 is set at the bottom and connected to the pin 301 integral with the main body 302, providing a current transmission path and a heat dissipation channel for the electrode, reducing the resistance on the current path, reducing power loss, and allowing the heat generated by chip 4 during operation to be conducted away, thereby reducing the temperature of chip 4 and improving the power handling capacity and reliability of the device. At the same time, the other electrodes of chip 4 are set at the top and connected to the pin 301 independent of the main body 302 through the lead 6, providing a connection method for these electrodes. The length and direction of the lead 6 can be adjusted according to the actual electrode layout and functional requirements of the chip 4, simplifying the wiring inside the package and ensuring the reliability of the connection between the top electrode and the external circuit. This scheme combining the bottom integral connection and the top lead connection, based on the structure in which the chip 4 is set at the main body 302, improves the electrical and thermal performance of the package and improves the performance and reliability of the discrete device packaging structure.

[0060] In some possible implementations, see Figure 2 , the chip 4 has a drain, a source, a gate and a Kelvin electrode; the drain is arranged at the bottom of the chip 4 (thereby, the drain pin is integrally arranged with the body portion 302, such as Figure 2 D pin in the source and the corresponding pin (ie source pin, such as Figure 2 The wire diameter of the lead 6 between the gate and the corresponding pin (i.e. the gate pin, such as Figure 2 The lead wire diameter between the G pin in the figure is 4mil-5mil, and the Kelvin pole and the corresponding pin (ie the Kelvin pole pin, such as Figure 2 The wire diameter of lead 6 between the K pins in the module is 4mil-5mil.

[0061] The wire diameter of the lead wire 6 refers to the diameter of the lead wire 6 .

[0062] Specifically, the drain is located at the bottom of the chip 4 and connected to the integrally arranged pin 301. This integrated connection provides a low-resistance path, facilitating the extraction of large currents. The source, gate, and Kelvin electrode are located at the top of the chip 4 and connected to independent pins 301 via leads 6. Considering the functional requirements of the different electrodes, the source, as the main current path, needs to transmit a large current. Therefore, the lead 6 between the source and the corresponding pin 301 is selected to have a relatively thick wire diameter, ranging from 12 mil to 15 mil. This ensures that the lead 6 has sufficient current carrying capacity, can effectively reduce losses and heat generation during current transmission, and thus improve the power handling capability of the device. The gate and Kelvin electrode are mainly used to control signal transmission or perform signal detection. Their current is relatively small, but the signal integrity and accuracy requirements are relatively high. Therefore, the wire diameter of the lead 6 between the gate and the corresponding pin 301 and the wire diameter of the lead 6 between the Kelvin electrode and the corresponding pin 301 are selected to be relatively thin, ranging from 4 mil to 5 mil. Using thinner leads 6 can reduce their parasitic inductance and capacitance, which is crucial for improving the switching speed of the device, ensuring rapid response to control signals, and improving the accuracy of signal detection. Through this differentiated lead wire diameter configuration, this application achieves refined optimization of the electrical connections of electrodes with different functions based on the existing electrode layout and pin connection structure, allowing the device to better balance the requirements of high current transmission and signal integrity.

[0063] In some preferred embodiments, see Figure 2 A plurality of first notches 303 are arranged at intervals on the edge of the main body 302 .

[0064] The first notch 303 refers to an inwardly recessed structure along the edge of the main body 302 , which can be realized in a semicircular, rectangular, or trapezoidal shape. The interval arrangement means that the first notches 303 are distributed along the edge of the main body 302 at a certain distance or in a regular pattern.

[0065] The present application increases the circumference of the edge of the main body 302 and forms an irregular shape by setting a plurality of first recesses 303 at intervals on the edge of the main body 302. During the molding process, the liquid molding compound can be better filled into these first recesses 303. After the molding compound is solidified, these parts filled in the first recesses 303 form a mechanical locking structure with the main body 302, fitting together like mortise and tenon joints. This mechanical locking effect and increased contact area significantly improve the adhesion and bonding strength between the molding body 5 and the main body 302, effectively preventing the molding body 5 from cracking or delamination due to factors such as temperature changes and mechanical vibrations during use, thereby ensuring the long-term stability and reliability of the discrete device packaging structure.

[0066] Preferably, see Figure 2An arc-shaped notch 304 may be provided at a position close to the plastic package body 5 where the pin 301 extends out of the plastic package body 5 .

[0067] The portion of the pin 301 extending from the plastic package 5 near the plastic package 5 refers to the transition region where the pin 301 extends from the interior to the exterior of the plastic package 5, and is adjacent to the edge of the plastic package 5. The arcuate notch 304 is a curved recessed structure provided in the transition region, which can be formed by molding or post-processing.

[0068] An arc-shaped notch 304 is provided in the transition area where the pin 301 extends from the plastic package 5. The distribution of stress within the material is typically highly concentrated where the geometry changes dramatically. By introducing the arc-shaped notch 304, the geometry of this area is altered, allowing the stress to be more evenly dispersed along the arc, avoiding the formation of excessively high stress peaks at specific points. This stress dispersion mechanism is particularly important when the pin 301 is subjected to external mechanical loads or internal thermal stress. In this way, the risk of cracking of the plastic package 5 due to excessive stress in this area is effectively reduced, while also enhancing the fracture resistance of the base of the pin 301, thereby improving the mechanical reliability and service life of the entire package structure.

[0069] Wherein, each pin 301 may be provided with one arc-shaped notch 304, or two arc-shaped notches 304 may be symmetrically provided (e.g. Figure 2 shown).

[0070] In order to compare the performance of the packaging structure of the present application with that of the traditional semi-insulating packaging structure, two simulation models were established, wherein the first simulation model is an overall model formed by attaching the traditional semi-insulating packaging structure model to the radiator model. The semi-insulating packaging structure model in the first simulation model includes an Al2O3 gasket, a copper bracket and a chip stacked from bottom to top, and also includes a plastic package. The pins of the copper bracket are connected to the chip via bonding wires. The second simulation model is an overall model formed by attaching the packaging structure model of the present application to the radiator model. The packaging structure model in the second simulation model adopts the discrete device packaging structure mentioned above. The bonding wires in the two models are all Al bonding wires with the same wire diameter, the radiator models are all Al plates with the same specifications, the chips are all SiC chips with the same specifications, and the plastic packages are all made of EMC material. Under the condition that the chip heating power is 10W, and the heat dissipation efficiency of the radiator is set to 10 W / (m²·K), through heat dissipation simulation, the overall temperature distribution comparison of the two simulation models is shown in the figure below. Figure 3 As shown in the figure (where A is the overall temperature distribution diagram of simulation model 1, and B is the overall temperature distribution diagram of simulation model 2), the chip temperature distribution comparison diagram in the two simulation models is shown in the figure Figure 4As shown in (where C is the chip temperature distribution diagram of simulation model 1, and D is the chip temperature distribution diagram of simulation model 2); in addition, parasitic parameter simulation calculation is performed within the 1Hz-1MHz frequency sweep range (the frequency range of the input AC power), and the parasitic parameter curve of simulation model 1 is shown as follows Figure 5 As shown in the figure, the parasitic parameter curve of simulation model 2 is as follows: Figure 6 shown.

[0071] from Figure 4 It can be seen that the maximum temperature of the chip in simulation model 1 is 59.5°C and the minimum is 53.6°C; the maximum temperature of the chip in simulation model 2 is 52°C and the minimum is 47.2°C. Under the same conditions, simulation model 2 has better heat dissipation effect than simulation model 1.

[0072] from Figure 5 and Figure 6 It can be seen that the maximum AC resistance of simulation model 1 is 27.391mΩ, and the maximum AC inductance is 35.262nH; the maximum AC resistance of simulation model 2 is 8.832mΩ, and the maximum AC inductance is 27.96nH. Under the same frequency sweep conditions, simulation model 2 has smaller AC resistance and smaller AC inductance than simulation model 1.

[0073] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A discrete device packaging structure, characterized in that: It comprises a heat-conducting insulating plate (1), a titanium-silver composite layer (2), a copper plate layer (3) and a chip (4) stacked in sequence from bottom to top, and also comprises a plastic package (5); The copper plate layer (3) partially extends out of the heat-conducting insulating plate (1) to form a pin (301), and each electrode of the chip (4) is electrically connected to the corresponding pin (301); the plastic package (5) plastic-packages the heat-conducting insulating plate (1), the titanium-silver composite layer (2), the portion of the copper plate layer (3) other than the pin (301), and the chip (4), and the back side of the heat-conducting insulating plate (1) is exposed.

2. The discrete device packaging structure according to claim 1, wherein: The heat-conducting insulating plate (1) is a diamond plate or a heat-conducting ceramic plate.

3. The discrete device packaging structure according to claim 1, wherein: The titanium-silver composite layer (2) comprises a titanium layer and a silver layer, and the silver layer is located on the upper side of the titanium layer.

4. The discrete device packaging structure according to claim 3, wherein: The thickness of the titanium layer is 100 nm, and the thickness of the silver layer is 1 μm.

5. The discrete device packaging structure according to claim 1, wherein: The thickness of the copper plate layer (3) is 0.5 mm to 0.8 mm; The thickness of the heat-conducting insulating plate (1) is 0.38 mm to 0.5 mm.

6. The discrete device packaging structure according to claim 1, wherein: The copper plate layer (3) comprises a main body (302) and a plurality of pins (301), and the chip (4) is arranged on the main body (302).

7. The discrete device packaging structure according to claim 6, wherein: One of the electrodes of the chip (4) is located at the bottom of the chip (4), and the other electrodes are located at the top of the chip (4). The pins (301) corresponding to the electrodes located at the bottom are integrally arranged with the main body (302), and the other pins (301) are independent of the main body (302). Each of the other pins (301) is connected to the electrodes located at the top of the chip (4) in a one-to-one correspondence through a lead (6).

8. The discrete device packaging structure according to claim 7, wherein: The chip (4) has a drain, a source, a gate, and a Kelvin electrode; the drain is arranged at the bottom of the chip (4); the lead (6) between the source and the corresponding pin (301) has a wire diameter of 12 mil to 15 mil, the lead (6) between the gate and the corresponding pin (301) has a wire diameter of 4 mil to 5 mil, and the lead (6) between the Kelvin electrode and the corresponding pin (301) has a wire diameter of 4 mil to 5 mil.

9. The discrete device packaging structure according to claim 6, wherein: A plurality of first notches (303) are arranged at intervals on the edge of the main body portion (302).

10. The discrete device packaging structure according to claim 1, wherein: An arc-shaped notch (304) is provided at a position close to the plastic package body (5) on the portion of the pin (301) extending out of the plastic package body (5).

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