Chip packaging structure and electronic equipment

Abstract

The utility model discloses a chip packaging structure and an electronic device. The chip packaging structure comprises a first substrate; the second substrate and the first substrate are arranged in parallel in a spaced mode; the solder balls are arranged on the first substrate and located between the first substrate and the second substrate so as to connect the first substrate with the second substrate; and the hard supporting ball is arranged on the first base plate and is positioned between the first base plate and the second base plate so as to connect the first base plate and the second base plate. According to the chip packaging structure provided by the utility model, the first substrate and the second substrate are supported by adopting a mode of combining the solder balls and the hard supporting balls, and the problem of insufficient supporting performance of pure solder balls is solved. And meanwhile, the problem of high cost of a pure hard supporting ball is solved, and the packaging cost is reduced while the stability of the chip packaging structure is met.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging, and more specifically, to a chip packaging structure and electronic equipment. Background Art

[0002] Traditional chip packaging solutions usually use solder balls to interconnect the upper and lower structures. However, when using solder balls as support, the problem of insufficient solder ball support is prone to occur, causing the solder balls to collapse, resulting in the risk of damage to the package and affecting device performance. Utility Model Content

[0003] One purpose of the present invention is to provide a new technical solution for chip packaging structure, which can at least solve the problems in the prior art of using solder balls for support, which may lead to solder ball collapse and damage to the package due to insufficient support of the solder balls.

[0004] The first aspect of the present invention provides a chip packaging structure, including: a first substrate; a second substrate, the second substrate is spaced apart and arranged in parallel with the first substrate; a solder ball, the solder ball is arranged on the first substrate and located between the first substrate and the second substrate to connect the first substrate and the second substrate; a hard support ball, the hard support ball is arranged on the first substrate and located between the first substrate and the second substrate to connect the first substrate and the second substrate.

[0005] Optionally, the solder balls and the hard support balls are arranged in rows at intervals on the first substrate.

[0006] Optionally, the plurality of solder balls are arranged in a row on the first substrate, and the plurality of hard supporting balls surround the plurality of solder balls.

[0007] Optionally, the hard supporting ball includes: a copper ball; and a tin-copper composite layer, wherein the tin-copper composite layer is coated on the outer surface of the copper ball.

[0008] Optionally, the solder balls are respectively bonded to the first substrate and the second substrate and fixed by soldering.

[0009] Optionally, the hard supporting balls are respectively bonded to the first substrate and the second substrate and fixed by soldering.

[0010] Optionally, the first substrate and the second substrate are circuit boards respectively.

[0011] Optionally, a first chip is provided on the first substrate, and a second chip is provided on the second substrate.

[0012] Optionally, the chip packaging structure further includes: a packaging component, wherein the packaging component is provided between the first substrate and the second substrate to encapsulate the first substrate and the second substrate.

[0013] A second aspect of the present invention provides an electronic device, comprising the chip packaging structure described in the above embodiment.

[0014] The chip packaging structure of this utility model uses a combination of solder balls and hard support balls to support the first and second substrates, solving the problem of insufficient support provided by solder balls alone. It also addresses the high cost of hard support balls alone, ensuring the stability of the chip packaging structure while reducing packaging costs.

[0015] Other features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0017] Figure 1 is a schematic structural diagram of a chip packaging structure according to an embodiment of the present utility model;

[0018] Figure 2 is a plan view of a first substrate of a chip packaging structure according to an embodiment of the present utility model;

[0019] Figure 3 It is a manufacturing flow chart of the chip packaging structure according to an embodiment of the present utility model.

[0020] Reference numerals:

[0021] Chip packaging structure 100;

[0022] a first substrate 10;

[0023] a second substrate 20;

[0024] Solder ball 30;

[0025] Hard support ball 40; copper ball 41; tin-copper composite layer 42;

[0026] First chip 51; second chip 52;

[0027] Package 60. DETAILED DESCRIPTION

[0028] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention.

[0029] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present invention, its application, or uses.

[0030] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0031] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0032] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0033] In the specification and claims of this utility model, references to features using the terms "first" or "second" may explicitly or implicitly include one or more of these features. In the description of this utility model, unless otherwise specified, "plurality" means two or more. Furthermore, in the specification and claims, "and / or" refers to at least one of the connected items, and the character " / " generally indicates an "or" relationship between the connected items.

[0034] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0035] In the description of this utility model, it should be noted that, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed connections, removable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediary; and internal connections between two components. Those skilled in the art will understand the specific meanings of these terms in this utility model based on the specific circumstances.

[0036] The chip packaging structure 100 according to an embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

[0037] like Figures 1 to 3 As shown, the chip packaging structure 100 according to an embodiment of the present invention includes a first substrate 10 , a second substrate 20 , solder balls 30 and hard supporting balls 40 .

[0038] Specifically, the second substrate 20 is spaced apart and arranged parallel to the first substrate 10. Solder balls 30 are provided on the first substrate 10 and positioned between the first substrate 10 and the second substrate 20 to connect the first substrate 10 and the second substrate 20. Hard support balls 40 are provided on the first substrate 10 and positioned between the first substrate 10 and the second substrate 20 to connect the first substrate 10 and the second substrate 20.

[0039] In other words, if Figures 1 to 3 As shown, the chip package structure 100 according to an embodiment of the present invention is mainly composed of a first substrate 10, a second substrate 20, solder balls 30, and hard support balls 40. The second substrate 20 is spaced apart and arranged parallel to the first substrate 10. The solder balls 30 are arranged on the first substrate 10 and located between the first substrate 10 and the second substrate 20, and the solder balls 30 can realize the structural interconnection between the first substrate 10 and the second substrate 20.

[0040] The hard support balls 40 are arranged on the first substrate 10, and the hard support balls 40 are located between the first substrate 10 and the second substrate 20. The hard support balls 40 can realize the structural interconnection of the first substrate 10 and the second substrate 20. The hard support balls 40 are made of a material with better structural rigidity to meet the support requirements of the chip packaging structure 100. The tin balls 30 can be used for signal transmission internally, and the hard support balls 40 are located around the package body for signal transmission and support. By adopting a combination of tin balls 30 and hard support balls 40, the support of the first substrate 10 and the second substrate 20 is achieved, which solves the problem of insufficient support of the simple tin balls 30. At the same time, it also solves the problem of high cost of simple hard support balls 40, while meeting the stability of the chip packaging structure 100 and reducing the packaging cost.

[0041] It should be noted that traditional chip packaging solutions usually use solder balls 30 to achieve interconnection between the upper and lower structures. However, when using solder balls 30 as supports, the problem of insufficient support of solder balls 30 is prone to occur. The present invention uses hard support balls 40 to solve the problem of insufficient support of the package body. However, due to the high cost of hard support, if all solder balls 30 are replaced with hard support balls 40, the total cost of packaging will increase. Therefore, the present invention adopts a combination of solder balls 30 and hard support balls 40. The hard support balls 40 are located around the package body for signal transmission and support, and the solder balls 30 are used for signal transmission inside, which can meet the packaging stability and reduce the packaging cost.

[0042] Thus, the chip package structure 100 according to the embodiment of the present invention utilizes a combination of solder balls 30 and rigid support balls 40 to support the first substrate 10 and the second substrate 20, thereby resolving the issue of insufficient support provided by solder balls 30 alone. This also addresses the high cost of rigid support balls 40 alone, ensuring the stability of the chip package structure 100 while reducing packaging costs.

[0043] According to one embodiment of the present invention, Figure 1 and Figure 3 As shown, the solder balls 30 and the hard support balls 40 are arranged in rows spaced apart on the first substrate 10. In other words, the solder balls 30 and the hard support balls 40 can be arranged in rows spaced apart on the first substrate 10, forming a mixed arrangement of the solder balls 30 and the hard support balls 40. The present invention utilizes a combination of solder balls 30 and hard support balls 40, with the hard support balls 40 positioned around the package for signal transmission and support, while the solder balls 30 are used internally for signal transmission. This ensures package stability, prevents the risk of solder balls 30 collapsing and damaging the package when only the solder balls 30 are used for support, and reduces packaging costs.

[0044] According to one embodiment of the present invention, a plurality of solder balls 30 are arranged in a row on the first substrate 10 , and a plurality of hard support balls 40 surround the plurality of solder balls 30 .

[0045] In other words, if Figure 2As shown, a plurality of solder balls 30 can be arranged in rows on the first substrate 10, and a plurality of solder balls 30 can be arranged in an area near the center of the first substrate 10. A plurality of hard support balls 40 can surround the periphery of the plurality of solder balls 30, so that the hard support balls 40 are on the periphery and the solder balls 30 are on the inside, forming a mixed arrangement of the solder balls 30 and the hard support balls 40. The present invention adopts a combination of solder balls 30 and hard support balls 40. The hard support balls 40 are located around the package body for signal transmission and support, and the solder balls 30 are used for signal transmission inside, which can meet the stability of the package and prevent the simple solder balls 30 from being used for support, which may cause the solder balls 30 to collapse and the package body to be damaged, and can also reduce the packaging cost. Of course, the specific number and arrangement of the solder balls 30 and the hard support balls 40 can be specifically designed according to actual needs, and will not be described in detail in the present invention.

[0046] According to an embodiment of the present invention, the hard support ball 40 includes a copper ball 41 and a tin-copper composite layer 42. The tin-copper composite layer 42 is coated on the outer surface of the copper ball 41.

[0047] That is to say, if Figures 1 to 3 As shown, the hard support ball 40 is mainly composed of a copper ball 41 and a tin-copper composite layer 42. Among them, the copper ball 41 serves as the core of the hard support ball 40. Compared with the tin ball 30, the copper ball 41 has greater structural strength and better support. The tin-copper composite layer 42 can be coated on the outer surface of the copper ball 41 to form a copper core ball. The utility model adopts a combination of tin ball 30 and copper core ball. The copper core ball is located around the package body for signal transmission and support, and the tin ball 30 is used for signal transmission inside, which can meet the packaging stability and prevent the risk of the tin ball 30 collapsing and the package body being damaged by the simple tin ball 30 as support, and can also reduce the packaging cost.

[0048] In some specific embodiments of the present invention, the solder balls 30 are respectively bonded to the first substrate 10 and the second substrate 20 and fixed by soldering. The hard support balls 40 are respectively bonded to the first substrate 10 and the second substrate 20 and fixed by soldering.

[0049] In other words, Figure 1 and Figure 3As shown, the radial sides of the solder balls 30 can be respectively connected to the first substrate 10 and the second substrate 20 by solder paste bonding, and can be further fixedly connected by soldering, thereby achieving stable interconnection between the first substrate 10 and the second substrate 20. The radial sides of the hard support balls 40 can be respectively connected to the first substrate 10 and the second substrate 20 by solder paste bonding, and can be further fixedly connected by soldering, thereby achieving stable interconnection between the first substrate 10 and the second substrate 20. By adopting a combination of solder balls 30 and hard support balls 40, the support of the first substrate 10 and the second substrate 20 is achieved, solving the problem of insufficient support of the simple solder balls 30. At the same time, it also solves the problem of high cost of simple hard support balls 40, while meeting the stability of the chip packaging structure 100 and reducing the packaging cost.

[0050] According to one embodiment of the present invention, the first substrate 10 and the second substrate 20 are circuit boards. In other words, the first substrate 10 and the second substrate 20 can be circuit boards, which can be directly used as the substrates of the chip package structure 100 without the need for an additional substrate. This reduces the overall size and material of the chip package structure 100, facilitating a miniaturized and lightweight design of the chip package structure 100.

[0051] According to an embodiment of the present invention, a first chip 51 is provided on the first substrate 10 , and a second chip 52 is provided on the second substrate 20 .

[0052] That is to say, if Figure 1 and Figure 3 As shown, a first chip 51 may be provided on the first substrate 10, and the first chip 51 may be a logic chip. A second chip 52 may be provided on the second substrate 20, and the second chip 52 may be a memory chip. The types and quantities of the first chip 51 and the second chip 52 may be specifically set according to actual needs. The present invention achieves support for the first substrate 10 and the second substrate 20 by adopting a combination of solder balls 30 and hard support balls 40, thereby solving the problem of insufficient support of simple solder balls 30. At the same time, it also solves the problem of high cost of simple hard support balls 40, thereby meeting the stability of the chip packaging structure 100 and reducing the packaging cost.

[0053] According to an embodiment of the present invention, the chip packaging structure 100 further includes: a packaging component 60 , which is disposed between the first substrate 10 and the second substrate 20 to encapsulate the first substrate 10 and the second substrate 20 .

[0054] That is to say, if Figure 1 and Figure 3As shown, the chip packaging structure 100 further includes: a packaging component 60 . The packaging component 60 can be disposed between the first substrate 10 and the second substrate 20 . The packaging component 60 can be made of conventional device packaging materials to achieve overall packaging of the chip packaging structure 100 .

[0055] In the manufacturing process of the chip packaging structure 100 of the present invention, as Figure 3 As shown, first, the first chip 51 can be mounted on the first substrate 10. Then, a hard support ball 40 (copper core ball) is set on the first substrate 10, and at the same time, the tin ball 30 is laser-soldered on the first substrate 10 to form a first component. Then, the second chip 52 is mounted on the second substrate 20. After completion, the second substrate 20 is assembled and mounted together with the first substrate 10. Finally, it is plastic-sealed with packaging materials. The manufacturing process of the chip packaging structure 100 of the present invention adopts a combination of tin balls 30 and hard support balls 40 to achieve support for the first substrate 10 and the second substrate 20, solving the problem of insufficient support of the simple tin balls 30. At the same time, it also solves the problem of high cost of simple hard support balls 40, while meeting the stability of the chip packaging structure 100 and reducing the packaging cost.

[0056] Of course, for those skilled in the art, other structures and working principles of the chip packaging structure 100 are understandable and achievable, and will not be described in detail in the present invention.

[0057] According to a second aspect of the present invention, an electronic device is provided, comprising the chip packaging structure 100 of the aforementioned embodiment. Since the chip packaging structure 100 of the present invention has the aforementioned technical effects, the electronic device of the present invention should also have corresponding technical effects. Specifically, the electronic device of the present invention, employing the chip packaging structure 100 of the aforementioned embodiment, can resolve the issue of insufficient support provided by simple solder balls 30. It also addresses the high cost of simple rigid support balls 40, ensuring the stability of the chip packaging structure 100 while reducing packaging costs.

[0058] Of course, for those skilled in the art, other structures and working principles of the electronic device are understandable and achievable, and will not be described in detail in this utility model.

[0059] Although some specific embodiments of the present invention have been described in detail through examples, those skilled in the art will appreciate that the above examples are for illustration only and are not intended to limit the scope of the present invention. Those skilled in the art will appreciate that modifications may be made to the above embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A chip packaging structure (100), characterized in that: include: a first substrate (10); a second substrate (20), the second substrate (20) being spaced apart and arranged in parallel with the first substrate (10); a solder ball (30), the solder ball (30) being provided on the first substrate (10) and being located between the first substrate (10) and the second substrate (20) so as to connect the first substrate (10) and the second substrate (20); A hard supporting ball (40) is provided on the first substrate (10) and is located between the first substrate (10) and the second substrate (20) to connect the first substrate (10) and the second substrate (20).

2. The chip packaging structure (100) according to claim 1, characterized in that: The solder balls (30) and the hard support balls (40) are arranged in rows at intervals on the first substrate (10).

3. The chip packaging structure (100) according to claim 1, characterized in that: The plurality of solder balls (30) are arranged in a row on the first substrate (10), and the plurality of hard supporting balls (40) surround the periphery of the plurality of solder balls (30).

4. The chip packaging structure (100) according to claim 1, characterized in that: The hard supporting ball (40) comprises: Copper ball (41); A tin-copper composite layer (42) is coated on the outer surface of the copper ball (41).

5. The chip packaging structure (100) according to claim 1, characterized in that: The tin balls (30) are respectively bonded to the first substrate (10) and the second substrate (20) and fixed by soldering.

6. The chip packaging structure (100) according to claim 1, characterized in that: The hard supporting balls (40) are respectively bonded to the first substrate (10) and the second substrate (20) and fixed by soldering.

7. The chip packaging structure (100) according to claim 1, characterized in that: The first substrate (10) and the second substrate (20) are respectively circuit boards.

8. The chip packaging structure (100) according to claim 1, characterized in that: A first chip (51) is provided on the first substrate (10), and a second chip (52) is provided on the second substrate (20).

9. The chip packaging structure (100) according to claim 1, characterized in that: Also includes: A packaging component (60) is provided between the first substrate (10) and the second substrate (20) to package the first substrate (10) and the second substrate (20).

10. An electronic device, characterized in that: A chip packaging structure (100) comprising any one of claims 1-9.

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