Integrated circuit system

Abstract

An integrated circuit system includes a circuit board having a top and a bottom and defining an opening from the top to the bottom. The boil plate has a recessed portion below the bottom of the circuit board and a protrusion having an endpoint surface, where the recessed portion is below the bottom of the circuit board, where the protrusion extends through the opening, and where the endpoint surface is above the top of the circuit board. The semiconductor substrate is located over the top of the circuit board and includes semiconductor elements, and the top boil plate is over the semiconductor substrate, where the bottom boil plate and the top boil plate are configured to dissipate heat from the integrated circuit system.

Description

Technical Field

[0001] The present disclosure relates to an integrated circuit system. Background Art

[0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in integrated circuit materials and design have produced successive generations of integrated circuits. Each generation has smaller and more complex circuits than the previous one. The demand for smaller electronic components has also recently grown, and with it, the need for smaller and more innovative packaging technologies within semiconductor dies. As the packaging density of microelectronic components increases due to technological developments, manufacturers are continually reducing the size of electronic components to meet the increasing demand for smaller components. Another trend in advanced microelectronic components is the increasing use of higher power consumption circuits. To accommodate more tightly packaged, high-power microelectronic components, the thermal dissipation properties of integrated circuit packaging need to be improved.

[0003] In integrated circuit packaging, one or more semiconductor dies may be attached to a heat spreader (sometimes referred to as a heat sink) for heat dissipation. However, heat dissipation is a challenge in semiconductor packaging. Bottlenecks can hinder the efficient dissipation of heat generated within the die within the semiconductor package. Utility Model Content

[0004] In one embodiment, an integrated circuit system includes a circuit board having a top and a bottom and defining an opening from the top to the bottom. The bottom boiling plate has a recessed portion and a protrusion having an end surface, wherein the recessed portion is below the bottom of the circuit board, wherein the protrusion extends through the opening, and wherein the end surface is above the top of the circuit board. A semiconductor substrate is above the top of the circuit board and includes a plurality of semiconductor components. A top boiling plate is above the semiconductor substrate, wherein the bottom boiling plate and the top boiling plate are configured to dissipate heat from the integrated circuit system.

[0005] In another embodiment, an integrated circuit system includes a circuit board having a top and a bottom, and defining an opening extending from the top to the bottom. A semiconductor substrate has a front side and a back side, the front side being located above the top of the circuit board, and comprising a plurality of semiconductor components. A voltage regulator module is located on the back side of the semiconductor substrate and is electrically connected to at least one of the semiconductor components. A bottom heat conducting unit extends through the opening of the circuit board and is thermally connected to the voltage regulator module to dissipate heat from the back side of the semiconductor substrate.

[0006] In another embodiment, an integrated circuit system includes a circuit board having a top and a bottom and defining an opening from the top to the bottom. The bottom boiling plate has a recessed portion and a protrusion having an end surface, wherein the recessed portion is below the bottom of the circuit board, wherein the protrusion extends through the opening, and wherein the end surface is above the top of the circuit board. A semiconductor substrate is above the top of the circuit board and includes a plurality of semiconductor components, the semiconductor substrate having a back side facing the end surface of the bottom boiling plate and a front side, wherein the semiconductor components are formed on the front side. A top boiling plate is above the semiconductor substrate, wherein the bottom boiling plate and the top boiling plate are configured to dissipate heat from the integrated circuit system. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The aspects of the present disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. Note that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

[0008] Figure 1 is a cross-sectional view of an integrated circuit system with bidirectional cooling according to some embodiments;

[0009] Figure 2 yes Figure 1 A cross-sectional view of the top heat conducting unit, the bottom heat conducting unit, and the system board of the integrated circuit system;

[0010] Figure 3 yes Figure 1 Cross-sectional view of the chip-on-wafer-on-substrate (CoWoS), voltage regulation modules (VRMs), electrical connectors, die, and integrated circuit system frame ring;

[0011] Figure 4 According to some embodiments, in a cooling container Figure 1 a cross-sectional view of an integrated circuit system;

[0012] Figures 5 to 8 is a cross-sectional view (with Figure 1 resemblance);

[0013] Figure 9 is a cross-sectional view focusing on front-side components of an integrated circuit system according to some embodiments;

[0014] Figure 10 is a cross-sectional view focusing on backside components of an integrated circuit system according to some embodiments.

[0015]

Explanation of symbols

[0016] 100: Integrated Circuit Systems (Semiconductor Packaging)

[0017] 199: Wafer-on-wafer on substrate (multi-wafer module substrate)

[0018] 200:Substrate

[0019] 201:Front

[0020] 202: Dorsal

[0021] 205: Surroundings

[0022] 210: Grain

[0023] 215:Electrical connector

[0024] 230: Integrated circuit components

[0025] 240: Thermal interface material layer

[0026] 260: Ring

[0027] 262: Inner groove

[0028] 320: Voltage regulation module

[0029] 340: Thermal interface material layer

[0030] 350:Electrical connector

[0031] 351: Part

[0032] 352: Part

[0033] 360: Ring

[0034] 362: Inner groove

[0035] 400: System board

[0036] 401: Top

[0037] 402: Bottom

[0038] 408: Outer Boundary

[0039] 410: Opening

[0040] 415:Inner wall

[0041] 500: Thermal conduction unit

[0042] 510: Part

[0043] 511: Surface

[0044] 512: Surface

[0045] 513: Surface

[0046] 515: Side wall

[0047] 518: Remote

[0048] 530: Part

[0049] 600: Thermal conduction unit

[0050] 608: Boundary

[0051] 610: Part

[0052] 611: Surface

[0053] 612: Surface

[0054] 613: Surface

[0055] 615: Side Wall

[0056] 630: Part

[0057] 705: Mechanical connector

[0058] 706: Mechanical connector

[0059] 800: Coolant

[0060] 810: Bubbles

[0061] 900:Container

[0062] D1: Distance

[0063] D2: Distance

[0064] D3: Distance

[0065] H1: Height

[0066] W3: Width

[0067] W4: Width

[0068] W5: width

[0069] W6: Width DETAILED DESCRIPTION

[0070] The following disclosure provides many different embodiments or examples for implementing the different features of the subject matter provided. Specific examples of components and configurations are described below to simplify the disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, the formation of a first feature above or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features so that the first and second features are not in direct contact. In addition, in various examples, the disclosure may repeat reference numbers and / or letters. This repetition is for the purpose of simplicity and clarity and does not, in itself, define the relationship between the various embodiments and / or configurations discussed.

[0071] Additionally, for ease of description, spatially relative terms such as "beneath," "below," "lower," "above," and "upper," and the like, may be used herein to describe the relationship of one element or feature to another element or feature as illustrated in the figures. These spatially relative terms are intended to encompass different orientations of the elements in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein interpreted accordingly.

[0072] Unless otherwise expressly indicated, all numbers used herein to indicate quantities, material ratios, and physical properties of materials should be understood to be modified by the term "about." When modifying a numerical value in the specification or claims, "about" indicates that the value is within a range of accuracy that is acceptable to one of ordinary skill in the art. Generally, the range of accuracy is ±10%. Thus, "about 10" means between 9 and 11.

[0073] In some specific embodiments herein, a "material layer" is a layer comprising at least 50 wt% of a known material, such as at least 60 wt% of a known material, at least 75 wt% of a known material, or at least 90 wt% of a known material. Furthermore, a layer is a layer comprising at least 50 wt% of a known material, such as at least 60 wt% of a known material, at least 75 wt% of a known material, or at least 90 wt% of a known material. For example, in specific embodiments, each titanium nitride layer and each titanium nitride layer is at least 50 wt%, at least 60 wt%, at least 75 wt% titanium nitride, or at least 90 wt% titanium nitride.

[0074] For the sake of brevity, known techniques related to semiconductor device manufacturing will not be discussed in detail here. In addition, the various tasks and processes discussed here may include more comprehensive processes or processes that have additional functions but are not discussed in detail here. In particular, various processes in semiconductor device manufacturing are known, and therefore, for the sake of brevity, many processes will only be briefly mentioned here or will be deleted entirely without providing known process details. For those with ordinary knowledge in the field, after reading this disclosure in detail, they will understand that the structures disclosed herein can be implemented in various ways and can be included in various semiconductor devices and products. In addition, it is worth noting that the semiconductor device structure includes a varying number of components and that a single component shown can represent multiple components.

[0075] According to various embodiments, an integrated circuit system 100 or semiconductor package 100 having improved heat dissipation capabilities and methods of forming the same are provided. Intermediate stages of forming the semiconductor package 100 are shown. Variations of the embodiments are discussed. Throughout the various figures and illustrated embodiments, like reference numerals are used to represent like elements.

[0076] In some embodiments, a two-phase immersion thermal coolant is used to dissipate heat from heat sources on both sides of a system-on-substrate package design. For example, the heat source, in the form of an integrated circuit component or chip-on-wafer (CoW), is formed on the front side of the substrate, while voltage regulator modules (VRMs) are formed on the back side of the substrate. A top heat transfer unit (such as a top boiling plate) is used to remove heat (i.e., cool) components on the front side of the substrate (i.e., the system-on-chip (SOC) die in a multi-chip module (MCM)). A bottom heat transfer unit (such as a bottom boiling plate) is used to remove heat (i.e., cool) components on the back side of the substrate (i.e., the VRM). To allow thermal coupling from the back side components to the bottom heat transfer unit, a switch or opening is formed in the system board above where the substrate is mounted. Thus, the bottom heat transfer unit (or a portion of the bottom heat transfer unit) extends through the switch or opening in the system board. The outer surfaces of the top and bottom thermally conductive materials provide increased surface area for heat exchange with the hot coolant.

[0077] Placing the voltage regulator module on the back side of the substrate allows the voltage regulator module to be placed closer to the compute die than would otherwise be possible.

[0078] Figure 1 is a schematic diagram of an integrated circuit system 100, shown for clarity. Figure 2 and Figure 3 FIG is a schematic diagram of various components of the integrated circuit system 100 in a separated state. Figure 1 and Figure 3 As shown, integrated circuit system 100 includes a die-on-wafer-on-substrate 199 (i.e., a multi-die module substrate 199). Die-on-wafer-on-substrate 199 can be a 2.5-dimensional integrated circuit (2.5DIC) through-silicon-via (TSV) interposer-based structure. For example, die-on-wafer-on-substrate 199 can include a substrate 200 and one or more dies 210 formed on substrate 200. Substrate 200 can include various layers, including conductive or insulating layers, formed on a semiconductor substrate. Substrate 200 can include various doping configurations based on design requirements (as known in the art). Substrate 200 can also include other semiconductors such as germanium, silicon carbide (SiC), silicon-germanium (SiGe), or diamond. Alternatively, substrate 200 can include a compound semiconductor and / or a semiconductor alloy. Furthermore, substrate 200 can optionally include an epitaxial layer (which can be strained for improved performance), can include silicon-on-insulator (SOI), and / or have other suitable enhancement features.

[0079] exist Figure 1 and Figure 3 In the embodiment of the present invention, each die 210 may include a single semiconductor die or multiple semiconductor dies. In addition, each die 210 may include a single integrated circuit device 230 or multiple integrated circuit devices 230. In some embodiments, the die 210 may include a vertical stack of integrated circuit devices 230 or a lateral side-by-side arrangement of integrated circuit devices 230.

[0080] Substrate 200 has a front side 201 and an opposing back side 202. Front side 201 and back side 202 can be elongated or rectangular. Die 210 can be formed on front side 201 of substrate 200. Substrate 200 can include semiconductor devices, metallization layers, and vias to form electrical interconnects. Each die 210 can be electrically connected to the interconnects via an electrical connector 215. Electrical connector 215 can be a solder ball, bump, microbump, or the like.

[0081] The substrate 200 includes a perimeter 205. In certain embodiments, a top frame or top ring 260 is positioned above the front side 201 and a bottom frame or bottom ring 360 is positioned above the back side of the substrate 200 at the perimeter 205. As described above, the substrate 200 can be elongated or rectangular. Accordingly, the top frame or top ring 260 and the bottom frame or bottom ring 360 can be elongated or rectangular. A top inner groove 262 is defined between opposing sides of the top frame or top ring 260, and a bottom inner groove 362 is defined between opposing sides of the bottom frame or bottom ring 360. The top ring 260 and the bottom ring 360 can clamp the perimeter 205 of the substrate 200 to prevent warping and provide rigidity.

[0082] The die 210 may be positioned in the top inner trench 262 (defined as being between opposing sides of the top frame or top ring 260 ).

[0083] like Figure 1 As shown, a top thermal interface material layer 240 (TIM layer) may be formed on the substrate and above the die 199 on the wafer. Specifically, the top thermal interface material layer 240 may be formed on each die 210. The top thermal interface material layer 240 may be formed in a top inner groove 262 (defined between opposing sides of a top frame or top ring 260). The top thermal interface material layer 240 may be a composite thermal interface material structure including a metal-containing matrix material layer and metal-coated polymer particles (coated in the metal-containing matrix material layer). Other suitable thermal interface material layers may also be used.

[0084] exist Figure 1 In the embodiment of the present invention, the top heat conducting unit 500 is on the front side 201 of the semiconductor substrate 200. Specifically, the top heat conducting unit 500 is on the top thermal interface material layer 240. For example, the top heat conducting unit 500 can contact each of the top thermal interface material layers 240.

[0085] like Figure 1 and Figure 2 As shown, the top heat conducting element 500 can be a boiling plate. The top heat conducting element 500 can have a base portion 510 (having an upper surface 511 and an opposing bottom surface 512). The base portion 510 can terminate laterally at distal ends 518. As shown, the upper surface 511 has a width W5 between the opposing distal ends 518. In addition, the top heat conducting element 500 can have a downwardly projecting protrusion or overhang 530 extending downwardly from the bottom surface 512 toward the distal surface 513 (or bottommost surface). The overhang 530 terminates laterally at the sidewall 515.

[0086] The top heat conducting unit 500 is configured to dissipate heat from the front side 201 of the substrate 200. Therefore, the top heat conducting unit 500 is thermally connected to each top thermal interface material layer 240. Specifically, the distal surface 513 directly contacts each top thermal interface material layer 240.

[0087] The bottom surface 512 of the base portion 510 of the top heat conducting unit 500 may be above the top ring 260. The depending portion 530 of the top heat conducting unit 500 may extend into the top inner groove 262 (defined between opposite sides of the top frame or top ring 260) so that the distal surface 513 is in the top inner groove 262.

[0088] like Figure 1 and Figure 3As shown, the voltage regulator modules 320 are located above the backside 202 of the semiconductor substrate 200, i.e., below the backside 202 in the direction of the figure. Each voltage regulator module 320 can be electrically connected to at least one integrated circuit component 230 formed on the die 210 via an electrical interconnection path through the substrate 200 and the electrical connector 215. In some embodiments, the voltage regulator modules 320 are located in a bottom inner trench 362 (defined between opposite sides of the bottom frame or bottom ring 360).

[0089] like Figure 1 As shown, the integrated circuit system 100 further includes a system board 400. Figure 2 In FIG, a system board 400 is shown having a top portion 401 and a bottom portion 402, and terminating laterally at an outer boundary 408. System board 400 may be a printed circuit board (PCB) or a motherboard containing numerous other components. System board 400 may be elongated or rectangular and may have an opening 410 formed therein. For example, system board 400 may have inner sidewalls 415 bounded by opening 410. Inner sidewalls 415 extend and internally connect top portion 401 and bottom portion 402. In some embodiments, opening 410 is completely bounded by inner sidewalls 415, such that inner sidewalls 415 have no endpoints. In other embodiments, opening 410 is not enclosed, such that inner sidewalls 415 meet and terminate at outer boundary 408 of system board 400. In these embodiments, opening 410 may be viewed as a notch in outer boundary 408. As shown, opening 410 has a width W4.

[0090] In some embodiments, the system board 400 is directly below the bottom frame or bottom ring 360 .

[0091] like Figure 1 As shown, the electrical connector 350 can electrically connect the substrate 200 to the system board 400. Figure 1 、 Figure 2 and Figure 3 , the electrical connector 350 can be located between the back side 202 of the substrate 200 and the top 401 of the system board 400. The electrical connector 350 can be electrically connected to at least one integrated circuit element 230 (formed in the die 210 via an electrical interconnection path through the substrate 200 and the electrical connector 215). In addition, the electrical connector 350 can be electrically connected to selected circuits or elements on the system board 400. In some embodiments, the electrical connector 350 is physically mounted directly on the back side 202 of the substrate 200. In some embodiments, the electrical connector 350 is physically mounted directly on the top 401 of the system board 400.

[0092] In some embodiments, the electrical connector 350 extends from within the bottom inner groove 362 (defined between opposite sides of the bottom frame or bottom ring 360) to outside the bottom inner groove 362. In other words, the upper portion 351 of the electrical connector 350 is within the bottom inner groove 362 and the lower portion 352 of the electrical connector 350 is below and outside the bottom inner groove 362.

[0093] like Figure 1 As shown, the bottom thermal interface material layer 340 may be located on any surface of the voltage regulator module 320 (i.e., below the voltage regulator module 320 in the orientation of the figure). Specifically, the bottom thermal interface material layer 340 is located on each voltage regulator module 320. In some embodiments, the bottom thermal interface material layer 340 is located within the bottom inner groove 362 (defined between opposite sides of the bottom frame or bottom ring 360). The bottom thermal interface material layer 340 may be a composite thermal interface material structure including a metal-containing matrix material layer and metal-coated polymer particles (coated in the metal-containing composite material layer). Other suitable thermal interface material layers may also be used.

[0094] Furthermore, the bottom thermal conductive unit 600 is on the back side 202 of the semiconductor substrate 200 (i.e., below the semiconductor substrate 200 in the direction of the drawing). Specifically, the bottom thermal conductive unit 600 is on any surface of the bottom thermal interface material layer 340 (i.e., below the bottom thermal interface material layer 340 in the direction of the drawing).

[0095] Cross-reference Figure 1 and Figure 2 The bottom heat conducting unit 600 can be a bottom boiling plate. The bottom heat conducting unit 600 can have a base portion 610 having an upper surface 611 and an opposing bottom surface 612. Furthermore, the bottom heat conducting unit 600 can have an upwardly projecting protrusion or platform portion 630 extending from the upper surface 611 to a distal surface 613 (or uppermost surface). The platform portion 630 has sidewalls 615. The platform portion 630 has a width W3 and is located between the opposing sidewalls 615. The base portion 610 has a width W6 and is located between the opposing boundaries 608.

[0096] The bottom thermally conductive unit 600 is configured to dissipate heat from the back side 202 of the substrate 200. Therefore, the bottom thermally conductive unit 600 is thermally connected to the bottom thermal interface material layer 340. Specifically, the distal surface 613 directly contacts the bottom thermal interface material layer 340. The increase in width from width W3 to width W6 can facilitate heat dissipation.

[0097] Cross-reference Figure 1 、 Figure 2 and Figure 3, the upper surface 611 of the base portion 610 of the bottom heat conducting unit 600 may be below the bottom ring 360. The platform portion 630 of the bottom heat conducting unit 600 may extend into the bottom inner groove 362 (defined between opposite sides of the bottom frame or bottom ring 360), so that the distal surface 613 is in the bottom inner groove 362.

[0098] Furthermore, when the width W3 is smaller than the width W4, the platform portion 630 of the bottom heat conducting unit 600 can extend to and through the opening 410 of the system board 400. Therefore, the upper surface 611 can be located below the bottom 402 of the system board 400, while the distal surface 613 is located above the top 401 of the system board 400.

[0099] like Figure 1 As shown, mechanical connectors 706 can be provided to mechanically mount the bottom thermally conductive unit 600 to the system board 400. For example, mechanical connectors 706 (such as pins) can be used to mount opposite ends of the bottom thermally conductive unit 600 to the system board 400. In some embodiments, the mechanical connectors 706 extend through the base portion 610 of the bottom thermally conductive unit 600.

[0100] like Figure 1 As shown, mechanical connectors 705 can be provided to mechanically mount the top thermally conductive unit 500 to the system board 400. For example, mechanical connectors 705 (such as pins) can be used to mount opposite ends of the top thermally conductive unit 500 to the system board 400. In some embodiments, the mechanical connectors 705 extend through the base portion 510 of the top thermally conductive unit 500.

[0101] Mechanical connectors 705 and 706 are used to provide and ensure sufficient strength to allow for optimal thermal contact between thermal components within integrated circuit system 100 .

[0102] As constructed, Figure 1 The integrated circuit system 100 is configured to be cooled by immersion cooling, for example, by two-phase immersion cooling. Figure 4 As shown, the integrated circuit system 100 can be located in a coolant 800, such as a dielectric coolant. Heat from the integrated circuit system 100 is conducted to the top heat conducting unit 500 and the bottom heat conducting unit 600. The heat in the top heat conducting unit 500 and the bottom heat conducting unit 600 can cause the coolant 800 to boil, forming bubbles 810. The boiling effect removes heat from the integrated circuit system 100. In addition, the coolant 800 can be designed to have a desired boiling point, such as a boiling point lower than that of water. The lower boiling point allows the integrated circuit system 100 to operate continuously at full power without the risk of failure due to overheating.

[0103] In some embodiments, the integrated circuit system 100 may be placed vertically in a container 900 containing a cooling liquid 800 (ie, the substrate 200 extends vertically or nearly vertically, such as Figure 4 As shown in FIG. 4 , the air bubbles 810 are not confined, such as below the bottom surface 612 of the bottom heat conducting unit 600 .

[0104] refer to Figure 5 , which shows the initial stage of fabrication of the integrated circuit system 100. Figure 5 As shown, a die-on-wafer-on-substrate 199 (such as a system-on-wafer die in a multi-die module) is provided. In addition, the die-on-wafer-on-substrate 199 includes a substrate 200, a die 210 (formed on a front side 201 of the substrate 200), and an electrical connector 215 (electrically interconnecting the substrate 200 and the die 210). Figure 5 As shown, the manufacturing method includes forming a voltage regulating module 320 on the back side 202 of the substrate 200. In addition, the method includes forming an electrical connector 350 on the back side 202 of the substrate 200. In addition, the method includes folding the substrate 200 between the top ring 260 and the bottom ring 360.

[0105] like Figure 5 As shown, the method includes forming a top thermal interface material layer 240 on the die 210 , and forming a bottom thermal interface material layer 340 on the voltage regulator module 320 .

[0106] Methods Figure 6 Continuing in the process, the platform portion 630 of the bottom heat conducting unit 600 is placed through the opening 410 in the system board 400 and contacts the bottom thermal interface material layer 340 .

[0107] Then, in Figure 7 In the method, the bottom thermal conductive unit 600 is then attached to the system board 400 using a mechanical connector 706 .

[0108] exist Figure 8 In the embodiment, the method includes placing the top thermally conductive unit 500 on the structure and contacting the distal surface 513 to the top thermal interface material layer 240. Additionally, the method includes attaching the top thermally conductive unit 500 to the system board 400 using a mechanical connector 705.

[0109] Figure 9 A focused schematic diagram of the top ring 260 above the substrate 200 is provided. As shown, a distance D1 is defined from the bottom surface 512 of the top thermally conductive unit 500 to the front side 201 of the substrate 200. Distance D1 is equal to the vertical thickness of the electrical connector 215, the die 210, the top thermal interface material layer 240, and the overhang 530 of the top thermally conductive unit 500. Furthermore, the top ring 260 has a vertical height H1. As shown, distance D1 is greater than height H1.

[0110] Figure 10 A focused schematic diagram of the electrical connector 350 beneath the substrate 200 is provided. As shown, distance D2 is defined from the back side 202 of the substrate 200 to the bottom 402 of the system board 400 and is equal to the vertical thickness of the electrical connector 350 and the system board 400. Furthermore, distance D3 is defined from the back side 202 of the substrate 200 to the upper surface 611 of the base portion 610 of the bottom thermally conductive unit 600. Distance D3 is equal to the vertical thickness of the voltage regulator module 320, the bottom thermal interface material layer 340, and the platform portion 630 of the bottom thermally conductive unit 600. As shown, distance D3 is greater than distance D2.

[0111] Embodiments described herein provide for improving heat transfer from a substrate (such as a wafer-on-wafer substrate). Specifically, heat is transferred upward (from the front-side component) to a top heat transfer element (such as a top boiling plate). Heat is also transferred downward (from the back-side component) to a bottom heat transfer element (such as a bottom boiling plate). This system can be provided for use with a two-phase immersion coolant.

[0112] In one embodiment, an integrated circuit system includes: a circuit board having a top and a bottom and defining an opening from the top to the bottom; a bottom boiling plate having a recessed portion and a protrusion with an end surface, wherein the recessed portion is below the bottom of the circuit board, wherein the protrusion extends through the opening, and wherein the end surface is above the top of the circuit board; a semiconductor substrate above the top of the circuit board and including a plurality of semiconductor devices; and a top boiling plate above the semiconductor substrate, wherein the bottom boiling plate and the top boiling plate are configured to dissipate heat from the integrated circuit system.

[0113] In some embodiments of the integrated circuit system, the semiconductor substrate has a backside facing the end surface of the bottom boiling plate and a frontside, wherein the plurality of semiconductor devices are formed on the frontside.

[0114] In some embodiments, the integrated circuit system further includes a voltage regulation module on the back side of the semiconductor substrate and electrically connected to at least one of the plurality of semiconductor elements.

[0115] In some embodiments, the integrated circuit system further includes a thermal interface material contacting the terminal surface of the bottom boiling plate and the voltage regulating module.

[0116] In some embodiments, the integrated circuit system further comprises a connector electrically connecting the plurality of semiconductor components to the circuit board, wherein the connector is located between the top of the circuit board and the bottom of the semiconductor substrate.

[0117] In some embodiments of the integrated circuit system, the semiconductor substrate has a back side and a top side facing the end surface of the bottom boiling plate, wherein the plurality of semiconductor elements are formed on a plurality of dies, and wherein the plurality of dies are on the top side of the semiconductor substrate.

[0118] In some embodiments, the integrated circuit system further comprises a thermal interface material contacting the plurality of dies and the top boiling plate.

[0119] In some embodiments, the integrated circuit system further includes a top plug coupling the top boiling plate to the circuit board; and a bottom plug coupling the bottom boiling plate to the circuit board.

[0120] In some embodiments, the integrated circuit system further includes a ring enclosing an outer periphery of the semiconductor substrate, wherein: the top boiling plate has a base portion and a hanging portion; the ring ends at an uppermost surface below the base portion of the top boiling plate; and the hanging portion of the top boiling plate is surrounded by the ring.

[0121] In another embodiment, a bulk circuit system includes a circuit board having a top and a bottom and defining an opening from the top to the bottom; a semiconductor substrate having a front side and a back side, located on the top of the circuit board and including a plurality of semiconductor elements on the front side; a voltage regulator module located on the back side of the semiconductor substrate and electrically connected to at least one of the plurality of semiconductor elements; and a bottom thermally conductive unit extending through the opening of the circuit board and thermally connected to the voltage regulator module to dissipate heat from the back side of the semiconductor substrate.

[0122] In some embodiments of the integrated circuit system, the bottom heat conducting unit includes a recessed portion and a protrusion having an end surface; the recessed portion is below the bottom of the circuit board; the protrusion extends through the opening; the end surface is above the top of the circuit board; and the end surface is thermally connected to the voltage regulation module.

[0123] In some embodiments, the integrated circuit system further includes a thermal interface material connecting the terminal surface and the voltage regulation module.

[0124] In some embodiments, the integrated circuit system further includes a top heat conducting unit on the front side of the semiconductor substrate, wherein the top heat conducting unit is thermally connected to the plurality of semiconductor components to dissipate heat from the front side of the semiconductor substrate.

[0125] In some embodiments, the integrated circuit system further comprises a thermal interface material connecting the top heat conducting unit and the plurality of semiconductor devices.

[0126] In another embodiment, a method of manufacturing a semiconductor package includes forming an integrated circuit on a front side of a substrate; forming a voltage regulator module on a back side of the substrate, wherein the voltage regulator module is electrically connected to the integrated circuit; thermally connecting the voltage regulator module to a bottom thermally conductive unit; and thermally connecting the integrated circuit to a top thermally conductive unit.

[0127] In some embodiments, the bottom heat transfer unit is a bottom boiling plate; and the top heat transfer unit is a top boiling plate.

[0128] In some embodiments, the method further includes electrically connecting the integrated circuit to a circuit board, wherein the circuit board includes an opening, and wherein thermally connecting the voltage regulator module to the bottom thermally conductive unit includes placing a portion of the bottom thermally conductive unit through the opening.

[0129] In some method embodiments, electrically connecting the integrated circuit to the circuit board includes electrically connecting the integrated circuit to the circuit board through a groove defined by a ring, and wherein thermally connecting the voltage regulation module to the bottom thermally conductive unit includes placing the portion of the bottom thermally conductive unit into the groove.

[0130] In some embodiments, the method further includes: structurally mounting the bottom heat conducting unit to the circuit board; and structurally mounting the top heat conducting unit to the circuit board.

[0131] In some embodiments, the method further includes: forming a top thermal interface material layer on the integrated circuit, wherein thermally connecting the integrated circuit to the top thermal conductive unit includes connecting the top thermal conductive unit to the top thermal interface material layer; and forming a bottom thermal interface material layer on the top voltage regulation module, wherein thermally connecting the voltage regulation module to the bottom thermal conductive unit includes connecting the bottom thermal conductive unit to the bottom thermal interface material layer.

[0132] In another embodiment, an integrated circuit system includes a circuit board having a top and a bottom and defining an opening from the top to the bottom. The bottom boiling plate has a recessed portion and a protrusion having an end surface, wherein the recessed portion is below the bottom of the circuit board, wherein the protrusion extends through the opening, and wherein the end surface is above the top of the circuit board. A semiconductor substrate is above the top of the circuit board and includes a plurality of semiconductor components, the semiconductor substrate having a back side facing the end surface of the bottom boiling plate and a front side, wherein the semiconductor components are formed on the front side. A top boiling plate is above the semiconductor substrate, wherein the bottom boiling plate and the top boiling plate are configured to dissipate heat from the integrated circuit system.

[0133] The foregoing summarizes the features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art will appreciate that they may readily use this disclosure as a basis for designing or modifying other processing procedures and structures for carrying out the same purposes and / or achieving the same advantages of the embodiments described herein. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that various changes, substitutions, and modifications may be made thereto without departing from the spirit and scope of the present disclosure.

Claims

1. An integrated circuit system, characterized in that: Include: a circuit board having a top and a bottom and defining an opening from the top to the bottom; a bottom boiling plate having a recessed portion and a projection having an end surface, wherein the recessed portion is below the bottom of the circuit board, wherein the projection extends through the opening, and wherein the end surface is above the top of the circuit board; a semiconductor substrate on top of the circuit board and comprising a plurality of semiconductor components; as well as A top boiling plate is above the semiconductor substrate, wherein the bottom boiling plate and the top boiling plate are configured to dissipate heat from the integrated circuit system.

2. The integrated circuit system according to claim 1, wherein: The semiconductor substrate has a back side facing the end surface of the bottom boiling plate and a front side, wherein the plurality of semiconductor elements are formed on the front side.

3. The integrated circuit system according to claim 2, wherein: Also included is a voltage regulating module on the back side of the semiconductor substrate and electrically connected to at least one of the plurality of semiconductor elements.

4. The integrated circuit system according to claim 3, wherein: The device also includes a thermal interface material contacting the terminal surface of the bottom boiling plate and the voltage regulating module.

5. The integrated circuit system according to claim 2, wherein: The invention also comprises a connector for electrically connecting the plurality of semiconductor elements to the circuit board, wherein the connector is located between the top of the circuit board and the bottom of the semiconductor substrate.

6. The integrated circuit system according to claim 1, wherein: The semiconductor substrate has a back side and a top portion facing the end surface of the bottom boiling plate, wherein the plurality of semiconductor elements are formed on a plurality of dies, and wherein the plurality of dies are on the top portion of the semiconductor substrate.

7. The integrated circuit system according to claim 6, wherein: A thermal interface material is also included, contacting the plurality of dies and the top boiling plate.

8. The integrated circuit system according to claim 1, wherein: Also includes: a top bolt coupling the top boiling plate to the circuit board; and A bottom bolt couples the bottom boiling plate to the circuit board.

9. An integrated circuit system, characterized in that: Include: a circuit board having a top and a bottom and defining an opening from the top to the bottom; a semiconductor substrate having a front side and a back side, located on top of the circuit board and including a plurality of semiconductor components on the front side; a voltage regulating module on the back side of the semiconductor substrate and electrically connected to at least one of the plurality of semiconductor elements; as well as A bottom heat conducting unit extends through the opening of the circuit board and is thermally connected to the voltage regulating module to dissipate heat from the back side of the semiconductor substrate.

10. An integrated circuit system, characterized in that: Include: a circuit board having a top and a bottom and defining an opening from the top to the bottom; a bottom boiling plate having a recessed portion and a projection having an end surface, wherein the recessed portion is below the bottom of the circuit board, wherein the projection extends through the opening, and wherein the end surface is above the top of the circuit board; a semiconductor substrate on top of the circuit board and including a plurality of semiconductor elements, the semiconductor substrate having a back side facing the end surface of the bottom boiling plate and a front side, wherein the plurality of semiconductor elements are formed on the front side; as well as A top boiling plate is above the semiconductor substrate, wherein the bottom boiling plate and the top boiling plate are configured to dissipate heat from the integrated circuit system.

Images