Display device
By introducing an auxiliary pattern made of insulating material and a second connection pattern made of conductive material between the pad electrode and the bump electrode, an electrical connection structure with an undercut shape is formed, which solves the problem of insufficient electrical connection between the pad electrode and the bump electrode, and achieves better electrical connection characteristics and a simplified manufacturing process.
Patent Information
- Application Number
- CN202422286479.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-25
- Filing Date
- 2024-09-19
- Publication Date
- 2025-09-05
- Estimated Expiration
- 2034-09-19
AI Technical Summary
The electrical connection characteristics between the pad electrode and the bump electrode in the existing display device are insufficient, and the manufacturing process is complicated.
An auxiliary pattern and a second connection pattern are introduced between the pad electrode and the bump electrode. The auxiliary pattern is made of insulating material, the second connection pattern is made of conductive material, and contacts the bump electrode in a plan view to form an electrical connection structure in an undercut shape.
The electrical connection characteristics between the pad electrode and the bump electrode are improved, and the manufacturing process of the display device is simplified.
Smart Images

Figure CN223310225U_ABST
Abstract
Description
[0001] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0128057, filed on September 25, 2023, the entire contents of which are incorporated herein by reference. Technical Field
[0002] The present disclosure herein relates to a display device and a method of manufacturing the same, and more particularly, to a display device including a pad electrode and a bump electrode. Background Art
[0003] Electronic devices that provide images to users, such as smart phones, digital cameras, laptop computers, navigation systems, and smart TVs, include a display device for displaying images. The display device generates images and provides the images to the user through a display screen.
[0004] The display device includes a display panel for displaying an image, wherein the display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels connected to the plurality of gate lines and the plurality of data lines.
[0005] The display panel may be connected to a driving part that provides electrical signals for displaying images to the gate lines or the data lines. Utility Model Content
[0006] The present disclosure provides a display device having improved electrical connection characteristics between a pad electrode and a bump electrode.
[0007] The present disclosure also provides a method of manufacturing a display device with a simplified process.
[0008] One embodiment of the present invention provides a display device, comprising: a display panel, comprising a display area provided with pixels and a non-display area provided with a pad electrode; a driving unit, arranged on the display panel and having a bump electrode arranged to correspond to the pad electrode; and an adhesive layer, contacting the pad electrode and the bump electrode, wherein the pad electrode comprises: a first connection pattern containing a conductive material; an auxiliary pattern, arranged on the first connection pattern, protruding toward the bump electrode, and containing an insulating material; and a second connection pattern, the second connection pattern containing a conductive material, a portion of the second connection pattern being arranged on the auxiliary pattern, and an opening exposing a portion of the auxiliary pattern being defined in the second connection pattern, and the auxiliary pattern including an end portion protruding toward the opening more than the first connection pattern.
[0009] In one embodiment, the auxiliary patterns and the first connection patterns may form an undercut shape in cross section.
[0010] In one embodiment, the second connection pattern may include a connection portion contacting the bump electrode, and the opening may not overlap with the connection portion in a plan view.
[0011] In one embodiment, the opening may be provided in plural, and the plurality of openings may be disposed apart from each other in a plan view with the auxiliary pattern therebetween.
[0012] In one embodiment, the auxiliary pattern may be provided in plurality, the opening may be provided in plurality, and the plurality of openings may correspond one-to-one to the plurality of auxiliary patterns.
[0013] In one embodiment, the opening may be provided in a plurality, the auxiliary pattern may be provided in a plurality, and the plurality of openings and the plurality of auxiliary patterns may be alternately arranged along the first direction.
[0014] In one embodiment, a side surface of the auxiliary pattern exposed by the opening may include a recessed insulating portion recessed downward.
[0015] In one embodiment, the adhesive layer may surround the end portion and may couple the pad electrode and the bump electrode to each other.
[0016] In one embodiment, the first connection pattern may include a recessed conductive portion that is recessed further toward a center of the auxiliary pattern than the auxiliary pattern in a plan view.
[0017] In one embodiment, the end portion may protrude from the recessed conductive portion toward the opening by a first protrusion length, and the first protrusion length may be greater than or equal to about 0.4 micrometers (μm).
[0018] In one embodiment, in a cross section, the recessed conductive portion may protrude toward the opening more than a side surface of the portion of the second connection pattern disposed on the auxiliary pattern, among side surfaces of the second connection pattern defining the opening.
[0019] In one embodiment, the second connection pattern may be in contact with the bump electrode.
[0020] In one embodiment, the display device may further include: a signal line having a wiring portion connected to the pixel and a pad portion extending from an end of the wiring portion and having a width greater than a width of the wiring portion; and an insulating layer disposed on and covering the pad portion, and the second connection pattern may be electrically connected to the pad portion via a contact hole passing through the insulating layer.
[0021] In one embodiment, the contact hole may not overlap with the auxiliary pattern in a plan view.
[0022] In one embodiment, the adhesive layer may not include conductive material.
[0023] In one embodiment of the present invention, a display device includes: a display panel having a pad electrode; a drive unit disposed on the display panel and having a bump electrode disposed corresponding to the pad electrode; and an adhesive layer in contact with the pad electrode and the bump electrode. The pad electrode includes: a first connection pattern containing a conductive material; an auxiliary pattern disposed on the first connection pattern, protruding toward the bump electrode, and containing an insulating material; and a second connection pattern containing a conductive material, a portion of the second connection pattern being disposed on the auxiliary pattern, the second connection pattern defining an opening exposing a portion of the auxiliary pattern, and the first connection pattern including a recessed conductive portion that is recessed relative to the auxiliary pattern toward a center of the auxiliary pattern in a plan view.
[0024] In one embodiment of the present invention, a method for manufacturing a display device includes: forming an auxiliary pattern that protrudes upward and contains an insulating material on a preliminary first connection pattern containing a conductive material; forming a preliminary second connection pattern layer that covers the preliminary first connection pattern and the auxiliary pattern and contains a conductive material; performing a first etching of the preliminary second connection pattern layer to form a second connection pattern by forming an opening in the preliminary second connection pattern layer that exposes a portion of the auxiliary pattern; and performing a second etching of the preliminary first connection pattern to form a first connection pattern, which includes a concave conductive portion that is concave toward the center of the auxiliary pattern in a plan view relative to the auxiliary pattern.
[0025] In one embodiment, the performing of the first etching may include: forming a photoresist pattern on the preliminary second connection pattern layer, and forming the second connection pattern by etching a portion of the preliminary second connection pattern layer that does not overlap with the photoresist pattern in a plan view, and in the performing of the second etching, the preliminary first connection pattern may be etched to form the first connection pattern in a state where the photoresist pattern remains.
[0026] In one embodiment, during the performing of the second etching, a recessed insulating portion recessed downward may be formed in the side surface of the auxiliary pattern exposed by the opening.
[0027] In one embodiment, the first connection pattern and the auxiliary pattern may form an undercut shape in cross section. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present invention and, together with the description, serve to explain the principles of the present invention. In the drawings:
[0029] Figure 1 is a perspective view of an electronic device according to an embodiment of the present invention;
[0030] Figure 2 is an exploded perspective view of an electronic device according to an embodiment of the present invention;
[0031] Figure 3 is a cross-sectional view of a display device according to an embodiment of the present invention;
[0032] Figure 4 According to one embodiment of the present invention Figure 3 A plan view of the display panel illustrated in FIG;
[0033] Figure 5 is a cross-sectional view of a pixel according to an embodiment of the present invention;
[0034] Figure 6 As an example of an embodiment of the present invention Figure 4 A diagram showing a bent state of a bent portion;
[0035] Figure 7 According to one embodiment of the present invention Figure 4 An enlarged perspective view of the pad area illustrated in FIG.
[0036] Figure 8 According to one embodiment of the present invention Figure 7 An enlarged plan view of the first pad electrode illustrated in FIG;
[0037] Figure 9A According to one embodiment of the present invention, Figure 8 A cross-sectional view taken along line AA';
[0038] Figure 9B According to one embodiment of the present invention, Figure 8 A cross-sectional view taken along line BB';
[0039] Figure 9C According to one embodiment of the present invention, Figure 8 A cross-sectional view taken along line CC';
[0040] Figure 10A According to an embodiment of the present invention, after the first pad electrode and the first bump electrode are combined with each other, Figure 8 A cross-sectional view taken along line AA';
[0041] Figure 10B According to an embodiment of the present invention, after the first pad electrode and the first bump electrode are combined with each other, Figure 8 A cross-sectional view taken along line BB';
[0042] Figures 11A to 11F is a plan view illustrating the arrangement of openings and auxiliary patterns according to an embodiment of the present invention; and
[0043] Figures 12A to 12G 2 is a cross-sectional view illustrating some operations of a method for manufacturing a display device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0044] In this specification, it will be understood that when an element (or region, layer, portion, etc.) is referred to as being "on," "connected" or "coupled to" another element, it can be directly disposed on, connected or coupled to the other element, or intervening elements may be disposed therebetween.
[0045] The same reference numerals or symbols refer to the same elements throughout. In the accompanying drawings, the proportions and sizes (e.g., thickness) of the elements are exaggerated for effective description of the technical content. As used herein, the term "and / or" includes any and all combinations of one or more of the listed items.
[0046] It will be understood that although the terms "first", "second", etc. may be used in this article to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the first element, component, region, layer or section discussed below may be referred to as the second element, component, region, layer or section without departing from the scope of the present invention. Similarly, the second element, component, region, layer or section may be referred to as the first element, component, region, layer or section. As used herein, the singular forms "one" and "said" are also intended to include plural forms unless the context clearly indicates otherwise.
[0047] In addition, terms such as “below,” “on the lower side,” “above,” and “upper side” may be used to describe the relationship between elements illustrated in the drawings. These terms have relative concepts and are described based on the directions indicated in the drawings.
[0048] It will be further understood that the terms “including” and / or “having” when used in this specification specify the presence of stated features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.
[0049] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and will not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.
[0050] As used herein, "about" or "approximately" is inclusive of the stated value and means within an acceptable deviation range for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±10%, ±5%, or ±2% of the stated value.
[0051] Hereinafter, embodiments of the present invention are described with reference to the accompanying drawings.
[0052] Figure 1 It is a perspective view of an electronic device according to an embodiment of the present invention.
[0053] refer to Figure 1 The electronic device ED may have a rectangular shape in a plan view, including long sides extending in a first direction DR1 and short sides extending in a second direction DR2 intersecting the first direction DR1. However, embodiments of the present invention are not limited thereto, and the electronic device ED may have various shapes in a plan view, such as a circular shape and other polygonal shapes.
[0054] Hereinafter, a direction substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 is defined as a third direction DR3. In addition, in this specification, "in a plan view" may be defined as when viewed from the third direction DR3 (ie, the display panel DP (see FIG. 2 ), the display panel DP is substantially perpendicular to the plane defined by the first direction DR1 and the second direction DR2. Figure 2 ) in the thickness direction).
[0055] The upper surface of the electronic device ED may be defined as a display surface ED-IS, and the display surface ED-IS may have a flat surface defined by a first direction DR1 and a second direction DR2. An image IM generated in the electronic device ED may be provided to a user through the display surface ED-IS.
[0056] The display surface ED-IS may include a display area ED-DA and a non-display area ED-NDA surrounding the display area ED-DA. The display area ED-DA may display an image, while the non-display area ED-NDA may not display an image. The non-display area ED-NDA may surround the display area ED-DA and define a boundary of the electronic device ED printed in a predetermined color.
[0057] Figure 2 It is an exploded perspective view of an electronic device according to an embodiment of the present invention.
[0058] refer to Figure 2 The electronic device ED may include a window WM, a display device DD, and a housing BC. The housing BC may house the display device DD and may be coupled to the window WM. Although not illustrated in the figures, the electronic device ED may further include other electronic modules housed in the housing BC and electrically connected to the display panel DP. For example, the electronic device ED may further include a mainboard, a circuit module mounted on the mainboard, a camera module, a power module, and the like.
[0059] The window WM may be provided above the display device DD. The window WM may transmit an image provided from the display device DD to the outside. The window WM may include a transmission area TA and a non-transmission area NTA. The transmission area TA may be connected to the display device DD. Figure 1 The transmissive area TA may have a shape corresponding to that of the display area ED-DA.
[0060] The non-transmission area NTA can be aligned with the non-display area ED-NDA (see Figure 1 ) overlaps, and may have a non-display area ED-NDA (see Figure 1 ) The non-transmission area NTA may be an area having relatively lower transmittance than that of the transmission area TA.
[0061] The display device DD can generate images and detect external inputs. The display device DD may include a display panel DP and an input sensor ISU. Although not illustrated in the figure, the display device DD may further include an anti-reflection member provided on the input sensor ISU. The anti-reflection member may include a polarizer and a retarder, or may include a color filter and a black matrix.
[0062] The display panel DP may be an emissive display panel, and the type is not particularly limited. For example, the display panel DP may be an organic light-emitting display panel or an inorganic light-emitting display panel. The light-emitting layer of an organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of an inorganic light-emitting display panel may include quantum dots, quantum rods, nano-LEDs, etc. Hereinafter, the display panel DP will be described as an organic light-emitting display panel.
[0063] The input sensor ISU may include any one of a capacitive sensor, an optical sensor, an ultrasonic sensor, and an electromagnetic induction sensor. The input sensor ISU may be provided on the display panel DP through a continuous process, or may be manufactured separately and then attached to the upper side of the display panel DP through an adhesive layer.
[0064] A portion of the display panel DP can be bent so that the driving part DC (see Figure 6 ) faces downward. The non-display area ED-NDA of the display panel DP (see Figure 1 ) can be bent. However, the portion to be bent is not limited thereto, and in another embodiment, the circuit board PB (see Figure 6 ) rather than the display panel DP being bendable.
[0065] Figure 3 FIG. 4 is a cross-sectional view of a display device according to an embodiment of the present invention.
[0066] refer to Figure 3 The display panel DP may include a substrate SUB, a circuit element layer DP-CL disposed on the substrate SUB, a display element layer DP-OLED, and a thin film encapsulation layer TFE. The input sensor ISU may be disposed on the thin film encapsulation layer TFE.
[0067] The substrate SUB may include a display area DP-DA and a non-display area DP-NDA surrounding the display area DP-DA. The substrate SUB may include a flexible plastic material such as glass or polyimide ("PI"). The display element layer DP-OLED may be disposed on the display area DP-DA.
[0068] Multiple pixels may be provided on the circuit element layer DP-CL and the display element layer DP-OLED. Although not illustrated in the figure, each pixel may include multiple transistors and at least one capacitor provided on the circuit element layer DP-CL, and a light-emitting element provided on the display element layer DP-OLED and connected to the transistors.
[0069] A thin film encapsulation layer (TFE) may be disposed on the circuit element layer (DP-CL) to cover the display element layer (DP-OLED). The thin film encapsulation layer (TFE) may protect the pixels from moisture, oxygen, and foreign substances.
[0070] Figure 4 for Figure 3 A plan view of the display panel DP illustrated in FIG.
[0071] refer to Figure 4 , the display panel DP may include a plurality of pixels PX, a gate driving circuit GDC, a plurality of signal lines SGL, and a plurality of signal pads DP-PD.
[0072] The display panel DP may include a first portion AA1, a second portion AA2, and a bending portion BA disposed between the first portion AA1 and the second portion AA2. The first portion AA1, the bending portion BA, and the second portion AA2 may be arranged in a first direction DR1, and the bending portion BA may extend in a second direction DR2. The bending portion BA may extend from the first portion AA1 in the first direction DR1, and the second portion AA2 may extend from the bending portion BA in the first direction DR1.
[0073] The first portion AA1 may have long sides extending in the first direction DR1 and facing each other in the second direction DR2. The length of each of the bent portion BA and the second portion AA2 may be smaller than that of the first portion AA1 with respect to the second direction DR2.
[0074] Pixels PX may be arranged in the display area DP-DA. Each pixel PX includes an organic light-emitting element and a pixel driving circuit connected thereto. A gate driving circuit GDC sequentially outputs gate signals to a plurality of gate lines GL, which will be described later. The transistors of the gate driving circuit GDC may be formed using the same process as that used to form the transistors of the pixels PX, such as a low-temperature polycrystalline silicon (LTPS) process or a low-temperature polycrystalline oxide (LTPO) process. The display panel DP may further include another driving circuit that provides emission control signals to the pixels PX.
[0075] The signal lines SGL may include gate lines GL, data lines DL, power lines PL, and control signal lines CSL. The gate lines GL may be connected to corresponding pixels PX, and the data lines DL may be connected to corresponding pixels PX. The power lines PL may be connected to the pixels PX. The control signal lines CSL may provide control signals to the scan driving circuit.
[0076] The signal lines SGL may overlap the display area DP-DA and the non-display area DP-NDA. The signal lines SGL may each include a wiring portion LP. The wiring portion LP may overlap the display area DP-DA and the non-display area DP-NDA.
[0077] A plurality of signal pads DP-PD may be provided in the second portion AA2 of the non-display area DP-NDA. A first pad electrode PD1, a second pad electrode PD2, and a third pad electrode PD3 may be included in the plurality of signal pads DP-PD. An area in which the first pad electrode PD1 and the second pad electrode PD2 are provided may be defined as a first pad area PA1, and an area in which the third pad electrode PD3 is provided may be defined as a second pad area PA2.
[0078] The first pad area PA1 may be Figure 6 The drive unit DC (see Figure 6), and the second pad area PA2 may be an area overlapping with the circuit board PB in a plan view. The first pad area PA1 may include a first area B1 provided with a first pad electrode PD1 and a second area B2 provided with a second pad electrode PD2. The first and second pad areas PA1 and PA2 may be provided in the non-display area DP-NDA. The first and second pad areas PA1 and PA2 may be spaced apart from each other in the first direction DR1.
[0079] The first pad electrodes PD1 may be connected to corresponding data lines DL. Although not illustrated in the drawings, the first and second pad electrodes PD1 and PD2 may be electrically connected to each other. The second pad electrode PD2 may be connected to the third pad electrode PD3 via a connection signal line S-CL.
[0080] The circuit board PB may include a plurality of circuit pads PB-PD. The circuit pads PB-PD may be arranged in the second direction DR2. The circuit pads PB-PD of the circuit board PB may contact and connect with the third pad electrode PD3 in the second pad area PA2.
[0081] Figure 5 is a cross-sectional view of a pixel according to an embodiment of the present invention.
[0082] refer to Figure 4 and Figure 5 The pixel PX may include a transistor TR and a light emitting element OLED. The light emitting element OLED may include a first electrode AE (or anode), a second electrode CE (or cathode), a hole control layer HCL, an electron control layer ECL, and a light emitting layer EML.
[0083] The transistor TR and the light emitting element OLED may be provided on the substrate SUB. One transistor TR is exemplarily illustrated, but in practice, the pixel PX may include multiple transistors for driving the light emitting element OLED and at least one capacitor. The multiple transistors and at least one capacitor may be connected to each other.
[0084] The display area DP-DA may include a light emitting area LA corresponding to each of the pixels PX and a non-light emitting area NLA around the light emitting area LA. The light emitting element OLED may be disposed in the light emitting area LA.
[0085] The substrate SUB may include polyimide (PI) as a flexible plastic material. The isolation layer BRL may be disposed on the substrate SUB. The buffer layer BFL may be disposed on the isolation layer BRL. The isolation layer BRL and the buffer layer BFL may be inorganic layers.
[0086] The semiconductor pattern may be disposed on the buffer layer BFL. The semiconductor pattern may include polycrystalline silicon, amorphous silicon, or metal oxide. The semiconductor pattern may be doped with an N-type dopant or a P-type dopant. The semiconductor pattern may include a region doped with a high concentration and a region doped with a low concentration. The region with the high concentration may have higher conductivity than the region with the low concentration and may substantially serve as the source electrode and drain electrode of the transistor TR. The region doped with the low concentration may substantially correspond to the active portion (or channel) of the transistor.
[0087] The source S, active portion A, and drain portion D of the transistor TR may be formed from a semiconductor pattern. A first insulating layer INS1 may be disposed on the semiconductor pattern. A gate G of the transistor TR may be disposed on the first insulating layer INS1. A second insulating layer INS2 may be disposed on the gate G. A third insulating layer INS3 may be disposed on the second insulating layer INS2. A fourth insulating layer INS4 may be disposed on the third insulating layer INS3.
[0088] The connection electrode CNE may include a first connection electrode CNE1 and a second connection electrode CNE2 to connect the transistor TR and the light emitting element OLED to each other. The first connection electrode CNE1 may be disposed on the fourth insulating layer INS4 and connected to the drain portion D through a first contact hole CH1 defined in the first to fourth insulating layers INS1 to INS4.
[0089] The fifth insulating layer INS5 may be provided on the fourth insulating layer INS4. The second connection electrode CNE2 may be provided on the fifth insulating layer INS5. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a second contact hole CH2 defined in the fifth insulating layer INS5. The second connection electrode CNE2 may be Figure 4 The data line DL in.
[0090] The sixth insulating layer INS6 may be disposed on the second connection electrode CNE2. Layers including the buffer layer BFL to the sixth insulating layer INS6 may be defined as a circuit element layer DP-CL. The first to sixth insulating layers INS1 to INS6 may be inorganic layers or organic layers.
[0091] The first electrode AE may be disposed on the sixth insulating layer INS6. The first electrode AE may be connected to the second connection electrode CNE2 via a third contact hole CH3 defined in the sixth insulating layer INS6. The first electrode AE may be connected to the transistor TR via the first connection electrode CNE1 and the second connection electrode CNE2. A pixel defining layer PDL (in which an opening PX_OP is defined to expose a predetermined portion of the first electrode AE) may be disposed on the first electrode AE and the sixth insulating layer INS6.
[0092] The hole control layer HCL may be disposed on the first electrode AE and the pixel definition layer PDL. The hole control layer HCL may include a hole transport layer and a hole injection layer.
[0093] The light-emitting layer EML may be disposed on the hole control layer HCL. The light-emitting layer EML may be disposed in a region corresponding to the opening PX_OP. The light-emitting layer EML may include an organic material and / or an inorganic material. The light-emitting layer EML may generate light of any one of red, green, and blue colors.
[0094] The electron control layer ECL may be disposed on the light-emitting layer EML and the hole control layer HCL. The electron control layer ECL may include an electron transport layer and an electron injection layer. The hole control layer HCL and the electron control layer ECL may be disposed together in the light-emitting area LA and the non-light-emitting area NLA.
[0095] The second electrode CE may be disposed on the electronic control layer ECL. The second electrode CE may be disposed in common in the pixel PX. The layer in which the light emitting element OLED is disposed may be defined as a display element layer DP-OLED.
[0096] The thin film encapsulation layer TFE may be disposed on the second electrode CE to cover the pixel PX (see FIG. Figure 4 Although not illustrated in the figure, the thin film encapsulation layer TFE may be composed of a plurality of layers. Some of the plurality of layers may include an inorganic insulating layer and may protect the pixel PX (see FIG. Figure 4 ) from moisture / oxygen. Other layers may include an organic insulating layer and may protect the pixel PX (see Figure 4 ) from foreign matter such as dust particles.
[0097] A first voltage may be applied to the first electrode AE through the transistor TR, and a second voltage lower than the first voltage may be applied to the second electrode CE. Holes and electrons injected into the light-emitting layer EML combine to form excitons, and the excitons transition to a ground state, so that the light-emitting element OLED can emit light.
[0098] Figure 6 As an example of an embodiment of the present invention Figure 4 Diagram of the bending state of the bending portion.
[0099] Figure 6 A side view of the display device DD when viewed from the second direction DR2 is exemplarily illustrated.
[0100] because Figure 6 The substrate SUB, circuit element layer DP-CL, display element layer DP-OLED and thin film encapsulation layer TFE are respectively Figure 5The substrate SUB, circuit element layer DP-CL, display element layer DP-OLED and thin film encapsulation layer TFE are the same, so their description will be omitted or simplified.
[0101] The display device DD may include a driving part DC, a circuit board PB, a bending protection layer BPL, and a timing controller T-CON.
[0102] The driving part DC may be provided on the display panel DP and mounted on the display panel DP. However, the embodiment of the present invention is not limited thereto. The driving part DC may generate a driving signal for operating the display panel DP based on a control signal transmitted from the circuit board PB.
[0103] The circuit board PB may be disposed on one end of the substrate SUB and electrically connected to the circuit element layer DP-CL. The timing controller T-CON may be disposed on the circuit board PB. The timing controller T-CON may be formed as an integrated circuit chip to be mounted on the upper surface of the circuit board PB.
[0104] The bent portion BA may be bent so that the second portion AA2 is disposed below the first portion AA1. Therefore, the driving portion DC, the circuit board PB, and the timing controller T-CON may be disposed below the second portion AA2.
[0105] The bending protection layer BPL may be disposed on the bending portion BA. The bending protection layer BPL may be adjacent to the boundary between the first portion AA1 and the second portion AA2. The bending protection layer BPL may be separated from the thin film encapsulation layer TFE in the first direction DR1. When the display panel DP is bent, the bending protection layer BPL may bend along with the bending portion BA.
[0106] Figure 7 According to one embodiment of the present invention Figure 4 An enlarged perspective view of the pad area illustrated in FIG.
[0107] Figure 7 The driving part DC and the circuit board PB are exemplarily illustrated as being separated from the display panel DP.
[0108] because Figure 7 The first pad electrode PD1, the second pad electrode PD2, the connection signal line S-CL and the third pad electrode PD3 are respectively connected to Figure 4 The first pad electrode PD1, the second pad electrode PD2, the connection signal line S-CL, and the third pad electrode PD3 in FIG. 1 are the same, so descriptions thereof will be omitted or simplified.
[0109] refer to Figure 4 and Figure 7The driving part DC may be bonded to the first pad area PA1 via a first adhesive layer CF1. The circuit board PB may be bonded to the second pad area PA2 via a second adhesive layer CF2. The first adhesive layer CF1 and the second adhesive layer CF2 may include a synthetic resin having adhesiveness.
[0110] When the first adhesive layer CF1 is hardened, the first and second pad electrodes PD1 and PD2 are fixed in contact with the bump electrode DC-BP. When the second adhesive layer CF2 is hardened, the third pad electrode PD3 is fixed in contact with the third bump electrode BP3.
[0111] The driving portion DC may be provided on the first pad electrode PD1 and the second pad electrode PD2. The driving portion DC may include an upper surface DC-US and a lower surface DC-DS, and the lower surface DC-DS of the driving portion DC may be a surface facing the first pad electrode PD1 and the second pad electrode PD2. The driving portion DC may include a substrate SUB (see FIG. 1 ) electrically connected to the substrate SUB. Figure 6 ) on the first pad electrode PD1. The bump electrode DC-BP may be provided on the lower surface DC-DS of the driving part DC. The bump electrode DC-BP may be provided to correspond to the pad electrodes PD1 and PD2.
[0112] The bump electrode DC-BP may include a first bump electrode BP1 and a second bump electrode BP2. The first bump electrode BP1 and the second bump electrode BP2 may be spaced apart from each other in a first direction DR1. The first bump electrode BP1 may be arranged in a second direction DR2. The second bump electrode BP2 may be arranged in the second direction DR2. Although not illustrated in the figures, the first bump electrode BP1 and the second bump electrode BP2 may have a shape that protrudes from the lower surface DC-DS of the driving part DC to be exposed to the outside.
[0113] When the driving part DC moves in the third direction DR3 , the first bump electrode BP1 may make contact with the first pad electrode PD1 to be electrically connected thereto, and the second bump electrode BP2 may make contact with the second pad electrode PD2 to be electrically connected thereto.
[0114] Although not illustrated in the drawings, the driving unit DC may include an integrated circuit. The integrated circuit may be provided on the bump electrode DC-BP. The integrated circuit may be connected to the bump electrode DC-BP. The driving unit DC may receive a first signal from the outside through the second pad electrode PD2 and the second bump electrode BP2. The driving unit DC may provide a second signal generated based on the signal to the first pad electrode PD1 through the first bump electrode BP1. The first signal may be an image signal as a digital signal applied from the outside, and the second signal may be a data signal as an analog signal. The driving unit DC may generate an analog voltage corresponding to the grayscale value of the image signal. The data signal may be Figure 4The data lines DL illustrated in FIG. 5 are provided to the pixels PX.
[0115] The circuit board PB may be disposed on the display panel DP. The circuit board PB may be disposed on the third pad electrode PD3. The circuit board PB may include an upper surface PB-US and a lower surface PB-DS. The lower surface PB-DS of the circuit board PB may be a surface facing the third pad electrode PD3. The circuit board PB may include a plurality of third bump electrodes BP3 electrically connected to the third pad electrode PD3. The third bump electrodes BP3 may be disposed on the lower surface PB-DS of the circuit board PB. The third bump electrodes BP3 may be arranged in the second direction DR2. The circuit board PB may provide image signals, drive voltages, and other control signals to the driving unit DC.
[0116] Figure 8 According to one embodiment of the present invention Figure 7 An enlarged plan view of the first pad electrode illustrated in FIG.
[0117] Figure 8 The first pad electrode PD1 provided in the first pad area PA1 is exemplarily illustrated, but the second pad electrode PD2 and the third pad electrode PD3 may include the same configuration as the first pad electrode PD1. Figure 8 The data line DL is exemplarily illustrated, but the embodiments of the present invention are not limited thereto and may include Figure 4 Other signal lines SGL illustrated in FIG.
[0118] refer to Figure 4 and Figure 8 The data line DL may include a wiring portion LP and a pad portion PDP. Each wiring portion LP may be connected to a corresponding pixel PX among the pixels PX. Each wiring portion LP may extend in a first direction DR1 to connect to a corresponding signal pad DP-PD among the signal pads DP-PD. Hereinafter, any one data line DL will be described.
[0119] The pad portion PDP may extend from an end of the wiring portion LP in the first direction DR1. Although not illustrated in the figure, the pad portion PDP and the wiring portion LP of the data line DL may be provided on different layers and connected to each other. The width of the pad portion PDP in the second direction DR2 may be greater than the width of the wiring portion LP in the second direction DR2.
[0120] The signal pad DP-PD may be provided on the substrate SUB. The signal pad DP-PD may be provided on the pad portion PDP. For example, in the signal pad DP-PD, a first pad electrode PD1 is illustrated. The first pad electrode PD1 may include a first connection pattern CL1 and a second connection pattern CL2. For example, the first connection pattern CL1 and the second connection pattern CL2 may be respectively Figure 5The first connection electrode CNE1 and the second connection electrode CNE2 are shown in FIG.
[0121] The first and second connection patterns CL1 and CL2 may overlap the pad portion PDP in a plan view. The first and second connection patterns CL1 and CL2 are exemplarily illustrated, but any one of the electrodes may be omitted or an additional electrode may be further provided.
[0122] The first pad electrode PD1 may include an auxiliary pattern OHP, a first connection pattern CL1, and a second connection pattern CL2. The first pad electrode PD1 may include a plurality of auxiliary patterns OHP. Figure 8 The auxiliary pattern OHP is illustrated as a circle in a plan view, but the present invention is not limited thereto and the auxiliary pattern OHP may have various shapes. For example, the auxiliary pattern OHP may have a polygonal shape such as a triangle and a quadrangle in a plan view.
[0123] The auxiliary pattern OHP may include a tip portion TP that protrudes toward the opening CL-OP (eg, the center of the opening CL-OP) from the first connection pattern CL1 and overlaps with the opening CL-OP in a plan view. A portion of the auxiliary pattern OHP other than the tip portion TP may overlap with the first connection pattern CL1 in a plan view. Figure 9A Describes the shape of the terminal portion TP.
[0124] The auxiliary pattern OHP may be provided in plural and arranged along the first direction DR1. However, the arrangement of the auxiliary pattern OHP herein is an example and may be changed. For example, the auxiliary pattern OHP may be arranged in plural rows and columns. In addition, Figure 8 It is illustrated that the centers of the auxiliary patterns OHP are disposed in a straight line along the first direction DR1 , but the arrangement of the centers of the auxiliary patterns OHP is not limited thereto.
[0125] The first pad electrode PD1 may include a first connection pattern CL1. The first connection pattern CL1 may include a recessed conductive portion Sil that is recessed toward the center of the auxiliary pattern OHP in a plan view relative to the auxiliary pattern OHP. A tip portion TP of the auxiliary pattern OHP may cover the recessed conductive portion Sil of the first connection pattern CL1 in a plan view.
[0126] The first connection pattern CL1 may have a shape in which the recessed conductive portion Sil recessed toward the center of the auxiliary pattern OHP is defined on the side surface of a circle covering the auxiliary pattern OHP in a plan view. The planar shape of the recessed conductive portion Sil may correspond to the planar shape of the opening CL-OP. As used herein, the "planar shape" is a shape in a plan view. However, the shape of the first connection pattern CL1 herein is not limited thereto, and the first connection pattern CL1 may have various shapes. For another example, in the case where the planar shape of the auxiliary pattern OHP is a quadrilateral, the first connection pattern CL1 may have a shape in which the recessed conductive portion Sil recessed toward the center of the auxiliary pattern OHP is defined on the side surface of a quadrilateral covering the auxiliary pattern OHP in a plan view.
[0127] The outer surface of the portion of the first connection pattern CL1 other than the recessed conductive portion Sil may be arranged farther from the center of the auxiliary pattern OHP than the outer surface of the auxiliary pattern OHP. A plurality of first connection patterns CL1 may be provided, and each of the first connection patterns CL1 may overlap with the auxiliary pattern OHP in a plan view. The first connection patterns CL1 may correspond one-to-one with the auxiliary pattern OHP. That is, the first connection patterns CL1 may correspond to the auxiliary pattern OHP respectively. However, the shape and arrangement of the first connection patterns CL1 may vary. For example, one first connection pattern CL1 may have a shape in which the recessed conductive portion Sil is defined on the side surface of the shape that overlaps the plurality of auxiliary patterns OHP in a plan view.
[0128] The second connection pattern CL2 may have a shape covering a portion of the pad portion PDP except the opening CL-OP in a plan view. The opening CL-OP overlapping a portion of the auxiliary pattern OHP in a plan view may be defined in the second connection pattern CL2. A portion of the second connection pattern CL2 (i.e., Figure 9A The first conductive portion PP1 in the auxiliary pattern OHP may be provided on the auxiliary pattern OHP, and the opening CL-OP may expose the portion of the auxiliary pattern OHP. This will be referred to later. Figure 9A Provide a description.
[0129] The opening CL-OP may be provided in plural, and the plurality of openings CL-OP may be disposed apart from each other in a plan view with the auxiliary pattern OHP therebetween. Figure 8 It is exemplarily illustrated that the opening CL-OP has a quadrangular shape, but the shape of the opening CL-OP may be formed in various shapes such as a polygonal shape and an elliptical shape in a plan view.
[0130] The contact hole COP may be provided inside the second connection pattern CL2 in a plan view. The contact hole COP may be provided between the auxiliary patterns OHP in a plan view. The contact hole COP may not overlap with the auxiliary pattern OHP in a plan view. The second connection pattern CL2 and the pad portion PDP may be electrically connected to each other through the contact hole COP. The contact hole COP may pass through the second to fourth insulating layers INS2 to INS4 (see FIG. 1 ) provided on and covering the pad portion PDP. Figure 9C ). This will be referenced later. Figure 9C Provide a description.
[0131] Figure 9A According to one embodiment of the present invention, Figure 8 The cross-sectional view is taken along the line A-A'. Figure 9A The substrate SUB, the isolation layer BRL, the buffer layer BFL, the first insulating layer INS1, the second insulating layer INS2, the third insulating layer INS3 and the fourth insulating layer INS4 are respectively Figure 5 The substrate SUB, the isolation layer BRL, the buffer layer BFL, the first insulating layer INS1, the second insulating layer INS2, the third insulating layer INS3 and the fourth insulating layer INS4 in FIG. 1 are the same, so descriptions thereof will be omitted or simplified.
[0132] refer to Figure 9A The pad portion PDP may be disposed on the first insulating layer INS1. The pad portion PDP may include Figure 5 The gate portion G in the first embodiment may be formed of the same material as the gate portion G in the first embodiment and may be formed by the same process as the process for forming the gate portion G. A second insulating layer INS2 may be provided on the pad portion PDP to cover the pad portion PDP. The second insulating layer INS2 may be provided on the first insulating layer INS1. A third insulating layer INS3 may be provided on the second insulating layer INS2. A fourth insulating layer INS4 may be provided on the third insulating layer INS3.
[0133] The first connection pattern CL1 may be disposed on the fourth insulating layer INS4. The first connection pattern CL1 may be disposed between the fourth insulating layer INS4 and the auxiliary pattern OHP. The upper surface of the first connection pattern CL1 may contact the lower surface of the auxiliary pattern OHP. The first connection pattern CL1 may include a recessed conductive portion Sil. The recessed conductive portion Sil may be Figure 8 The first connection pattern CL1 (see Figure 8) that is recessed in a direction parallel to a plane defined by the first and second directions DR1 and DR2 in a plan view. In a plan view, the recessed conductive portion S1 may be closer to the center of the first connection pattern CL1 than the end portion TP. In a plan view, an outer side surface of the first connection pattern CL1 defining the recessed conductive portion S1 may be closer to the center of the first connection pattern CL1 than the outer side surface of the end portion TP. The first connection pattern CL1 may include a conductive material.
[0134] In cross section, the recessed conductive portion S1 may protrude toward the opening CL-OP (e.g., the center of the opening CL-OP) from the inner side surface CL2-SL of the first conductive portion PP1 of the second connection pattern CL2 that overlaps the auxiliary pattern OHP, among the inner side surfaces defining the opening CL-OP. As used herein, "in cross section" refers to a cross-sectional view cut along a plane parallel to the third direction DR3. The width W1-CL2 of the second connection pattern CL2 that overlaps the auxiliary pattern OHP in cross section may be smaller than the width W1-CL1 of the first connection pattern CL1 that overlaps the auxiliary pattern OHP in cross section.
[0135] The auxiliary pattern OHP and the first connection pattern CL1 may together form an undercut shape in cross section. A step may be defined at the boundary between the auxiliary pattern OHP and the first connection pattern CL1. The first connection pattern CL1 disposed below the auxiliary pattern OHP may be etched further toward the center of the first connection pattern CL1 than the auxiliary pattern OHP, thereby forming the undercut shape.
[0136] The auxiliary pattern OHP may be disposed on the first connection pattern CL1. The auxiliary pattern OHP may protrude in the third direction DR3. The auxiliary pattern OHP may be disposed toward the first bump electrode BP1 (see FIG. 2 ). Figure 10A The auxiliary pattern OHP may overlap the pad portion PDP in a plan view.
[0137] The auxiliary pattern OHP may include a tip portion TP that protrudes from the first connection pattern CL1 toward the opening CL-OP. The tip portion TP may protrude from the opposite side surface of the first connection pattern CL1 in the second direction DR2 or a direction opposite to the second direction DR2. The tip portion TP may protrude from the recessed conductive portion S1 toward the opening CL-OP by a first protrusion length TDP1.
[0138] The first protrusion length TDP1 may be about 0.4 μm or more. When the first protrusion length TDP1 is less than about 0.4 μm, the first adhesive layer CF1 (see FIG. 1 ) surrounding the terminal portion TP may be about 0.4 μm or more. Figure 10A ) may not be able to properly fix the auxiliary pattern OHP. Accordingly, between the first pad electrode PD1 and the first bump electrode BP1 (see Figure 10A) are bonded to each other, the first pad electrode PD1 and the first bump electrode BP1 (see Figure 10A ) may deteriorate. This will be referred to later. Figure 10A Describe in more detail.
[0139] The side surface of the auxiliary pattern OHP may include a recessed insulating portion GR0 recessed downward. In one embodiment, the auxiliary pattern OHP may contain an insulating material. Figure 9B The recessed insulating portion GR0 may have a shape that is recessed downward compared to the side surface of the auxiliary pattern OHP illustrated in FIG. The recessed insulating portion GR0 recessed in the direction opposite to the third direction DR3 may be defined on the side surface of the auxiliary pattern OHP exposed by the opening CL-OP. The recessed insulating portion GR0 may overlap with the opening CL-OP in a plan view. The recessed insulating portion GR0 may be formed by etching together in the etching process for forming the recessed conductive portion S1. This will be described later with reference to FIG. Figures 12A to 12G Provide a description.
[0140] The auxiliary pattern OHP may include a polymer. The auxiliary pattern OHP may include an organic insulating layer. The auxiliary pattern OHP may include a thermosetting polymer. The auxiliary pattern OHP may include a thermoplastic polymer. However, the material of the auxiliary pattern OHP is not limited thereto and may vary.
[0141] The second connection pattern CL2 may include a first conductive portion PP1 and a second conductive portion PP2. The first conductive portion PP1 of the second connection pattern CL2 may be disposed on the auxiliary pattern OHP and may cover a portion of the auxiliary pattern OHP. In other words, the lower surface of the first conductive portion PP1 of the second connection pattern CL2 may contact the upper surface of the auxiliary pattern OHP. The second conductive portion PP2 of the second connection pattern CL2 may be disposed on the fourth insulating layer INS4.
[0142] An opening CL-OP exposing a portion of the auxiliary pattern OHP may be defined in the second connection pattern CL2. The opening CL-OP may be defined between the first conductive portion PP1 and the second conductive portion PP2. The second connection pattern CL2 overlaps the auxiliary pattern OHP in a plan view and is aligned with the first bump electrode BP1 (see FIG. 1 ) to be described later. Figure 10A ) may be defined as a connection portion CTP. The connection portion CTP may be disposed adjacent to the opening CL-OP. The connection portion CTP may be disposed between the openings CL-OP. The connection portion CTP may not overlap with the opening CL-OP in a plan view. The second connection pattern CL2 may include a conductive material.
[0143] Figure 9B According to one embodiment of the present invention, Figure 8 Hereinafter, with reference to Figure 9AThe same components as those described above will be denoted by the same reference numerals or symbols, and description thereof will be omitted or simplified.
[0144] refer to Figure 9B , along the Figure 8 In a cross section taken along line BB', the width of the first connection pattern CL1 may be greater than the width of the auxiliary pattern OHP. The auxiliary pattern OHP may be disposed on the first connection pattern CL1. Figure 9A Auxiliary pattern OHP in Figure 9A ), the recessed insulating portion GR0 may not be defined on the side surface of the auxiliary pattern OHP.
[0145] A non-connection portion NCTP that is a remaining portion of the second connection pattern CL2 except the connection portion CTP may be defined. The non-connection portion NCTP may be a portion of the second connection pattern CL2 that is not connected to the connection portion CTP. Figure 10B The non-connecting portion NCTP may be provided around the connecting portion CTP. The non-connecting portion NCTP may be provided at a position lower than that of the connecting portion CTP.
[0146] The second connection pattern CL2 may be formed along Figure 8 The auxiliary pattern OHP is covered on the cross section taken along the line BB'. Figure 8 In a cross section taken along line BB' of FIG. 1 , the auxiliary pattern OHP may be covered by the first connection pattern CL1 and the second connection pattern CL2. The second connection pattern CL2 may be disposed on the auxiliary pattern OHP and the first connection pattern CL1. The second connection pattern CL2 may contact the first connection pattern CL1 to be electrically connected to the first connection pattern CL1. The second connection pattern CL2 may contact the pad portion PDP through the contact hole COP. That is, the first connection pattern CL1, the second connection pattern CL2, and the pad portion PDP may be electrically connected to each other.
[0147] Figure 9C According to one embodiment of the present invention, Figure 8 Hereinafter, with reference to Figure 9A and Figure 9B The same components as those described above are denoted by the same reference numerals or symbols, and description thereof will be omitted.
[0148] refer to Figure 9CA contact hole COP may be defined in the second to fourth insulating layers INS2 to INS4. The contact hole COP may pass through the second to fourth insulating layers INS2 to INS4. A portion of the upper surface of the pad portion PDP may be exposed to the outside through the contact hole COP. A second connection pattern CL2 may extend along inner side surfaces of the second to fourth insulating layers INS2 to INS4 defining the contact hole COP, and along the exposed upper surface of the pad portion PDP. The second connection pattern CL2 may contact the exposed upper surface of the pad portion PDP.
[0149] Figure 10A According to an embodiment of the present invention, after the first pad electrode and the first bump electrode are combined with each other, Figure 8 Hereinafter, with reference to Figures 9A to 9C The same components as those described above are denoted by the same reference numerals or symbols, and description thereof will be omitted or simplified.
[0150] refer to Figure 10A , the first conductive portion PP1 of the second connection pattern CL2 may contact the first bump electrode BP1. Accordingly, the first bump electrode BP1 may be electrically connected to the second connection pattern CL2. Because the second connection pattern CL2 is electrically connected to the first connection pattern CL1 and the pad portion PDP, the first bump electrode BP1, the first and second connection patterns CL1 and CL2, and the pad portion PDP may be electrically connected to each other.
[0151] When the first bump electrode BP1 and the first adhesive layer CF1 are bonded to the first pad electrode PD1, a bonding pressure along the third direction DR3 may be applied. Accordingly, the auxiliary pattern OHP is pressed so that the end portion TP' may be larger than the end portion TP described previously (see FIG. Figure 9A ) protrudes toward the opening CL-OP. The tip portion TP' may protrude further than the concave conductive portion Si1 toward the opening CL-OP by a first protrusion length TDP1' in a plan view. The first protrusion length TDP1' may be about 0.7 μm or more.
[0152] The first adhesive layer CF1 may couple the first pad electrode PD1 and the first bump electrode BP1 to each other. The first adhesive layer CF1 may contact the first pad electrode PD1 and the first bump electrode BP1. The first adhesive layer CF1 may fill the opening CL-OP. The first adhesive layer CF1 may fill the driving part DC (see FIG. 1 ). Figure 7 ) and display panel DP (see Figure 7 Herein, the first adhesive layer CF1 may not include a conductive material such as nano-conductive particles.
[0153] The first adhesive layer CF1 may bond the first pad electrode PD1 and the first bump electrode BP1 to each other while surrounding the tip portion TP'. The first adhesive layer CF1 may include a first adhesive portion ANC1 and a second adhesive portion ANC2. The first adhesive portion ANC1 may be a portion of the first adhesive layer CF1 located below the tip portion TP'. The second adhesive portion ANC2 may be a portion of the first adhesive layer CF1 located above the tip portion TP'.
[0154] The first adhesive portion ANC1 and the second adhesive portion ANC2 secure the auxiliary pattern OHP so that it does not shift, even when stress is applied to the auxiliary pattern OHP. The end portion TP' located between the first adhesive portion ANC1 and the second adhesive portion ANC2 serves as a stopper to prevent the auxiliary pattern OHP from moving. When stress is applied to the auxiliary pattern OHP in the third direction DR3 (upward), the second adhesive portion ANC2, positioned above the end portion TP', prevents the end portion TP' from moving in the direction of the stress. When stress is applied to the auxiliary pattern OHP in the opposite direction of the third direction DR3 (downward), the first adhesive portion ANC1, positioned below the end portion TP', prevents the end portion TP' from moving in the direction of the stress. Consequently, even when stress is applied to the auxiliary pattern OHP, the position of the auxiliary pattern OHP remains unchanged, and the first pad electrode PD1 and the first bump electrode BP1 maintain contact with each other. Consequently, the electrical connection characteristics between the first pad electrode PD1 and the first bump electrode BP1 are improved.
[0155] Figure 10B According to an embodiment of the present invention, after the first pad electrode and the first bump electrode are combined with each other, Figure 8 A cross-sectional view taken along line BB'.
[0156] refer to Figure 10B , the auxiliary pattern OHP may be surrounded by the first and second connection patterns CL1 and CL2. Figure 10A The terminal part TP' (see Figure 10A ) between the auxiliary pattern OHP and the opening CL-OP (see Figure 10A ) does not exist on the portion that does not correspond, so that there may be no member for fixing the position of the auxiliary pattern OHP. However, since Figure 10A The opening CL-OP shown in the example (see Figure 10A ), the second connection pattern CL2 may be disconnected, so it may be difficult to electrically connect the second connection pattern CL2 to the pad portion PDP.
[0157] Therefore, the terminal portion TP' (see Figure 10A ) may be provided on a portion of the first pad electrode PD1, such as Figure 10A As illustrated in FIG, to fix the position of the auxiliary pattern OHP, and on the remaining portion of the first pad electrode PD1, the second connection pattern CL2 may extend along the contact hole COP to be electrically connected to the pad portion PDP, as shown in FIG. Figure 10B exemplified in .
[0158] Figures 11A to 11F FIG. 1 is a plan view illustrating the arrangement of openings and auxiliary patterns according to an embodiment of the present invention.
[0159] refer to Figures 11A to 11F , the shapes and arrangements of the auxiliary patterns OHP and the openings CL-OP may be changed.
[0160] refer to Figure 11A , a plurality of auxiliary patterns OHP may be arranged along the first direction DR1. A plurality of openings CL-OP may be arranged spaced apart from each other in the second direction DR2, with the auxiliary pattern OHP therebetween. That is, a column of openings CL-OP may be arranged on the left side of the auxiliary pattern OHP, and a column of openings CL-OP may be arranged on the right side of the auxiliary pattern OHP. The openings CL-OP may each have a triangular shape in a plan view. Only portions of the openings CL-OP may overlap with the auxiliary patterns OHP in a plan view. The plan shape of the recessed conductive portion S1 may correspond to the plan shape of the openings CL-OP.
[0161] refer to Figure 11B , a plurality of openings CL-OP may be spaced apart from one another in the first direction DR1, with auxiliary patterns OHP interposed therebetween. In this case, the openings CL-OP and the auxiliary patterns OHP may be alternately arranged along the first direction DR1. The planar shape of each of the openings CL-OP may be a quadrilateral. In plan view, a portion of the upper side of an opening CL-OP disposed between the auxiliary patterns OHP may overlap with the auxiliary pattern OHP, and a portion of the lower side may overlap with the auxiliary pattern OHP.
[0162] refer to Figure 11C The plurality of openings CL-OP may correspond one-to-one to the plurality of auxiliary patterns OHP. The openings CL-OP may be disposed on the left side of the auxiliary pattern OHP corresponding to odd-numbered rows of the auxiliary pattern OHP. The openings CL-OP may be disposed on the right side of the auxiliary pattern OHP corresponding to even-numbered rows of the auxiliary pattern OHP. A portion of each of the openings CL-OP adjacent to the auxiliary pattern OHP may overlap with the auxiliary pattern OHP in a plan view.
[0163] refer to Figure 11D The opening CL-OP may be provided at opposite sides of some of the auxiliary patterns OHP, and the opening CL-OP may be provided at the left or right side of the remaining auxiliary patterns OHP.
[0164] refer to Figure 11E , the openings CL-OP may be disposed apart from each other with the auxiliary pattern OHP therebetween. At this time, two openings CL-OP (spaced apart from each other with the auxiliary pattern OHP therebetween) may be disposed along the first diagonal direction CR1 or the second diagonal direction CR2.
[0165] refer to Figure 11F , the opening CL-OP may be arranged on the left or right side of the auxiliary pattern OHP. The opening CL-OP and the auxiliary pattern OHP corresponding to odd-numbered rows may be arranged so that the auxiliary pattern OHP is located on the left and the opening CL-OP is located on the right. The opening CL-OP and the auxiliary pattern OHP corresponding to even-numbered rows may be arranged so that the opening CL-OP is located on the left and the auxiliary pattern OHP is located on the right. The auxiliary pattern OHP and the opening CL-OP may be alternately arranged along the first direction DR1.
[0166] Figures 12A to 12G Hereinafter, the same components as those described above are denoted by the same reference numerals or symbols, and description thereof will be omitted.
[0167] refer to Figure 12A and Figure 12B The pad portion PDP is formed on the first insulating layer INS1, and on the pad portion PDP, a second insulating layer INS2, a third insulating layer INS3, and a fourth insulating layer INS4 may be sequentially formed.
[0168] refer to Figure 12C , the preliminary first connection pattern CL1-P may be formed on the fourth insulating layer INS4. The auxiliary pattern OHP protruding toward the third direction DR3, which is the upward direction, may be formed on the preliminary first connection pattern CL1-P. The preliminary first connection pattern CL1-P may include Figure 5 The material of the first connection electrode CNE1 in FIG. 1 is the same material as that of the first connection electrode CNE1 and may be formed by the same process as that of forming the first connection electrode CNE1.
[0169] refer to Figure 12D , a preliminary second connection pattern layer CL2-P covering the preliminary first connection pattern CL1-P and the auxiliary pattern OHP may be formed. The preliminary second connection pattern layer CL2-P may include Figure 5 The second connection electrode CNE2 may be formed of the same material as that of the second connection electrode CNE2 and may be formed through the same process as that of forming the second connection electrode CNE2.
[0170] In addition, a photoresist pattern PR having a light opening PR-OP defined therein may be formed on the preliminary second connection pattern layer CL2-P. After forming a photoresist layer containing a photosensitive material, light is emitted to a portion of the photoresist layer corresponding to the light opening PR-OP, or to a portion other than the light opening PR-OP, thereby forming the photoresist pattern PR. The light opening PR-OP may be aligned with the opening CL-OP (see FIG. Figure 12E )correspond.
[0171] refer to Figure 12E , the preliminary second connection pattern layer CL2-P can be etched (see Figure 12D ) to form an opening CL-OP exposing a portion of the auxiliary pattern OHP, thereby forming the second connection pattern CL2. That is, the preliminary second connection pattern layer CL2-P (see FIG. 1 ) which does not overlap with the photoresist pattern PR in a plan view may be etched. Figure 12D The preliminary second connection pattern layer CL2-P corresponding to the optical opening PR-OP may be etched (see Figure 12D At this time, the preliminary second connection pattern layer CL2-P may be wet etched or dry etched.
[0172] refer to Figure 12E and Figure 12F , in a state where the photoresist pattern PR remains, the preliminary first connection pattern CL1-P is etched to form the first connection pattern CL1. Figure 12E In the etching, over-etching is performed, which is to etch beyond the depth of etching used to form the second connection pattern CL2. The formed first connection pattern CL1 may include a recessed conductive portion Sil that is recessed toward the center of the auxiliary pattern OHP in a plan view relative to the auxiliary pattern OHP. Not only the portion of the preliminary first connection pattern CL1-P that does not overlap with the auxiliary pattern OHP in a plan view, but also the portion of the preliminary first connection pattern CL1-P that is disposed below the auxiliary pattern OHP may be etched together to form the recessed conductive portion Sil. Accordingly, an end portion TP may be formed that is a portion of the auxiliary pattern OHP that protrudes relatively toward the opening CL-OP relative to the first connection pattern CL1. The first connection pattern CL1 and the auxiliary pattern OHP may together form an undercut shape in cross section.
[0173] At this time, the side surfaces of the auxiliary pattern OHP exposed by the photo openings PR-OP and the openings CL-OP may also be etched together, thereby forming the recessed insulating portion GR0 recessed downward in the opposite direction to the third direction DR3 .
[0174] refer to Figure 12G , the photoresist pattern PR can be removed (see Figure 12F ).
[0175] According to an embodiment of the present invention, since the auxiliary pattern includes the end portion protruding from the first connection pattern and the adhesive layer is bonded while surrounding the end portion, the auxiliary pattern is not displaced even if external stress is applied to the auxiliary pattern.
[0176] Accordingly, the pad electrode and the bump electrode may have improved electrical connection characteristics therebetween even after bonding.
[0177] Although the embodiments of the present invention have been described, it should be understood that the present invention is not limited to these embodiments, but rather that a person skilled in the art may make various changes and modifications within the spirit and scope of the present invention as claimed in the claims. Therefore, the technical scope of the present invention should not be limited to the contents described in the specific embodiments of the specification, but should be defined by the claims.
Claims
1. A display device, characterized in that: include: The display panel includes a display area provided with pixels and a non-display area provided with pad electrodes; a driving unit, provided on the display panel and comprising a bump electrode provided to correspond to the pad electrode; as well as an adhesive layer in contact with the pad electrode and the bump electrode, The pad electrode comprises: a first connection pattern comprising a conductive material, an auxiliary pattern, disposed on the first connection pattern, protruding toward the bump electrode and containing an insulating material, and a second connection pattern, the second connection pattern comprising a conductive material, a portion of the second connection pattern being disposed on the auxiliary pattern, and an opening being defined therein for exposing a portion of the auxiliary pattern, The auxiliary pattern includes an end portion protruding toward the opening from the first connection pattern.
2. The display device according to claim 1, wherein The auxiliary patterns and the first connection patterns form an undercut shape in a cross-sectional view.
3. The display device according to claim 1, wherein The second connection pattern includes a connection portion that contacts the bump electrode, and The opening does not overlap with the connecting portion in a plan view.
4. The display device according to claim 1 or 3, characterized in that The opening is provided in plural, and The plurality of openings are disposed apart from each other in a plan view with the auxiliary pattern therebetween.
5. The display device according to claim 1 or 3, characterized in that: The auxiliary pattern is provided in plurality, The opening is provided in plural, and The plurality of openings correspond to the plurality of auxiliary patterns one-to-one, or the plurality of openings and the plurality of auxiliary patterns are alternately arranged along the first direction.
6. The display device according to claim 1, wherein A side surface of the auxiliary pattern exposed by the opening includes a recessed insulating portion recessed downward.
7. The display device according to claim 1, wherein The adhesive layer surrounds the end portion and bonds the pad electrode and the bump electrode to each other, and The adhesive layer does not include conductive material.
8. The display device according to claim 1, wherein The first connection pattern includes a concave conductive portion that is concave relative to the auxiliary pattern toward the center of the auxiliary pattern in a plan view, The end portion protrudes from the concave conductive portion toward the opening by a first protrusion length, and the first protrusion length is 0.4 micrometers or more, and In a cross-sectional view, the recessed conductive portion protrudes toward the opening more than a side surface of the portion of the second connection pattern disposed on the auxiliary pattern, among side surfaces of the second connection pattern defining the opening.
9. The display device according to claim 1, wherein Further including: a signal line including a wiring portion connected to the pixel and a pad portion extending from an end portion of the wiring portion and having a width greater than a width of the wiring portion; as well as an insulating layer disposed on and covering the pad portion, wherein the second connection pattern is electrically connected to the pad portion through a contact hole passing through the insulating layer, and The contact hole does not overlap with the auxiliary pattern in a plan view.
10. A display device, characterized in that: include: A display panel having a pad electrode; a driving unit, provided on the display panel and comprising a bump electrode provided to correspond to the pad electrode; as well as an adhesive layer in contact with the pad electrode and the bump electrode, The pad electrode comprises: a first connection pattern comprising a conductive material, an auxiliary pattern, disposed on the first connection pattern, protruding toward the bump electrode and containing an insulating material, and a second connection pattern, the second connection pattern comprising a conductive material, a portion of the second connection pattern being disposed on the auxiliary pattern, and an opening being defined therein for exposing a portion of the auxiliary pattern, The first connection pattern includes a concave conductive portion that is concave relative to the auxiliary pattern toward a center of the auxiliary pattern in a plan view.
Citation Information
Patent Citations
Ceiling storage system
KR1020230128057A