Charging and discharging circuit for alternating current charging pile

By introducing detection modules, processing modules and switching modules into the charging pile, the plug or socket can be automatically identified and the internal resistance can be switched, thus solving the problems of cumbersome operation and false alarms of V2L technology and realizing intelligent automatic adaptation.

CN223314862UActive Publication Date: 2025-09-09ZHEJIANG BENYI NEW ENERGY CO LTD
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Patent Information

Application Number
CN202422893318.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-26
Publication Date
2025-09-09
Estimated Expiration
2034-11-26

AI Technical Summary

Technical Problem

Existing V2L technology is cumbersome to operate in new energy vehicles, easily triggers the forward charging adhesion detection alarm, and is not smart enough.

Method used

The detection module is used to automatically identify the plug or the socket board, the processing module is used to process the data, and the switching module is used to automatically switch the internal resistance to control the output current, thereby realizing automatic adaptation of the plug and the socket board.

Benefits of technology

It improves the intelligence level of the charging pile, simplifies the operation process, avoids false alarms of forward charging adhesion detection, and realizes automatic adaptation of the plug and the socket.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model relates to the field of charging piles, in particular to a charging and discharging circuit for an alternating-current charging pile, and the circuit comprises a detection module which is used for detecting an external plug or plugboard, and outputting a detection signal; the processing module is used for receiving the detection signal, carrying out data processing and then outputting a processing signal; and the switching module is used for receiving the processing signal and switching an internal resistor so as to realize switching of the output current. The charging pile has the effect of automatically realizing automatic switching according to the plug or the plugboard inserted into the charging pile.
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Description

Technical Field

[0001] The present application relates to the field of charging piles, and in particular to a charging and discharging circuit for an AC charging pile. Background Art

[0002] Some automakers have already integrated V2L technology into their concept vehicles or prototypes. These vehicles typically feature specially designed charging ports and power output interfaces that can connect to external devices or the power grid and provide power supply. As the relevant technology and market environment mature, V2L technology is expected to be more widely used and promoted in the future. However, it currently faces various challenges, such as a lack of intelligence. Charging piles with external discharge functions require users to insert the charging gun into the new energy vehicle, insert the power strip into the charging pile, and then adjust the mode to discharge the power in the new energy vehicle in reverse order. This operation is cumbersome, and reverse discharge is likely to trigger the adhesion detection of the forward charging, causing an alarm. Utility Model Content

[0003] In order to improve the problem that V2L technology is not smart enough in use and is cumbersome to operate, the present application provides a charging and discharging circuit for an AC charging pile.

[0004] This application provides a charging and discharging circuit for an AC charging pile, which adopts the following technical solution:

[0005] A charging and discharging circuit for an AC charging pile, comprising:

[0006] A detection module is used to detect an external plug or board and output a detection signal;

[0007] a processing module, which receives the detection signal, performs data processing, and outputs a processed signal;

[0008] The switching module receives the processing signal and switches the internal resistance to achieve switching of the output current.

[0009] By adopting the above technical solution, it is possible to automatically identify whether the charging pile is currently plugged in with a plug or a socket, and then automatically switch the internal resistance to control the output, which is more efficient and improves intelligence.

[0010] Optionally, the detection module includes a patch U11, a resistor R19, and a resistor R20, the resistor R19 is electrically connected to the first pin of the patch U11 to divide the voltage in series with the internal resistance of an external plug or socket, the resistor R20 is connected in parallel to the resistor R19, the detection signal includes an ADC1_PLUG_RATED signal, and the resistor R20 outputs the ADC1_PLUG_RATED signal.

[0011] By adopting the above technical solution, it is possible to automatically determine whether the current connection is a plug or a socket, thereby automatically achieving differentiated control of charging and discharging.

[0012] Optionally, the processing module includes a chip U4, the fourteenth pin of the chip U4 receives the ADC1_PLUG_RATED signal, the eleventh pin of the chip U4 outputs the CC_CHECK signal, the eighteenth pin of the chip U4 outputs the CP_CHECK signal, the twenty-first pin of the chip U4 outputs the CP_CHECK2-1 signal, the nineteenth pin of the chip U4 outputs the PWM signal, the thirty-eighth pin of the chip U4 receives the HLW_RX signal, and the sixteenth pin of the chip U4 receives the RELAY_FB signal.

[0013] By adopting the above technical solution, it automatically determines whether the plug is a plug or a board, and outputs the corresponding processing signal after internal program calculation.

[0014] Optionally, the switching module includes:

[0015] The charge and discharge circuit receives the CC_CHECK signal to control the output of the CC signal to confirm the charging connection status;

[0016] The CP signal driving circuit receives the CP_CHECK2-1 signal and the CC signal to control the output.

[0017] By adopting the above technical solution, the charging of new energy vehicles and the adaptation and switching of the external plug-in board can be automatically realized, which is convenient and fast.

[0018] Optionally, the charge and discharge circuit includes a relay K1, a transistor Q2, a resistor R25, and a resistor R33. The emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is electrically connected to the first pin and the eighth pin of the relay K1, the base of the transistor Q2 receives the CC_CHECK signal to control the high and low levels of the first pin and the eighth pin of the relay K1, the resistor R33 is electrically connected to the fifth pin of the relay K1, the resistor R25 is electrically connected to the third pin of the relay K1, and the second pin and the sixth pin of the relay K1 output the CC signal.

[0019] By adopting the above technical solution, the internal resistance in the circuit is automatically switched according to the previously automatically determined whether a plug or a socket is plugged in, thereby achieving switching of the output current, thereby achieving automatic adaptation of the plug and the socket.

[0020] Optionally, the CP signal driving circuit includes a relay K2, a transistor Q3, and a patch U8, the emitter of the transistor Q3 is grounded, the collector of the transistor Q3 is electrically connected to the first pin and the eighth pin of the relay K2, the base of the transistor Q3 receives the CP_CHECK2-1 signal to control the high and low levels of the first pin and the eighth pin of the relay K2, the second pin and the sixth pin of the relay K2 output the CP-CAR signal, the first pin of the patch U8 receives the CC signal, the second pin of the patch U8 outputs the CP-CAR signal, and the fifth pin of the relay K2 receives the CP_CHECK signal.

[0021] By adopting the above technical solution, the internal resistance in the circuit is automatically switched according to the previously automatically determined whether a plug or a socket is plugged in, and the output current is switched, thereby achieving automatic adaptation of the plug and the socket.

[0022] Optionally, the CP signal driving circuit also includes an operational amplifier U6, the third pin of the operational amplifier U6 receives the PWM signal, the fourth pin of the operational amplifier U6 receives a +3.3V power supply, the fifth pin of the operational amplifier U6 receives a +12V power supply, the second pin of the operational amplifier U6 receives a -12V power supply, and the first pin of the operational amplifier U6 is electrically connected to the fifth pin of the relay K2.

[0023] By adopting the above technical solution, the output when charging new energy vehicles is controlled by PWM signals, while if it is a plug-in board, the input of the PWM signal is cancelled and the maximum current is directly output.

[0024] Optionally, it includes a dual power supply, which is used to receive forward power supply and reverse power supply, and output to power chip U4. The dual power supply includes a common-mode inductor L1, a load monitor PM1, and a load monitor PM2. The first pin of the common-mode inductor L1 is electrically connected to the N end, the third pin of the common-mode inductor L1 is electrically connected to the L end, the second pin of the common-mode inductor L1 is electrically connected to the first pin of the load monitor PM1, and the fourth pin of the common-mode inductor L1 is electrically connected to the second pin of the load monitor PM1. The fourth pin and the fifth pin of the load monitor PM1 are connected in parallel to the fifth pin of the load monitor PM2. The first pin of the load monitor PM2 outputs or receives the L_OUT2 signal, the second pin of the load monitor PM2 outputs or receives the N_OUT2 signal, and the load monitor PM1 and the load monitor PM2 are electrically connected to +12V power supply.

[0025] By adopting the above technical solution, it is ensured that the chip U4 can be powered and work regardless of which end the power is supplied from.

[0026] Optionally, it includes a leakage detection module for detecting leakage, the leakage detection module includes an interface MD1, a voltage transformer ZM1, and a chip U2, the first pin of the voltage transformer ZM1 is electrically connected to the N end, the second pin of the voltage transformer ZM1 is electrically connected to the L end, the third pin of the voltage transformer ZM1 outputs a ZMP_3 signal, the fourth pin of the voltage transformer ZM1 outputs a ZMP_4 signal, the ZMP_3 signal and the ZMP_4 signal are electrically connected in parallel to the fourth pin of the chip U2, the second pin and the third pin of the chip U2 are electrically connected to the CT* signal and the CT signal, respectively, and the sixth pin of the chip U2 outputs the HLW_RX signal.

[0027] By adopting the above technical solution, leakage detection is performed to improve safety.

[0028] Optionally, a adhesion detection module is included, which includes a photocoupler U1, a first pin of the photocoupler U1 receives an L_OUT signal, a second pin of the photocoupler U1 receives an N_OUT signal, and a fourth pin of the photocoupler U1 outputs the RELAY_FB signal.

[0029] By adopting the above technical solution, when the new energy vehicle is forward charged, the adhesion detection module detects adhesion detection. If the external plug-in board is powered in reverse, the adhesion detection module detects reverse power supply and does not report adhesion fault and undervoltage, thereby reducing false alarms.

[0030] In summary, this application includes at least one of the following beneficial technical effects:

[0031] 1. Automatically identify whether the charging pile is currently plugged in with a plug or a socket, and then automatically switch the internal resistance to control the output, which is more efficient and improves intelligence.

[0032] 2. Based on the previously automatically determined plug-in type, whether it is a plug or a strip, the internal resistance in the circuit is automatically switched to achieve the switching of the output current, thereby achieving automatic adaptation of the plug and strip. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a circuit diagram of a highlight detection module of a charging and discharging circuit for an AC charging pile in an embodiment of the present application.

[0034] Figure 2 FIG. 2 is a circuit diagram highlighting the processing module.

[0035] Figure 3 It is a circuit diagram highlighting the charge and discharge circuit.

[0036] Figure 4 FIG. 1 is a circuit diagram highlighting the CP signal driving circuit.

[0037] Figure 5 It is a circuit diagram highlighting the dual power supply.

[0038] Figure 6 This is a circuit diagram highlighting the leakage detection module.

[0039] Figure 7 Figure 2 is a circuit diagram highlighting the adhesion detection module.

[0040] Explanation of the accompanying drawings: 1. Detection module; 2. Processing module; 3. Charge and discharge circuit; 31. CP signal driving circuit; 4. Dual power supply; 5. Leakage detection module; 6. Adhesion detection module. DETAILED DESCRIPTION

[0041] The following is combined with Figure 1-7 This application is described in further detail.

[0042] The present application embodiment discloses a charging and discharging circuit for an AC charging pile. Figure 1 and Figure 2 The charging and discharging circuit used for the AC charging pile includes a detection module 1, a processing module 2 and a switching module. The detection module 1 is used to detect whether the connected device is a plug or a socket board, and then outputs the detected signal to the processing module 2 as a detection signal. After processing, the processing module 2 outputs the corresponding processing signal to the switching module. The switching module adjusts the internal resistance, thereby adjusting the output current.

[0043] Reference Figure 1 and Figure 2, the detection module 1 includes patch U11, resistor R19, resistor R20, capacitor C37, resistor R22, resistor R23, capacitor C42, the detection signal includes ADC1_PLUG_RATED signal and ADC1_PLUG_NTC signal, patch U11 can use Jiali Chuang 2.54-2PWTDK model patch, resistor R19 is connected in series between the first pin of patch U11 and +3.3V power supply, one end of resistor R20 is connected in parallel between resistor R19 and the first pin of patch U11 for voltage division, capacitor C37 is connected in parallel to the other end of resistor R20, and the other end of resistor R20 outputs ADC1_PLUG_RATED signal, the external plug or plugboard is electrically connected between resistor R19 and the first pin of patch U11, that is, the PLUG_RATED_IN signal in the figure is the signal connected to the plug or plugboard; resistor R22 is connected in series with patch U11 Between the second pin of and the +3.3V power supply, one end of the resistor R23 is connected in parallel between the resistor R22 and the second pin of the patch U11, the other end of the resistor R22 outputs the ADC1_PLUG_NTC signal, and the capacitor C42 is connected in parallel to the other end of the resistor R22, the temperature sensor is electrically connected between the resistor R22 and the second pin of the patch U11, that is, the PLUG_NTC_IN signal in the figure is the signal connected to the temperature sensor, and there are resistors and temperature sensors for identification inside the plug, that is, when the plug or the plugboard is inserted, the resistance value of the PLUG_RATED_IN signal will be different, and the ADC1_PLUG_RATED signal obtained by the voltage division on the resistor R20 is different. When the plug temperature is different, the resistance value of the PLUG_NTC_IN signal is different, and the ADC1_PLUG_NTC signal obtained by the voltage division on the resistor R23 is different, so as to provide circuit protection when the temperature is too high.

[0044] Reference Figure 2 Processing module 2 includes chip U4. Pin 14 of chip U4 receives the ADC1_PLUG_RATED signal. Pin 11 of chip U4 outputs the CC_CHECK signal. Pin 18 of chip U4 outputs the CP_CHECK signal. Pin 21 of chip U4 outputs the CP_CHECK2-1 signal. Pin 19 of chip U4 outputs the PWM signal. Pin 38 of chip U4 receives the HLW_RX signal. Pin 16 of chip U4 receives the RELAY_FB signal. Pins 1, 7, 9, 24, and 48 of chip U4 receive a divided +3.3V power supply. Pin 15 of chip U4 receives the ADC1_PLUG_NTC signal. Processed signals include all signals output from chip U4.

[0045] Reference Figure 2 and Figure 3The switching module includes a charge and discharge circuit 3 and a CP signal driving circuit 31. The charge and discharge circuit 3 includes a relay K1, a resistor R25, a resistor R33, a resistor R35, a resistor R36, a diode D5, a transistor Q2, and a capacitor C45. The emitter of the transistor Q2 is grounded, the resistor R35 is connected in series between the input end of the CC_CHECK signal and the base of the transistor Q2, one end of the resistor R36 is connected in parallel between the resistor R35 and the base of the transistor Q2, the other end of the resistor R36 is grounded, the anode of the diode D5 is electrically connected to the collector of the transistor Q2, and the diode D The cathode of 5 is electrically connected to the first pin of the relay K1, the eighth pin of the relay K1 is connected in parallel between the anode of the diode D5 and the collector of the transistor Q2, the +5.5V power supply is connected in parallel to the cathode of the diode D5, one end of the capacitor C45 is connected in parallel to the cathode of the diode D5, the other end of the capacitor C45 is grounded, the resistor R33 is connected in series between the ground terminal PE and the fifth pin of the relay K1, the sixth pin of the relay K1 outputs the CC signal, the resistor R25 is connected in series between the ground terminal PE and the third pin of the relay K1, and the second pin of the relay K1 outputs the CC signal. The high and low levels of the CC_CHECK signal control the on and off state of transistor Q2, thereby controlling the high and low levels of the first and eighth pins of relay K1. Relay K1 controls the on and off state of pins 5 and 6, as well as the on and off state of pins 2 and 3, through the high and low levels of the first and eighth pins. That is, when pins 5 and 6 are conductive, resistor R33 is connected to the circuit, and pin 6 outputs a corresponding high CC level. When pins 2 and 3 are conductive, resistor R25 is connected to the circuit, and pin 2 outputs a corresponding high CC level.

[0046] Reference Figure 2 and Figure 4The CP signal driving circuit 31 includes a relay K2, a transistor Q3, a patch U8, a resistor R27, a resistor R29, a resistor R32, a resistor R24, a resistor R26, a resistor R37, a resistor R38, a transistor Q3, a diode D3, a diode D4, a diode D6, a transient voltage suppressor diode TVS1, a capacitor C46, ​​a capacitor C49, a capacitor C50, a capacitor C43 and a capacitor C44. The emitter of the transistor Q3 is grounded, and the resistor R37 is connected in series with the base of the transistor Q3 and the CP_CHECK2-1 signal. One end of the resistor R38 is connected in parallel between the resistor R37 and the base of the transistor Q3, the other end of the resistor R38 is grounded, the anode of the diode D6 is electrically connected to the collector of the transistor Q3, the cathode of the diode D5 is electrically connected to the +5.5V power supply, one end of the capacitor C46 is connected in parallel to the cathode of the diode D6, the other end of the capacitor C46 is grounded, the first pin of the relay K2 is connected in parallel to the cathode of the diode D6, the eighth pin of the relay K2 is connected in parallel to the anode of the diode D6, and the second pin of the relay K2 is connected in parallel to the cathode of the diode D6. Output CP_CAR signal, the positive electrode of diode D3 is electrically connected to the third pin of relay K2, the negative electrode of diode D3 is electrically connected to one end of resistor R26, the other end of resistor R26 is grounded, the two ends of resistor R24 ​​are connected in parallel to the two ends of resistor R26, the sixth pin of relay K2 outputs CP_CAR signal, resistor R27 and resistor R32 are connected in series between the fifth pin of relay K2 and the input end of CP_CHECK signal, one end of capacitor C49, one end of capacitor C50 and transient voltage suppression diode One end of TVS1 is connected in parallel between the resistor R32 and the fifth pin of the relay K2. The other end of the capacitor C49, the other end of the capacitor C50, and the other end of the transient voltage suppression diode TVS1 are grounded. One end of the resistor R29, one end of the capacitor C43, one end of the capacitor C44, and the cathode of the diode D4 are connected in parallel between the resistor R27 and the input end of the CP_CHECK signal. The other end of the resistor R29, the other end of the capacitor C43, the other end of the capacitor C44, and the anode of the diode D4 are grounded. The base of transistor Q3 receives the CP_CHECK2-1 signal to control the on and off of transistor Q3, thereby controlling the high and low levels of the first and eighth pins of relay K2. The high and low levels of the first and eighth pins of relay K2 control the on and off of the second and third pins of relay K2 and the on and off of the fifth and sixth pins of relay K2, thereby controlling the second and sixth pins of relay K2 to output corresponding high and low level CP-CAR signals. The third and fourth pins of patch U8 are grounded. The first pin of patch U8 receives the CC signal, and the second pin of patch U8 outputs the CP-CAR signal.

[0047] Reference Figure 2 and Figure 4The CP signal driving circuit 31 also includes an operational amplifier U6, a resistor R28, a resistor R30, a resistor R31, a resistor R34, a capacitor C47, a capacitor C48, a capacitor C51 and a capacitor C52. The third pin of the operational amplifier U6 receives the PWM signal, one end of the resistor R28 is electrically connected to the +3.3V power supply, the other end of the resistor R28 is electrically connected to one end of the resistor R30, and the other end of the resistor R30 is grounded. The fourth pin of the operational amplifier U6 is connected in parallel between the resistor R28 and the resistor R30. The fifth pin of the operational amplifier U6 is electrically connected to the +12V power supply. The capacitor C47 One end of capacitor C47 is connected in parallel with one end of capacitor C48 to the fifth pin of operational amplifier U6. The other ends of capacitor C47 and C48 are grounded. The second pin of operational amplifier U6 is electrically connected to the -12V power supply. One end of capacitor C51 and one end of capacitor C52 are connected in parallel to the second pin of operational amplifier U6. The other ends of capacitor C51 and C52 are grounded. One end of resistor R31 is electrically connected to the first pin of operational amplifier U6. The other end of resistor R31 is connected in parallel between resistors R27 and R32. The two ends of resistor R32 are connected in parallel to the two ends of resistor R31. After receiving the ADC1_PLUG_RATED signal to determine whether it is a plug or a board, chip U4 outputs the corresponding CP_CHECK signal, CP_CHECK2-1 signal, PWM signal, and CC_CHECK signal for output control.

[0048] Reference Figure 2 and Figure 5, also includes a dual power supply 4, the dual power supply 4 includes a common-mode inductor L1, a load monitor PM1, a load monitor PM2, a potentiometer RV1, a thermistor NTC1, a capacitor C5, a capacitor C2, a capacitor C5, and a resistor R1. The first pin of the common-mode inductor L1 is electrically connected to the N terminal, the potentiometer RV1 is connected in parallel between the L terminal and the N terminal, the thermistor NTC1 is connected in series between the third pin of the common-mode inductor L1 and the L terminal, the capacitor C5 is connected in parallel between the first pin and the third pin of the common-mode inductor L1, the second pin of the common-mode inductor L1 is electrically connected to the first pin of the load monitor PM1, and the fourth pin of the common-mode inductor L1 is electrically connected to the second pin of the load monitor PM1; one end of the resistor R1 is electrically connected to the load monitor The fifth pin of the load monitor PM1 is connected to the fifth pin of the load monitor PM2, the other end of the resistor R1 is electrically connected to the fifth pin of the load monitor PM2, one end of the capacitor C2 and one end of the capacitor C3 are respectively connected in parallel between the resistor R1 and the fifth pin of the load monitor PM2, the other end of the capacitor C2 and the other end of the capacitor C3 are connected in parallel to the fourth pin of the load monitor PM1, the fourth pin of the load monitor PM1 is grounded, a +12V power supply is connected in parallel between the resistor R1 and the capacitor C2, and a +12V power supply is connected in parallel to the fifth pin of the load monitor PM2. The two +12V power supplies here are output power supplies, the first pin of the load monitor PM2 outputs or receives the L_OUT2 signal, and the second pin of the load monitor PM2 outputs or receives the N_OUT2 signal. The forward power supply is input from the L and N terminals, and outputs +12V power supply after passing through the common-mode inductor L1 and the load monitor PM1, and then forms a +3.3V power supply through the DCDC step-down module and the microcontroller power supply circuit to power the chip U4. The reverse power supply is input from the L_OUT2 signal and the N_OUT2 signal, and outputs +12V power supply after passing through the load monitor PM2, and then forms a +3.3V power supply through the DCDC step-down module and the microcontroller power supply circuit to power the chip U4.

[0049] Reference Figure 2 and Figure 6, and also includes a leakage detection module 5 for detecting leakage. The leakage detection module 5 includes an interface MD1, a voltage transformer ZM1, a chip U2, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C2, a capacitor C3, a capacitor C9, a capacitor C11, a capacitor C15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R3, a resistor R2, a resistor R5, a resistor R8, a resistor R6, a resistor R11, and a resistor R12. The interface MD1 is used to transmit a TRIP signal, a TEST-IN signal, a CT* signal, a CT signal, a L_OUT signal, a L_OUT2 signal, and a N_OUT signal. , N_OUT2 signal, interface MD1 receives +5V power supply, +5V power supply is grounded after passing through capacitor C12 and capacitor C13 in parallel, TEST-IN signal is grounded through capacitor C15, TRIP signal is grounded through capacitor C14, the second pin of voltage transformer ZM1 is electrically connected to the L terminal, resistor R16, resistor R17, resistor R18 and resistor R19 are connected in series between the first pin and N terminal of voltage transformer ZM1, both ends of resistor R20 are connected in parallel to resistor R16, both ends of resistor R21 are connected in parallel to resistor R17, both ends of resistor R22 are connected in parallel to resistor R18, both ends of resistor R23 are connected in parallel to resistor R19, the third pin of voltage transformer ZM1 outputs ZMP_3 signal, voltage The fourth pin of the transformer ZM1 outputs the ZMP_4 signal. The first pin and the third pin of the voltage transformer ZM1 are in the same direction. The resistor R11 is connected in series between the input end of the ZMP_4 signal and the fourth pin of the chip U2. One end of the capacitor C15 is electrically connected to the input end of the ZMP_3 signal. The other end of the capacitor C15 is connected in parallel between the resistor R11 and the fourth pin of the chip U2. The resistor R12 is connected in parallel between the input end of the ZMP_4 signal and the input end of the ZMP_3 signal. The input end of the ZMP_3 signal and the capacitor C15 are connected in parallel to ground. The resistor R3 is connected in series between the input end of the CT* signal and the second pin of the chip U2. The resistor R8 is connected in series between the input end of the CT signal and the third pin of the chip U2. Resistor R5 is connected in parallel between the input end of the CT* signal and the input end of the CT signal, resistor R5 and resistor R8 are connected in parallel to ground, one end of capacitor C9 is connected in parallel between resistor R3 and the second pin of chip U2, the other end of capacitor C9 is electrically connected to one end of capacitor C11, the other end of capacitor C11 is connected in parallel between resistor R8 and the third pin of chip U2, capacitor C9 and capacitor C11 are connected in parallel to ground and grounded through resistor R2, one end of capacitor C2 is electrically connected to the +5V power supply, the other end of capacitor C2 is grounded, the first pin of chip U2 is connected in parallel between the +5V power supply and capacitor C2, one end of capacitor C3 is connected in parallel to the first pin of chip U2, the other end of capacitor C3 is grounded, and the fifth pin of chip U2 is grounded.Resistor R6 is connected in series to the sixth pin of chip U2 and outputs the HLW_RX signal. Chip U2 can use HLW8032.

[0050] Reference Figure 2 and Figure 7 , also includes an adhesion detection module 6, the adhesion detection module 6 includes a photoelectric coupler U1, a diode D1, a resistor R3, a resistor R4, a resistor R2, a capacitor C4, and a capacitor C1, the capacitor C1 is connected in series between the first pin of the photoelectric coupler U1 and the input end of the L_OUT signal, the resistor R3 and the resistor R4 are connected in series between the second pin of the photoelectric coupler U1 and the input end of the N_OUT signal, the positive electrode of the diode D1 is connected in parallel between the resistor R4 and the second pin of the photoelectric coupler U1, the negative electrode of the diode D1 is connected in parallel between the capacitor C1 and the first pin of the photoelectric coupler U1, the fourth pin of the photoelectric coupler U1 outputs the RELAY_FB signal, the third pin of the photoelectric coupler U1 is grounded, the capacitor C4 is connected in parallel between the third and fourth pins of the photoelectric coupler U1, one end of the resistor R2 is connected in parallel to the fourth pin of the photoelectric coupler U1, and the other end of the resistor R2 is electrically connected to the +3.3V power supply.

[0051] Reference Figure 2 The 25th, 26th, 27th, 28th and 29th pins of chip U4 are respectively calculated and output LCD_SCL signal, LCD_SDA signal, LCD_RES signal, LCD_DC signal and LCD_CS signal, thereby controlling the display of the OLED screen.

[0052] The above are all preferred embodiments of the present application, and are not intended to limit the scope of protection of the present application. Therefore, any equivalent changes made based on the structure, shape, and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A charging and discharging circuit for an AC charging pile, characterized in that: include: A detection module (1) is used to detect an external plug or board and output a detection signal; A processing module (2) receives the detection signal, performs data processing, and outputs a processed signal; The switching module receives the processing signal and switches the internal resistance to achieve switching of the output current.

2. The charging and discharging circuit for an AC charging pile according to claim 1, characterized in that: The detection module (1) includes a patch U11, a resistor R19, and a resistor R20. The resistor R19 is electrically connected to the first pin of the patch U11 to be connected in series with the internal resistance of an external plug or plugboard for voltage division. The resistor R20 is connected in parallel to the resistor R19. The detection signal includes an ADC1_PLUG_RATED signal, and the resistor R20 outputs the ADC1_PLUG_RATED signal.

3. The charging and discharging circuit for an AC charging pile according to claim 1, characterized in that: The processing module (2) includes a chip U4, wherein the fourteenth pin of the chip U4 receives the ADC1_PLUG_RATED signal, the eleventh pin of the chip U4 outputs the CC_CHECK signal, the eighteenth pin of the chip U4 outputs the CP_CHECK signal, the twenty-first pin of the chip U4 outputs the CP_CHECK2-1 signal, the nineteenth pin of the chip U4 outputs the PWM signal, the thirty-eighth pin of the chip U4 receives the HLW_RX signal, and the sixteenth pin of the chip U4 receives the RELAY_FB signal.

4. The charging and discharging circuit for an AC charging pile according to claim 3, characterized in that: The switching module includes: A charge and discharge circuit (3) receives the CC_CHECK signal to control the output of the CC signal and confirm the charging connection state; The CP signal driving circuit (31) receives the CP_CHECK2-1 signal and the CC signal to control the output.

5. The charging and discharging circuit for an AC charging pile according to claim 4, characterized in that: The charge and discharge circuit (3) comprises a relay K1, a transistor Q2, a resistor R25, and a resistor R33. The emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is electrically connected to the first pin and the eighth pin of the relay K1, the base of the transistor Q2 receives the CC_CHECK signal to control the high and low levels of the first pin and the eighth pin of the relay K1, the resistor R33 is electrically connected to the fifth pin of the relay K1, the resistor R25 is electrically connected to the third pin of the relay K1, and the second pin and the sixth pin of the relay K1 output CC signals.

6. The charging and discharging circuit for an AC charging pile according to claim 5, characterized in that: The CP signal driving circuit (31) includes a relay K2, a transistor Q3, and a patch U8, wherein the emitter of the transistor Q3 is grounded, the collector of the transistor Q3 is electrically connected to the first pin and the eighth pin of the relay K2, the base of the transistor Q3 receives the CP_CHECK2-1 signal to control the high and low levels of the first pin and the eighth pin of the relay K2, the second pin and the sixth pin of the relay K2 output CP-CAR signals, the first pin of the patch U8 receives the CC signal, the second pin of the patch U8 outputs the CP-CAR signal, and the fifth pin of the relay K2 receives the CP_CHECK signal.

7. The charging and discharging circuit for an AC charging pile according to claim 6, characterized in that: The CP signal driving circuit (31) further includes an operational amplifier U6, wherein a third pin of the operational amplifier U6 receives the PWM signal, a fourth pin of the operational amplifier U6 receives a +3.3V power supply, a fifth pin of the operational amplifier U6 receives a +12V power supply, a second pin of the operational amplifier U6 receives a -12V power supply, and a first pin of the operational amplifier U6 is electrically connected to the fifth pin of the relay K2.

8. The charging and discharging circuit for an AC charging pile according to claim 1, characterized in that: The invention comprises a dual-path power supply (4), wherein the dual-path power supply (4) is used to receive forward power supply and reverse power supply, and output power supply to the chip U4, wherein the dual-path power supply (4) comprises a common-mode inductor L1, a load monitor PM1, and a load monitor PM2, wherein the first pin of the common-mode inductor L1 is electrically connected to the N end, the third pin of the common-mode inductor L1 is electrically connected to the L end, the second pin of the common-mode inductor L1 is electrically connected to the first pin of the load monitor PM1, the fourth pin of the common-mode inductor L1 is electrically connected to the second pin of the load monitor PM1, the fourth pin and the fifth pin of the load monitor PM1 are connected in parallel to the fifth pin of the load monitor PM2, the first pin of the load monitor PM2 outputs or receives an L_OUT2 signal, the second pin of the load monitor PM2 outputs or receives an N_OUT2 signal, and the load monitor PM1 and the load monitor PM2 are electrically connected to a +12V power supply.

9. The charging and discharging circuit for an AC charging pile according to claim 3, characterized in that: The invention comprises a leakage detection module (5) for detecting leakage, wherein the leakage detection module (5) comprises an interface MD1, a voltage transformer ZM1, and a chip U2, wherein a first pin of the voltage transformer ZM1 is electrically connected to the N terminal, a second pin of the voltage transformer ZM1 is electrically connected to the L terminal, a third pin of the voltage transformer ZM1 outputs a ZMP_3 signal, a fourth pin of the voltage transformer ZM1 outputs a ZMP_4 signal, the ZMP_3 signal and the ZMP_4 signal are electrically connected in parallel to the fourth pin of the chip U2, the second pin and the third pin of the chip U2 are electrically connected to the CT* signal and the CT signal respectively, and the sixth pin of the chip U2 outputs the HLW_RX signal.

10. The charging and discharging circuit for an AC charging pile according to claim 3, characterized in that: The adhesion detection module (6) includes a photoelectric coupler U1, a first pin of the photoelectric coupler U1 receives an L_OUT signal, a second pin of the photoelectric coupler U1 receives an N_OUT signal, and a fourth pin of the photoelectric coupler U1 outputs the RELAY_FB signal.