Solid state disk destroying circuit and system
By utilizing the backup power module and capacitor module in the solid-state drive to generate backup power voltage, the solid-state drive destruction circuit design is simplified, the cost is reduced, the problems of complex circuits and high costs in the existing technology are solved, and efficient data destruction effects are achieved.
Patent Information
- Application Number
- CN202422695380.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-06
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2034-11-06
AI Technical Summary
Existing SSD destruction circuits are complex in design, expensive, difficult to lay out on smaller circuit boards, and incur additional costs.
The backup power module and capacitor module inherent in the solid-state drive are used to generate a backup power voltage. Through the enable control of the control module and the switch module, the backup power voltage is injected into the flash memory particles to achieve a high-voltage shock and destroy data.
This simplifies circuit design, reduces costs, avoids the need for an additional boost module, and achieves efficient data destruction.
Smart Images
Figure CN223347341U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of solid-state hard disks, and more specifically, to a solid-state hard disk destruction circuit and system. Background Art
[0002] Since important confidential information is stored in Solid State Drives (SSDs), when SSDs are scrapped, the flash memory particles (Nand flash) in the SSDs need to be physically destroyed to completely destroy the important confidential information.
[0003] Currently, a common destruction method involves adding a boost power circuit to the SSD. This circuit uses a DC / DC module to boost the low voltage to a high voltage. This high voltage is then fed into the flash memory chips by a control enable, thereby destroying the data on the flash memory chips. However, this solution has a complex circuit structure and a bulky design. This makes layout difficult on smaller circuit boards and increases costs.
[0004] In summary, how to simplify the design of the SSD destruction circuit and reduce costs is a technical problem that needs to be urgently solved by those skilled in the art. Utility Model Content
[0005] The purpose of this application is to provide a solid-state drive destruction circuit and system to simplify the solid-state drive destruction circuit design and reduce costs.
[0006] In order to achieve the above objectives, the technical solutions adopted in this application are as follows:
[0007] On the one hand, the present application provides a solid-state hard drive destruction circuit, which includes: a backup power module, a capacitor module, a control module and a switch module;
[0008] The first port of the backup power module is connected to the flash memory particle, the second port of the backup power module is connected to the capacitor module, and the third port of the backup power module is connected to the control module; the switch module is connected to the capacitor module, the control module and the flash memory particle respectively;
[0009] The control module is configured to send a switching signal to the backup power module when receiving a destruction instruction, and the backup power module is configured to control its first port to be disconnected when receiving the switching signal, so as to stop supplying power to the flash memory particles;
[0010] The control module is further configured to send a high-level enable signal to the switch module upon receiving a destroy instruction. The switch module is configured to be turned on upon receiving the enable signal to inject the backup power voltage stored in the capacitor module into the flash memory particles.
[0011] Furthermore, the switching module includes an optocoupler and a P-type switching tube; the anode of the optocoupler is connected to the control module, the collector of the optocoupler is connected to the capacitor module and the first port of the P-type switching tube respectively, and the cathode and emitter of the optocoupler are both grounded; the second port of the P-type switching tube is connected to the capacitor module, and the third port of the P-type switching tube is connected to the flash memory particle.
[0012] Furthermore, the switching module also includes a first resistor, a second resistor and a third resistor; one end of the first resistor is connected to the anode of the optocoupler, and the other end of the first resistor is grounded; one end of the second resistor is connected to the collector of the optocoupler, and the other end of the second resistor is respectively connected to one end of the third resistor and the first port of the P-type switching tube; the other end of the third resistor is respectively connected to the capacitor module and the second port of the P-type switching tube.
[0013] Furthermore, the switch module includes an N-type switch tube and a P-type switch tube; the first port of the N-type switch tube is connected to the control module, the second port of the N-type switch tube is connected to the capacitor module and the first port of the P-type switch tube respectively, and the third port of the N-type switch tube is grounded; the second port of the P-type switch tube is connected to the capacitor module, and the third port of the P-type switch tube is connected to the flash memory particle.
[0014] Furthermore, the switching module also includes a fourth resistor, a fifth resistor and a sixth resistor; one end of the fourth resistor is connected to the first port of the N-type switching tube, and the other end of the fourth resistor is grounded; one end of the fifth resistor is connected to the second port of the N-type switching tube, and the other end of the fifth resistor is respectively connected to one end of the sixth resistor and the first port of the P-type switching tube; the other end of the sixth resistor is respectively connected to the capacitor module and the second port of the P-type switching tube.
[0015] Furthermore, the switch module further includes a diode, an anode of the diode is connected to the third port of the P-type switch tube, and a cathode of the diode is connected to the flash memory particle.
[0016] Furthermore, the P-type switch tube is a PMOS tube or a PNP transistor.
[0017] Furthermore, the capacitor module includes a first capacitor and a second capacitor, the second port of the backup power module is respectively connected to one end of the first capacitor and one end of the second capacitor, one end of the second capacitor is also connected to the switch module, and the other end of the first capacitor and the other end of the second capacitor are both grounded.
[0018] Furthermore, the control module includes a connector, a main control chip and a single-chip microcomputer, the connector is connected to the main control chip, the main control chip is respectively connected to the backup power module and the single-chip microcomputer, and the single-chip microcomputer is connected to the switch module.
[0019] On the other hand, the present application also provides a solid state hard disk destruction system, which includes the solid state hard disk destruction circuit as described in any of the aforementioned embodiments.
[0020] Compared with the prior art, this application has the following beneficial effects:
[0021] The present application provides a solid-state hard drive destruction circuit and system, which generates a high-voltage backup power voltage by utilizing the inherent backup power module and capacitor module in the solid-state hard drive. When the flash memory particles in the solid-state hard drive need to be destroyed, the backup power voltage is injected into the flash memory particles through the enable control of the control module and the switch module, which plays a role of high-voltage shock and destroys the data. Compared with the existing technology, since the backup power module is an inherent design on many solid-state hard drives, it is different from the method of re-installing a boost module to achieve destruction. Under the premise of achieving the destruction of flash memory particles, the present application simplifies the circuit design and greatly reduces the cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for which protection is claimed, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0023] Figure 1 This is one of the structural diagrams of a solid-state hard disk destruction circuit provided in an embodiment of the present application;
[0024] Figure 2 This is a second structural diagram of a solid-state hard disk destruction circuit provided in an embodiment of the present application;
[0025] Figure 3 This is one of the structural diagrams of a switch module provided in an embodiment of the present application;
[0026] Figure 4 This is a second structural diagram of a switch module provided in an embodiment of the present application;
[0027] Figure 5 This is the third structural diagram of a solid-state hard disk destruction circuit provided in an embodiment of the present application.
[0028] Figure numerals: 10 - solid-state drive destruction circuit; 20 - flash memory particles; 110 - backup power module; 120 - capacitor module; 130 - control module; 131 - connector; 132 - main control chip; 133 - single-chip microcomputer; 140 - switch module; 150 - voltage conversion module. DETAILED DESCRIPTION
[0029] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work fall within the scope of protection of the present application.
[0030] In the description of this application, it should be noted that relational terms such as first and second are used solely to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. The term "connected" should be understood broadly, for example, it can mean fixed connection, detachable connection, or integral connection; it can be directly connected or indirectly connected through an intermediate medium.
[0031] The following describes some embodiments of the present application in detail with reference to the accompanying drawings. The following embodiments and features thereof may be combined with each other unless there is any conflict.
[0032] As mentioned in the background, to physically destroy a solid-state drive (SSD), the existing technology involves adding a boost power circuit to the SSD. This circuit uses a DC / DC module to boost the low voltage to a high voltage, and then, through control and enable, injects the high voltage into the flash memory, thereby destroying the data in the flash memory. However, this solution has a complex circuit structure and a cumbersome design. This makes layout difficult on smaller circuit boards and increases costs.
[0033] In order to solve the problems existing in the prior art, please refer to Figure 1An embodiment of the present application provides a solid-state drive destruction circuit 10 , which includes: a backup power module 110 , a capacitor module 120 , a control module 130 and a switch module 140 .
[0034] The first port of the backup power module 110 is connected to the flash memory cell 20, the second port of the backup power module 110 is connected to the capacitor module 120, and the third port of the backup power module 110 is connected to the control module 130. The switch module 140 is connected to the capacitor module 120, the control module 130, and the flash memory cell 20, respectively.
[0035] The control module 130 is configured to send a switching signal to the backup power module 110 upon receiving the destruction instruction. The backup power module 110 is configured to control its first port to be disconnected upon receiving the switching signal, so as to stop supplying power to the flash memory particles 20;
[0036] The control module 130 is further configured to send a high-level enable signal to the switch module 140 upon receiving the destroy instruction. The switch module 140 is configured to be turned on upon receiving the enable signal to inject the backup voltage V_STR stored in the capacitor module 120 into the flash memory particles 20 .
[0037] It should be noted that the backup power voltage V_STR stored in the capacitor module 120 is higher than the voltage when the backup power module 110 normally supplies power to the flash memory particles 20 . The backup power voltage V_STR is the surge voltage that destroys the flash memory particles 20 .
[0038] On the contrary, when the control module 130 does not receive the destruction instruction, the first port of the backup power module 110 is turned on, and the switch module 140 is turned off. At this time, the backup power module 110 normally supplies power to the flash memory particles 20 through the first port.
[0039] Based on the above design, the embodiment of the present application utilizes the backup power module 110 and capacitor module 120 inherent in the solid-state drive to generate a backup power voltage V_STR. When the flash memory particles 20 in the solid-state drive need to be destroyed, the backup power voltage V_STR is injected into the flash memory particles 20 through the enabling control of the control module 130 and the switch module 140, thereby achieving a high-voltage shock and destroying the data. Compared with the existing technology, because the backup power module 110 is an inherent design in many solid-state drives, this method is different from the method of installing a new boost module to achieve destruction, simplifying the circuit design and greatly reducing costs.
[0040] To better understand the working principle of the backup power module 110, please refer to Figure 2In the embodiment of the present application, the capacitor module 120 includes a first capacitor C1 and a second capacitor C2. The second port of the backup power module 110 is connected to one end of the first capacitor C1 and one end of the second capacitor C2, respectively. One end of the second capacitor C2 is also connected to the switch module 140. The other end of the first capacitor C1 and the other end of the second capacitor C2 are both grounded.
[0041] Furthermore, the SSD destruction circuit 10 further includes a voltage conversion module 150 , wherein an input end of the voltage conversion module 150 is connected to the first port of the backup power module 110 , and an output end of the voltage conversion module 150 is connected to the flash memory particle 20 .
[0042] During normal operation, the backup power module 110 converts the received input voltage VIN into an output voltage POUT and transmits it to the voltage conversion module 150 through the first port. The voltage conversion module 150 converts the output voltage POUT into a supply voltage VCCF to supply the core voltage of the flash memory chip 20. At the same time, the backup power module 110 also charges the first capacitor C1 and the second capacitor C2 through the second port. The first capacitor C1 and the second capacitor C2 are charged to a higher voltage V-STR for use as backup power.
[0043] As an optional implementation, the output voltage is 5V, the backup voltage V_STR is 28V, and the high backup voltage V_STR is stored in the first capacitor C1 and the second capacitor C2.
[0044] When the third port of the backup power module 110 receives a switching signal from the control module 130, the first port of the backup power module 110 is disconnected to stop supplying power to the flash memory device 20. At this point, the backup power voltage V_STR stored in the first capacitor C1 and the second capacitor C2 is directly fed into the flash memory device 20 under the action of the switch module 140, thereby physically destroying the flash memory device 20.
[0045] The following combination Figure 3 , the working principle of the switch module 140 is described in detail. As a feasible embodiment, the switch module 140 includes an optocoupler U1 and a P-type switch tube U2. The anode of the optocoupler U1 is connected to the control module 130, the collector of the optocoupler U1 is connected to the capacitor module 120 and the first port of the P-type switch tube U2, respectively, and the cathode and emitter of the optocoupler U1 are both grounded. The second port of the P-type switch tube U2 is connected to the capacitor module 120, and the third port of the P-type switch tube U2 is connected to the flash memory particle 20.
[0046] It should be noted that since the backup voltage V_STR is stored in the capacitor module 120, the connection between the collector of the optocoupler U1 and the capacitor module 120 is equivalent to the collector of the optocoupler U1 being connected to the backup voltage V_STR. Similarly, the connection between the second port of the P-type switch U2 and the capacitor module 120 is equivalent to the second port of the P-type switch U2 being connected to the backup voltage V_STR.
[0047] Furthermore, the switch module 140 also includes a first resistor R1, a second resistor R2, and a third resistor R3. One end of the first resistor R1 is connected to the anode of the optocoupler U1, and the other end of the first resistor R1 is grounded. One end of the second resistor R2 is connected to the collector of the optocoupler U1, and the other end of the second resistor R2 is connected to one end of the third resistor R3 and the first port of the P-type switch U2. The other end of the third resistor R3 is connected to the capacitor module 120 and the second port of the P-type switch U2.
[0048] When the control module 130 receives the destruction instruction, it sends a high-level enable signal to the anode of the optocoupler U1, turning on the optocoupler U1 and grounding the first port of the P-type switch U2. That is, the first port of the P-type switch U2 is at a low level, turning on the P-type switch U2. At this point, the third port of the P-type switch U2 outputs the backup power voltage V_STR, ensuring that the high-voltage backup power voltage V_STR can be supplied to the flash memory particles 20, thereby physically destroying the flash memory particles 20.
[0049] Similarly, when the control module 130 does not receive the destroy command, the anode of the optocoupler U1 is at a low level, the optocoupler U1 is turned off, and the first port of the P-type switch U2 is connected to the backup power voltage V_STR through the third resistor R3. That is, the first port of the P-type switch U2 is at a high level, the P-type switch U2 is turned off, and the backup power voltage V_STR cannot be output to the flash memory chip 20. At this time, the flash memory chip 20 only receives the supply voltage VCCF output by the backup power module 110 through the voltage conversion module 150 to operate normally.
[0050] As another possible implementation, see Figure 4 The switch module 140 includes an N-type switch transistor Q1 and a P-type switch transistor U2. The first port of the N-type switch transistor Q1 is connected to the control module 130, the second port of the N-type switch transistor Q1 is connected to the capacitor module 120 and the first port of the P-type switch transistor U2, respectively. The third port of the N-type switch transistor Q1 is grounded. The second port of the P-type switch transistor U2 is connected to the capacitor module 120, and the third port of the P-type switch transistor U2 is connected to the flash memory chip 20.
[0051] Optionally, the switch module 140 further includes a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. One end of the fourth resistor R4 is connected to the first port of the N-type switch transistor Q1, and the other end of the fourth resistor R4 is grounded. One end of the fifth resistor R5 is connected to the second port of the N-type switch transistor Q1, and the other end of the fifth resistor R5 is connected to one end of the sixth resistor R6 and the first port of the P-type switch transistor U2. The other end of the sixth resistor R6 is connected to the capacitor module 120 and the second port of the P-type switch transistor U2.
[0052] When control module 130 receives the destruction instruction, it sends a high-level enable signal to the first port of N-type switch Q1, turning on N-type switch Q1 and grounding the first port of P-type switch U2. That is, the first port of P-type switch U2 is at a low level, turning on P-type switch U2. At this point, the third port of P-type switch U2 outputs the backup voltage V_STR, ensuring that the high backup voltage V_STR can be supplied to the flash memory cell 20, achieving physical destruction of the flash memory cell 20.
[0053] In addition, in order to prevent the backup voltage V_STR from flowing back to the P-type switch U2, in the embodiment of the present application, Figure 3 and Figure 4 As shown, the switch module 140 further includes a diode D1 , wherein the anode of the diode D1 is connected to the third port of the P-type switch tube U2 , and the cathode of the diode D1 is connected to the flash memory particle 20 .
[0054] It should be noted that the embodiments of the present application do not limit the types of the P-type switch U2 and the N-type switch Q1. That is, the P-type switch U2 can be a PMOS transistor or a PNP transistor; the N-type switch Q1 can be an NMOS transistor or an NPN transistor.
[0055] For example, Figure 4 As shown, if the N-type switch tube Q1 is an NMOS tube and the P-type switch tube U2 is a PMOS tube, the first port, the second port, and the third port of the N-type switch tube Q1 are respectively the gate, the drain, and the source of the NMOS tube, and the first port, the second port, and the third port of the P-type switch tube U2 are respectively the gate, the drain, and the source of the PMOS tube.
[0056] Furthermore, the specific structure of the control module 130 is as follows: Figure 5 As shown, in the embodiment of the present application, the control module 130 includes a connector 131, a main control chip 132 and a single-chip microcomputer 133. Among them, the connector 131 is connected to the main control chip 132, the main control chip 132 is connected to the backup power module 110 and the single-chip microcomputer 133 respectively, and the single-chip microcomputer 133 is connected to the switch module 140.
[0057] Connector 131 is used to receive a destruction command sent by the host. Upon receiving the command, main control chip 132 recognizes it and forwards it to the next-level single-chip microcomputer 133. It then sends a switching signal to backup power module 110 to disconnect the first port of backup power module 110. Upon receiving the signal, single-chip microcomputer 133 sends a high-level enable signal to switch module 140, turning it on and allowing the backup power voltage V_STR in capacitor module 120 to be fed into flash memory cell 20, thereby physically destroying flash memory cell 20.
[0058] In addition, an embodiment of the present application further provides a solid state hard disk destruction system, which includes the solid state hard disk destruction circuit 10 as described in any of the aforementioned embodiments.
[0059] In summary, an embodiment of the present application provides a solid-state hard disk destruction circuit and system. The solid-state hard disk destruction circuit includes: a backup power module, a capacitor module, a control module and a switch module. Among them, the first port of the backup power module is connected to the flash memory particles, the second port of the backup power module is connected to the capacitor module, and the third port of the backup power module is connected to the control module. The switch module is connected to the capacitor module, the control module and the flash memory particles respectively. The control module is used to send a switching signal to the backup power module when receiving a destruction instruction. The backup power module is used to control its first port to be disconnected when receiving a switching signal to stop supplying power to the flash memory particles. The control module is also used to send an enable signal to the switch module when receiving a destruction instruction. The switch module is used to turn on when receiving the enable signal to inject the backup power voltage stored in the capacitor module into the flash memory particles.
[0060] The embodiments of the present application utilize the backup power module and capacitor module inherent in the solid-state drive to generate a backup power voltage. When the flash memory particles in the solid-state drive need to be destroyed, the backup power voltage is injected into the flash memory particles through the enabling control of the control module and the switch module, achieving a high-voltage shock and destroying the data. Compared with the existing technology, because the backup power module is an inherent design in many solid-state drives, this method does not require the installation of a new boost module to achieve destruction, simplifying the circuit design and greatly reducing costs.
[0061] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.
[0062] It will be apparent to those skilled in the art that the present application is not limited to the details of the exemplary embodiments described above and that the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the present application is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.
Claims
1. A solid state hard disk destruction circuit, characterized in that: The solid state drive destruction circuit includes: a backup power module, a capacitor module, a control module and a switch module; The first port of the backup power module is connected to the flash memory particle, the second port of the backup power module is connected to the capacitor module, and the third port of the backup power module is connected to the control module; the switch module is connected to the capacitor module, the control module and the flash memory particle respectively; The control module is configured to send a switching signal to the backup power module when receiving a destruction instruction, and the backup power module is configured to control its first port to be disconnected when receiving the switching signal, so as to stop supplying power to the flash memory particles; The control module is further configured to send a high-level enable signal to the switch module upon receiving a destroy instruction. The switch module is configured to be turned on upon receiving the enable signal to inject the backup power voltage stored in the capacitor module into the flash memory particles.
2. The solid state drive destruction circuit according to claim 1, characterized in that: The switch module includes an optocoupler and a P-type switch tube; the anode of the optocoupler is connected to the control module, the collector of the optocoupler is connected to the capacitor module and the first port of the P-type switch tube respectively, and the cathode and emitter of the optocoupler are both grounded; the second port of the P-type switch tube is connected to the capacitor module, and the third port of the P-type switch tube is connected to the flash memory particle.
3. The solid state drive destruction circuit according to claim 2, characterized in that: The switching module also includes a first resistor, a second resistor and a third resistor; one end of the first resistor is connected to the anode of the optocoupler, and the other end of the first resistor is grounded; one end of the second resistor is connected to the collector of the optocoupler, and the other end of the second resistor is respectively connected to one end of the third resistor and the first port of the P-type switching tube; the other end of the third resistor is respectively connected to the capacitor module and the second port of the P-type switching tube.
4. The solid state drive destruction circuit according to claim 1, characterized in that: The switch module includes an N-type switch tube and a P-type switch tube; the first port of the N-type switch tube is connected to the control module, the second port of the N-type switch tube is connected to the capacitor module and the first port of the P-type switch tube respectively, and the third port of the N-type switch tube is grounded; the second port of the P-type switch tube is connected to the capacitor module, and the third port of the P-type switch tube is connected to the flash memory particle.
5. The solid state drive destruction circuit according to claim 4, characterized in that: The switch module also includes a fourth resistor, a fifth resistor and a sixth resistor; one end of the fourth resistor is connected to the first port of the N-type switch tube, and the other end of the fourth resistor is grounded; one end of the fifth resistor is connected to the second port of the N-type switch tube, and the other end of the fifth resistor is respectively connected to one end of the sixth resistor and the first port of the P-type switch tube; the other end of the sixth resistor is respectively connected to the capacitor module and the second port of the P-type switch tube.
6. The solid state hard disk destruction circuit according to claim 2 or 4, characterized in that: The switch module further includes a diode, an anode of the diode is connected to the third port of the P-type switch tube, and a cathode of the diode is connected to the flash memory particle.
7. The solid state hard disk destruction circuit according to claim 2 or 4, characterized in that: The P-type switch tube is a PMOS tube or a PNP transistor.
8. The solid state drive destruction circuit according to claim 1, characterized in that: The capacitor module includes a first capacitor and a second capacitor. The second port of the backup power module is respectively connected to one end of the first capacitor and one end of the second capacitor. One end of the second capacitor is also connected to the switch module. The other end of the first capacitor and the other end of the second capacitor are both grounded.
9. The solid state drive destruction circuit according to claim 1, characterized in that: The control module includes a connector, a main control chip and a single-chip microcomputer. The connector is connected to the main control chip. The main control chip is respectively connected to the backup power module and the single-chip microcomputer. The single-chip microcomputer is connected to the switch module.
10. A solid state hard drive destruction system, characterized in that: The solid state drive destruction system includes the solid state drive destruction circuit according to any one of claims 1 to 9.