Three-phase UPS circuit

Abstract

The embodiment of the utility model discloses a three-phase UPS (Uninterrupted Power Supply) circuit, which comprises battery discharge circuits, a PFC (Power Factor Correction) circuit and a bus capacitor circuit, the PFC circuit comprises a BOOST circuit, the BOOST circuit comprises three phase circuits, the number of the battery discharge circuits is two, and the battery discharge circuits comprise two phase circuits of the BOOST circuit; and the other phase path of the BOOST circuit adopts a Vienna PFC (Power Factor Correction) structure. By implementing the circuit provided by the embodiment of the utility model, the problem of low efficiency of the three-phase UPS circuit in a main circuit mode caused by a mode of reducing the number of battery discharge circuits in the three-phase UPS circuit and reducing the cost of the three-phase UPS circuit in the prior art is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a three-phase UPS circuit. Background Art

[0002] A three-phase UPS (uninterruptible power supply) circuit is usually composed of three single-phase UPSs. It is an uninterruptible power supply with an energy storage device. It is mainly used to provide uninterruptible power to some equipment with high power stability requirements. To provide comprehensive backup power protection, each single-phase UPS in the three-phase UPS circuit is connected to a different phase line. Each single-phase UPS includes an input power supply, a battery system and an output load. When the main power supply is cut off or the voltage is abnormal, the three-phase UPS circuit will switch to the backup power supply to ensure continuous power supply while protecting the equipment from damage caused by unstable voltage and power interference.

[0003] At present, the mainstream topologies of rectifier and charging and discharging circuits of three-phase UPS are mainly as follows: Figure 1 As shown, it is composed of dual BOOST circuits, in which the battery discharge circuit and PFC (Power Factor Correction) circuit can share the BOOST circuit and switch the input power by controlling the thyristor. The battery discharge circuit in this three-phase UPS circuit adopts the form of three-phase staggered parallel connection; in addition, for some low-power applications, although the number of battery discharge circuits in the three-phase UPS circuit can be reduced, such as Figure 2 As shown, the cost of the three-phase UPS circuit can be reduced, but the efficiency of the three-phase UPS circuit is low in the main circuit mode.

[0004] Therefore, it is necessary to design a new circuit to solve the problem of low efficiency of the three-phase UPS circuit in the main circuit mode caused by reducing the number of battery discharge circuits in the three-phase UPS circuit to reduce the cost of the three-phase UPS circuit. Utility Model Content

[0005] The technical problem to be solved by the utility model is to provide a three-phase UPS circuit.

[0006] To solve the above technical problems, the purpose of the present utility model is achieved through the following technical solutions: providing a three-phase UPS circuit, comprising: a battery discharge circuit, a PFC circuit, and a bus capacitor circuit, wherein the PFC circuit includes a BOOST circuit, the BOOST circuit includes three phases, the number of the battery discharge circuit is two, and the battery discharge circuit includes two of the phases of the BOOST circuit; the other phase of the BOOST circuit adopts a Vienna PFC structure.

[0007] A further technical solution is as follows: the PFC circuit is provided with a first mains input terminal, a second mains input terminal, a third mains input terminal, a second positive interface, a second negative interface, a first interface, a first positive interface, and a first negative interface; the first mains input terminal, the second mains input terminal, and the third mains input terminal of the PFC circuit are respectively connected to the three phases of the mains; the second positive interface, the second negative interface, the first interface, the first positive interface, and the first negative interface of the PFC circuit are respectively connected to the BOOST circuit.

[0008] A further technical solution is as follows: the BOOST circuit includes a first inductor, a second inductor, a third inductor, a fourth inductor, a fifth inductor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a first diode, a second diode, a third diode, a fourth diode, a fifth diode and a sixth diode;

[0009] One end of the first inductor is connected to the first interface, and the other end of the first inductor is respectively connected to the anode of the first diode, the cathode of the second diode, and one end of the first switching tube; the other end of the first switching tube is connected to one end of the second switching tube; the other end of the second switching tube is respectively connected to one end of the third switching tube, one end of the fourth switching tube, one end of the fifth switching tube, and one end of the sixth switching tube, and the other end of the second switching tube is connected to the neutral point;

[0010] One end of the third switch tube is connected to one end of the second inductor and the anode of the third diode respectively; the other end of the second inductor is connected to the first positive interface of the PFC circuit and the battery discharge circuit;

[0011] One end of the fourth switch tube is connected to one end of the third inductor and the cathode of the fourth diode respectively; the other end of the third inductor is connected to the first negative interface of the PFC circuit and the battery discharge circuit respectively;

[0012] A first end of the fifth switch tube is connected to one end of the fourth inductor and the anode of the fifth diode respectively; the other end of the fourth inductor is connected to the second positive interface of the PFC circuit and the battery discharge circuit;

[0013] One end of the sixth switch is connected to one end of the fifth inductor and the cathode of the sixth diode respectively; the other end of the fifth inductor is connected to the second negative interface of the PFC circuit and the battery discharge circuit;

[0014] The cathode of the first diode, the cathode of the third diode, and the cathode of the fifth diode are respectively connected to the bus capacitor circuit;

[0015] The anode of the second diode, the anode of the fourth diode, and the sixth diode are respectively connected to the bus capacitor circuit;

[0016] The first inductor, the first switching tube, the second switching tube, the first diode and the second diode constitute the Vienna PFC structure.

[0017] A further technical solution is as follows: the PFC circuit further includes a first thyristor, a second thyristor, a third thyristor, a fourth thyristor and a switching relay;

[0018] The anode of the first thyristor is connected to the cathode of the second thyristor, and the connection point is the first mains input terminal of the PFC circuit; the cathode of the first thyristor is the second positive interface of the PFC circuit; the anode of the second thyristor is the second negative interface of the PFC circuit;

[0019] One end of the switching relay is the second mains input end of the PFC circuit, and the switching relay is the first interface of the PFC circuit;

[0020] The anode of the third thyristor is connected to the cathode of the fourth thyristor, and the connection point is the third mains input terminal of the PFC circuit; the cathode of the third thyristor is the first positive interface of the PFC circuit; and the anode of the fourth thyristor is the first negative interface of the PFC circuit.

[0021] A further technical solution is as follows: the battery discharge circuit further includes a fifth thyristor, a sixth thyristor, a seventh thyristor and an eighth thyristor;

[0022] The anode of the fifth thyristor and the anode of the seventh thyristor are respectively connected to the positive electrode of the battery; the cathode of the fifth thyristor is connected to the other end of the second inductor; and the cathode of the seventh thyristor is connected to the fourth inductor;

[0023] The anode of the sixth thyristor and the anode of the eighth thyristor are respectively connected to the negative electrode of the battery; the cathode of the sixth thyristor is connected to the third inductor; and the cathode of the eighth thyristor is connected to the fifth inductor.

[0024] Its further technical solution is: the bus capacitor circuit includes an upper bus capacitor and a lower bus capacitor, one end of the upper bus capacitor is connected to the neutral point; the other end of the upper bus capacitor is respectively connected to the cathode of the first diode, the cathode of the third diode, and the cathode of the fifth diode; one end of the lower bus capacitor is connected to the neutral point, and the other end of the lower bus capacitor is respectively connected to the anode of the second diode, the anode of the fourth diode, and the sixth diode.

[0025] A further technical solution is that the first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the fifth switch tube and the sixth switch tube are IGBT tubes or MOS tubes respectively.

[0026] Its further technical solution is: the first mains power input terminal is connected to the mains phase A; the second mains power input terminal is connected to the mains phase B; and the third mains power input terminal is connected to the mains phase C.

[0027] Its further technical solution is: the first mains power input terminal is connected to the mains phase A; the second mains power input terminal is connected to the mains phase C; and the third mains power input terminal is connected to the mains phase B.

[0028] Its further technical solution is: the first mains power input terminal is connected to the mains phase C; the second mains power input terminal is connected to the mains phase A; and the third mains power input terminal is connected to the mains phase B.

[0029] Compared with the prior art, the present invention has the following beneficial effects: the present invention sets a battery discharge circuit and a PFC circuit to share a BOOST circuit, and the BOOST circuit is connected in parallel with the bus capacitor circuit; the battery discharge circuit is designed to be two-way, and in the BOOST circuit, the phase where the battery discharge circuit is not set adopts a Vienna PFC structure; this not only reduces the cost of the three-phase UPS circuit, but also improves its efficiency in the main mode, solving the problem of low efficiency of the three-phase UPS circuit in the main mode caused by the existing method of reducing the number of battery discharge circuits in the three-phase UPS circuit to reduce the cost of the three-phase UPS circuit.

[0030] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 A circuit diagram of a three-phase UPS circuit in the prior art;

[0033] Figure 2 This is a circuit diagram of a three-phase UPS circuit in the prior art that reduces the number of battery discharge circuits;

[0034] Figure 3 Specific circuit diagram of the three-phase UPS circuit provided by the embodiment of the utility model Figure 1 ;

[0035] Figure 4 Specific circuit diagram 2 of the three-phase UPS circuit provided by the embodiment of the utility model;

[0036] Figure 5 Specific circuit diagram of the three-phase UPS circuit provided by the embodiment of the utility model Figure 3 ;

[0037] Figure 6 A schematic diagram of the first current flow direction of the positive half cycle of phase A when the three-phase UPS circuit provided by the embodiment of the present invention is in the main circuit mode;

[0038] Figure 7 A schematic diagram of the second current flow direction of the positive half cycle of phase A when the three-phase UPS circuit provided by an embodiment of the present invention is in main mode;

[0039] Figure 8 A schematic diagram of the first current flow direction of the B phase positive half cycle when the three-phase UPS circuit provided by the embodiment of the present utility model is in the main circuit mode;

[0040] Figure 9 A schematic diagram of the second current flow direction of the B phase positive half cycle when the three-phase UPS circuit provided by an embodiment of the present invention is in main mode;

[0041] Figure 10 A schematic diagram of the first current flow direction of the positive half cycle of the C phase when the three-phase UPS circuit provided by the embodiment of the present invention is in the main circuit mode;

[0042] Figure 11 A schematic diagram of the second current flow direction of the C phase positive half cycle when the three-phase UPS circuit provided by an embodiment of the present invention is in main mode;

[0043] Figure 12 A schematic diagram of the first current flow direction of the negative half cycle of phase A when the three-phase UPS circuit provided by the embodiment of the present invention is in main mode;

[0044] Figure 13 A schematic diagram of the second current flow direction of the negative half cycle of phase A when the three-phase UPS circuit provided by the embodiment of the present invention is in main mode;

[0045] Figure 14 A schematic diagram of the first current flow direction of the negative half cycle of phase B when the three-phase UPS circuit provided by the embodiment of the present invention is in main mode;

[0046] Figure 15 A schematic diagram of the second current flow direction of the negative half cycle of phase B when the three-phase UPS circuit provided by the embodiment of the present invention is in main mode;

[0047] Figure 16A schematic diagram of the first current flow direction of the negative half cycle of phase C when the three-phase UPS circuit provided by the embodiment of the present invention is in main mode;

[0048] Figure 17 A schematic diagram of the second current flow direction of the negative half cycle of phase C when the three-phase UPS circuit provided by an embodiment of the present invention is in main circuit mode;

[0049] Figure 18 A schematic diagram of a first current flow direction of the positive current of the A-phase battery when the three-phase UPS circuit provided by an embodiment of the present invention is in battery mode;

[0050] Figure 19 A schematic diagram of the second current flow direction of the positive current of the A-phase battery when the three-phase UPS circuit provided by the embodiment of the present invention is in battery mode;

[0051] Figure 20 A schematic diagram of a first current flow direction of the positive current of the C-phase battery when the three-phase UPS circuit provided by an embodiment of the present invention is in battery mode;

[0052] Figure 21 A schematic diagram of the second current flow direction of the positive current of the C-phase battery when the three-phase UPS circuit provided by the embodiment of the present invention is in battery mode;

[0053] Figure 22 A schematic diagram of a first current flow direction of the negative battery of phase A when the three-phase UPS circuit provided by an embodiment of the present invention is in battery mode;

[0054] Figure 23 A schematic diagram of a second current flow direction of the negative battery of phase A when the three-phase UPS circuit provided by the embodiment of the present invention is in battery mode;

[0055] Figure 24 A schematic diagram of a first current flow direction of the negative battery of phase C when the three-phase UPS circuit provided by an embodiment of the present invention is in battery mode;

[0056] Figure 25 This is a schematic diagram of the second current flow direction of the negative battery of phase C when the three-phase UPS circuit provided by an embodiment of the present invention is in battery mode. DETAILED DESCRIPTION

[0057] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0058] It will be understood that when used in this specification and the appended claims, the terms “comprises” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0059] It should also be understood that the terms used in this utility model specification are only for the purpose of describing specific embodiments and are not intended to limit the utility model. As used in this utility model specification and the appended claims, the singular forms "a", "an" and "the" are intended to include plural forms unless the context clearly indicates otherwise.

[0060] It should be further understood that the term “and / or” used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0061] The existing method of reducing the number of battery discharge circuits in a three-phase UPS circuit to reduce the cost of the three-phase UPS circuit has the problem that the three-phase UPS circuit has low efficiency in the main circuit mode.

[0062] To this end, an embodiment of the present invention provides a three-phase UPS circuit to solve the problem that the existing method of reducing the number of battery discharge circuits in the three-phase UPS circuit to reduce the cost of the three-phase UPS circuit leads to low efficiency of the three-phase UPS circuit in the main circuit mode.

[0063] Specifically, the battery discharge circuit and the PFC circuit share a boost circuit. The boost circuit is connected in parallel with the bus capacitor circuit. In this design, the battery discharge circuit has two paths, while the boost circuit has three phase paths. Two of these paths involve the battery discharge circuit, while the third phase, which is not involved in the battery discharge circuit, uses a Vienna PFC structure. In specific applications, the two paths of the battery discharge circuit can be any two phases of phase A, phase B, or phase C.

[0064] The details are as follows:

[0065] The first option is to configure the battery discharge circuit to include both phases A and C, while phase B of the boost circuit utilizes a Vienna PFC structure. In this scenario, the phase B battery discharge circuit is eliminated, and phase B of the boost circuit is configured as a Vienna PFC structure. In practical applications, the mains power can still be connected to the Vienna PFC structure of phase B of the boost circuit via a thyristor. To reduce costs, a switching relay RLY1 can also be used instead of a thyristor. The specific choice depends on the application environment and user requirements.

[0066] The second option is to use a battery discharge circuit that includes both phases A and B, while phase C of the boost circuit utilizes a Vienna PFC structure. In this case, the battery discharge circuit for phase C is reduced, and phase C of the boost circuit adopts a Vienna PFC structure. Mains power can also be connected to the Vienna PFC structure of phase C in the boost circuit via thyristors. Another cost-reduction option involves replacing the thyristors with a switching relay, RLY1. The specific choice depends on the application environment and user requirements.

[0067] The third option involves the battery discharge circuit comprising both phases B and C, while phase A of the boost circuit utilizes a Vienna PFC structure. In this scenario, the phase A battery discharge circuit is eliminated, and phase A of the boost circuit is configured as a Vienna PFC structure. The mains power can be connected to the Vienna PFC structure of phase A of the boost circuit via a thyristor. Another cost-reduction option involves switching relay RLY1 in place of the thyristor. The specific choice depends on the application environment and user requirements.

[0068] In general, the specific selection of which battery discharge circuits and phases using the Vienna PFC structure can be determined based on the application environment and user needs, as long as it is ensured that the reduced battery discharge circuit and the phase using the Vienna PFC structure belong to the same phase circuit.

[0069] In order to better understand the above technical solution, the above technical solution will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0070] See also Figures 3 to 5 A three-phase UPS circuit includes: a battery discharge circuit, a PFC circuit and a bus capacitor circuit, wherein the PFC circuit includes a BOOST circuit, the BOOST circuit includes three phases, the battery discharge circuit has two phases, and the battery discharge circuit includes two of the phases of the BOOST circuit; the other phase of the BOOST circuit adopts a Vienna PFC structure.

[0071] By reducing the number of battery discharge circuits to two and adopting the Vienna PFC structure for the phase corresponding to the BOOST circuit that does not have a battery discharge circuit, it can not only reduce the cost of the three-phase UPS circuit, but also improve the efficiency of the three-phase UPS circuit in the main mode. This solves the problem that the existing method of reducing the number of battery discharge circuits in the three-phase UPS circuit to reduce the cost of the three-phase UPS circuit leads to low efficiency of the three-phase UPS circuit in the main mode.

[0072] See also Figures 3 to 5The PFC circuit is provided with a first mains input terminal, a second mains input terminal, a third mains input terminal, a second positive interface, a second negative interface, a first interface, a first positive interface, and a first negative interface; the first mains input terminal, the second mains input terminal, and the third mains input terminal of the PFC circuit are respectively connected to the three phases of the mains; the second positive interface, the second negative interface, the first interface, the first positive interface, and the first negative interface of the PFC circuit are respectively connected to the BOOST circuit.

[0073] In one embodiment, the BOOST circuit includes a first inductor L5, a second inductor L2, a third inductor L3, a fourth inductor L1, a fifth inductor L4, a first switch transistor Q9, a second switch transistor Q10, a third switch transistor Q11, a fourth switch transistor Q12, a fifth switch transistor Q13, a sixth switch transistor Q14, a first diode D3, a second diode D4, a third diode D2, a fourth diode D5, a fifth diode D1, and a sixth diode D6.

[0074] One end of the first inductor L5 is connected to the first interface, and the other end of the first inductor L5 is respectively connected to the anode of the first diode D3, the cathode of the second diode D4, and one end of the first switch tube Q9; the other end of the first switch tube Q9 is connected to one end of the second switch tube Q10; the other end of the second switch tube Q10 is respectively connected to one end of the third switch tube Q11, one end of the fourth switch tube Q12, one end of the fifth switch tube Q13, and one end of the sixth switch tube Q14; and the other end of the second switch tube Q10 is connected to the neutral point.

[0075] One end of the third switch tube Q11 is connected to one end of the second inductor L2 and the anode of the third diode D2 respectively; the other end of the second inductor L2 is connected to the first positive port of the PFC circuit and the battery discharge circuit;

[0076] One end of the fourth switch tube Q12 is connected to one end of the third inductor L3 and the cathode of the fourth diode D5 respectively; the other end of the third inductor L3 is connected to the first negative port of the PFC circuit and the battery discharge circuit respectively;

[0077] A first end of the fifth switch tube Q13 is connected to one end of the fourth inductor L1 and the anode of the fifth diode D1 respectively; the other end of the fourth inductor L1 is connected to the second positive port of the PFC circuit and the battery discharge circuit;

[0078] One end of the sixth switch tube Q14 is connected to one end of the fifth inductor L4 and the cathode of the sixth diode D6 respectively; the other end of the fifth inductor L4 is connected to the second negative port of the PFC circuit and the battery discharge circuit;

[0079] The cathode of the first diode D3, the cathode of the third diode D2, and the cathode of the fifth diode D1 are respectively connected to the bus capacitor circuit;

[0080] The anode of the second diode D4, the anode of the fourth diode D5, and the sixth diode D6 are respectively connected to the bus capacitor circuit;

[0081] The first inductor L5, the first switch Q9, the second switch Q10, the first diode D3 and the second diode D4 form a Vienna PFC structure, which belongs to one phase of the BOOST circuit. The other components form the other two phases of the BOOST circuit.

[0082] In this embodiment, one end of the first inductor L5 serves as the first end of the BOOST circuit; the second end of the first switch tube Q9 is connected to the second end of the second switch tube Q10; the first end of the second switch tube Q10 is respectively connected to the second end of the third switch tube Q11, the first end of the fourth switch tube Q12, the second end of the fifth switch tube Q13, and the first end of the sixth switch tube Q14, with the connection points serving as the second end of the BOOST circuit and connected to the neutral point of the bus capacitor circuit; the first end of the third switch tube Q11 is respectively connected to one end of the second inductor L2 and the anode of the third diode D2; the other end of the second inductor L2 serves as the third port of the BOOST circuit and is connected to the first positive terminal of the PFC circuit and the first positive terminal of the battery discharge circuit; the second end of the fourth switch tube Q12 is respectively connected to one end of the third inductor L3 and the cathode of the fourth diode D5; the other end of the third inductor L3 serves as the fourth port of the BOOST circuit and is connected to the first negative terminal of the PFC circuit and the negative terminal of the battery discharge circuit. The first negative interface; the first end of the fifth switching tube Q13 is respectively connected to one end of the fourth inductor L1 and the anode of the fifth diode D1; the other end of the fourth inductor L1 serves as the fifth interface of the BOOST circuit and is connected to the second positive interface of the PFC circuit and the second positive interface of the battery discharge circuit; the second end of the sixth switching tube Q14 is respectively connected to one end of the fifth inductor L4 and the cathode of the sixth diode D6; the other end of the fifth inductor L4 serves as the sixth interface of the BOOST circuit and is connected to the second negative interface of the PFC circuit and the second negative interface of the battery discharge circuit; the cathode of the first diode D3 is respectively connected to the cathode of the third diode D2 and the cathode of the fifth diode D1, and the connection point serves as the seventh interface of the BOOST circuit and is connected to the bus positive electrode of the bus capacitor circuit; the anode of the second diode D4D4 is respectively connected to the anode of the fourth diode D5D5 and the anode of the sixth diode D6D6, and the connection point serves as the eighth interface of the BOOST circuit and is connected to the bus negative electrode of the bus capacitor circuit.

[0083] In one embodiment, the first switch Q9 , the second switch Q10 , the third switch Q11 , the fourth switch Q12 , the fifth switch Q13 and the sixth switch Q14 are IGBTs (Insulated Gate Bipolar Transistors) or MOS transistors.

[0084] The first end of the switch represents the end without an arrow in the diagram, and the second end of the switch represents the end with an arrow in the diagram. If the switch is an IGBT, the first end of the switch represents the collector, and the second end of the switch represents the emitter. If the switch is a MOS transistor, the first end of the switch represents the drain, and the second end of the switch represents the source.

[0085] Regarding the Vienna PFC structure consisting of the first inductor L5, the first switch Q9, the second switch Q10, the first diode D3, and the second diode D4, the first switch Q9 and the second switch Q10 can share a switch drive circuit. When the three-phase UPS circuit is in main line mode, assuming the phase path where the first switch Q9, the second switch Q10, the first diode D3, and the second diode D4 are located is conducting and storing energy, the current flows as follows: first inductor L5L5, first switch Q9Q9, and second switch Q10Q10; assuming the phase path where the first switch Q9Q9, the second switch Q10Q10, the first diode D3D3, and the second diode D4D4 are located is disconnected and releasing energy, the current flows as follows: first inductor L5L5, first diode D3D3, or first inductor L5L5, second diode D4D4.

[0086] In one embodiment, see Figures 3 to 5 , the above-mentioned PFC circuit further includes a first thyristor Q1, a second thyristor Q2, a third thyristor Q3, a fourth thyristor Q4 and a switching relay RLY1;

[0087] The anode of the first thyristor Q1 is connected to the cathode of the second thyristor Q2, and the connection point is the first mains input terminal of the PFC circuit; the cathode of the first thyristor Q1 is the second positive interface of the PFC circuit; the anode of the second thyristor Q2 is the second negative interface of the PFC circuit;

[0088] One end of the switching relay RLY1 is the second mains input end of the PFC circuit, and the switching relay RLY1 is the first interface of the PFC circuit;

[0089] The anode of the third thyristor Q3 is connected to the cathode of the fourth thyristor Q4, and the connection point is the third mains input terminal of the PFC circuit; the cathode of the third thyristor Q3 is the first positive interface of the PFC circuit; the anode of the fourth thyristor Q4 is the first negative interface of the PFC circuit.

[0090] In this embodiment, one end of switching relay RLY1 serves as the first interface of the PFC circuit. This ensures that the AC input of the three-phase UPS circuit and the Vienna PFC structure of the BOOST circuit are connected via switching relay RLY1. Compared to the method of using two thyristors to achieve connection with the Vienna PFC structure of the BOOST circuit in the three-phase UPS circuit, the hardware circuit can reduce the number of drive circuits for the two thyristors, further reducing the heat sink required for the drive circuit. Furthermore, by avoiding the method of using two thyristors to achieve connection with the Vienna PFC structure of the BOOST circuit in the three-phase UPS circuit, the conduction loss of the three-phase UPS circuit can be reduced, thereby improving the efficiency of the three-phase UPS circuit.

[0091] In addition, it should be noted that before the mains is turned on, since the busbar of the three-phase UPS circuit is without electricity, if the three-phase UPS circuit is directly connected to the mains, the energy of the mains will directly charge the busbar, generating a large inrush current, thereby damaging the components of the three-phase UPS circuit; therefore, the first thyristor Q1, the second thyristor Q2, the third thyristor Q3, the fourth thyristor Q4 and the switching relay RLY1 are required to have a soft start function. During the mains power-on process, the busbar capacitor circuit is first charged through soft start. After the busbar capacitor circuit is fully charged, the first thyristor Q1, the second thyristor Q2, the third thyristor Q3, the fourth thyristor Q4 and the switching relay RLY1 are closed to work.

[0092] In addition, the first thyristor Q1, the second thyristor Q2, the third thyristor Q3, the fourth thyristor Q4 and the switching relay RLY1 also have the function of isolating the power grid; the first thyristor Q1, the second thyristor Q2, the third thyristor Q3, the fourth thyristor Q4 and the switching relay RLY1 are only turned on and closed when the three-phase UPS circuit is in the main mode, and the power grid discharges to the bus; when the three-phase UPS circuit is in the battery power supply mode, the first thyristor Q1, the second thyristor Q2, the third thyristor Q3, the fourth thyristor Q4 and the switching relay RLY1 form electrical isolation to prevent current backflow when the three-phase UPS circuit is in the main mode.

[0093] In one embodiment, the first mains input terminal of the PFC circuit, the second mains input terminal of the PFC circuit, and the third mains input terminal of the PFC circuit can be respectively connected to phase A, phase B, and phase C of the three-phase mains. The specific connection method can be determined according to the application environment and user needs, and is within the scope of protection of this application.

[0094] Specifically, if Figure 3 As shown, the first mains input terminal is connected to phase A of the mains; the second mains input terminal is connected to phase B of the mains, and the third mains input terminal is connected to phase C of the mains.

[0095] Specifically, if Figure 4 As shown, the first mains input terminal is connected to phase A of the mains; the second mains input terminal is connected to phase C of the mains; and the third mains input terminal is connected to phase B of the mains.

[0096] Specifically, if Figure 5 As shown, the first mains input terminal is connected to the mains phase C; the second mains input terminal is connected to the mains phase A; and the third mains input terminal is connected to the mains phase B.

[0097] Figures 3 to 5 GridA represents phase A of the three-phase mains, GridB represents phase B of the three-phase mains, and GridC represents phase C of the three-phase mains.

[0098] In one embodiment, see Figure 3 and Figure 5 , the battery discharge circuit further includes a fifth thyristor Q5, a sixth thyristor Q6, a seventh thyristor Q7 and an eighth thyristor Q8;

[0099] The anode of the fifth thyristor Q5 and the anode of the seventh thyristor Q7 are connected to the positive electrode of the battery respectively; the cathode of the fifth thyristor Q5 is connected to the other end of the second inductor L2; the cathode of the seventh thyristor Q7 is connected to the fourth inductor L1;

[0100] The anode of the sixth thyristor Q6 and the anode of the eighth thyristor Q8 are connected to the negative electrode of the battery respectively; the cathode of the sixth thyristor Q6 is connected to the third inductor L3; and the cathode of the eighth thyristor Q8 is connected to the fifth inductor L4.

[0101] Specifically, the anode of the fifth thyristor Q5 is connected to the anode of the seventh thyristor Q7, and the connection point is connected to the positive electrode of the battery; the cathode of the fifth thyristor Q5 serves as the second positive interface of the battery discharge circuit; the cathode of the seventh thyristor Q7 serves as the first positive interface of the battery discharge circuit;

[0102] The anode of the sixth thyristor Q6 is connected to the anode of the eighth thyristor Q8, and the connection point is connected to the negative electrode of the battery; the cathode of the sixth thyristor Q6 serves as the second negative interface of the battery discharge circuit; the cathode of the eighth thyristor Q8 serves as the first negative interface of the battery discharge circuit.

[0103] The battery discharge circuit and the PFC circuit are connected to the common BOOST circuit in the above manner, which can ensure that the specifically reduced phase in the battery discharge circuit and the Vienna PFC structure specifically adopted by the battery discharge circuit and the BOOST circuit are the same phase.

[0104] In one embodiment, see Figures 3 to 5The bus capacitor circuit includes an upper bus capacitor and a lower bus capacitor. One end of the upper bus capacitor is connected to the neutral point; the other end of the upper bus capacitor is respectively connected to the cathode of the first diode D3, the cathode of the third diode D2, and the cathode of the fifth diode D1; one end of the lower bus capacitor is connected to the neutral point, and the other end of the lower bus capacitor is respectively connected to the anode of the second diode D4, the anode of the fourth diode D5, and the sixth diode D6.

[0105] Specifically, one end of the upper bus capacitor serves as the bus positive pole of the bus capacitor circuit; the other end of the upper bus capacitor is connected to one end of the lower bus capacitor, and the connection point serves as the neutral point of the bus capacitor circuit, which is the neutral point mentioned above; the other end of the lower bus capacitor C2 serves as the bus negative pole of the bus capacitor circuit.

[0106] The working principle of the three-phase UPS circuit mentioned in the embodiment of the present utility model is described as follows:

[0107] Only the battery discharge circuit in the three-phase UPS circuit includes: Phase A battery discharge circuit and Phase C battery discharge circuit. Phase B in the BOOST circuit adopts the Vienna PFC structure, that is, Figure 3 Take this as an example to illustrate.

[0108] A three-phase UPS circuit has two operating modes: mains mode (PFC function) and battery mode (battery discharge function). The following describes the circuit behavior in these two modes in detail.

[0109] Main mode (PFC function)

[0110] Phase A positive half cycle:

[0111] Energy storage stage: the first thyristor Q1 is turned on, the fifth switch tube Q13 is turned on, and the fourth inductor L1 stores energy in this stage. The current flows from phase A, through the first thyristor Q1, the fourth inductor L1, the fifth switch tube Q13, and the neutral point in sequence. Figure 6 shown.

[0112] Energy release stage: the first thyristor Q1Q1 is turned on, the fifth switch tube Q13Q13 is turned off, and the fourth inductor L1L1 releases energy. The current flows from phase A and passes through the first thyristor Q1, the fourth inductor L1, the fifth diode D1, the upper bus capacitor, and the neutral point in sequence. Figure 7 shown.

[0113] Phase B positive half cycle:

[0114] Energy storage stage: The switching relay RLY1 is turned on, the first switch tube Q9 is turned on, and the second switch tube Q10 is turned on. The first inductor L5 stores energy in this stage. The current flows from phase B, through the inductor, the first switch tube Q9, the second switch tube Q10, and the neutral point in sequence. Figure 8 shown.

[0115] Energy release stage: the switching relay RLY1 is turned on, the first switch tube Q9 is turned off, the second switch tube Q10 is turned off, the first inductor L5 releases energy, and the current flows from phase B, through the inductor, the first diode D3, the upper bus capacitor, and the neutral point in sequence. Figure 9 shown.

[0116] C phase positive half cycle:

[0117] Energy storage stage: The third thyristor Q3 is turned on, the third switch tube Q11 is turned on, and the second inductor L2 stores energy in this stage. The current flows from phase C, through the third thyristor Q3, the second inductor L2, the third switch tube Q11, and the neutral point in sequence. Figure 10 shown.

[0118] Energy release stage: the third thyristor Q3 is turned on, the third switch tube Q11 is turned off, the second inductor L2 releases energy, and the current flows from phase C, through the third thyristor Q3, the second inductor L2, the third diode D2, the upper bus capacitor, and the neutral point in sequence. Figure 11 shown.

[0119] Phase A negative half cycle:

[0120] Energy storage stage: the second thyristor Q2 is turned on, the sixth switch Q14 is turned on, and the fifth inductor L4 stores energy in this stage. The current flows from the neutral point, through the sixth switch Q14, the fifth inductor L4, the second thyristor Q2, and the A phase in sequence; Figure 12 shown.

[0121] Energy release stage: the second thyristor Q2 is turned on, the sixth switch tube Q14 is turned off, and the fifth inductor L4 releases energy. The current flows from the neutral point, through the lower bus capacitor, the sixth diode D6, the fifth inductor L4, the second thyristor Q2, and the A phase in sequence; Figure 13 shown.

[0122] Phase B negative half cycle:

[0123] Energy storage stage: the switching relay RLY1 is turned on, the first switch tube Q9 is turned on, the second switch tube Q10 is turned on, and the first inductor L5 stores energy in this stage. The current flows from the neutral point and passes through the second switch tube Q10, the first switch tube Q9, the first inductor L5, the switching relay RLY1, and the B phase in sequence; Figure 14shown.

[0124] Energy release stage: the switching relay RLY1 is turned on, the first switch tube Q9 is turned off, the second switch tube Q10 is turned off, the first inductor L5 releases energy, and the current flows from the neutral point, through the lower bus capacitor, the second diode D4, the first inductor L5, the switching relay RLY1, and the B phase. Figure 15 shown.

[0125] C phase negative half cycle:

[0126] Energy storage stage: the fourth thyristor Q4 is turned on, the fourth switch tube Q12 is turned on, and the third inductor L3 stores energy in this stage. The current flows from the neutral point and passes through the fourth switch tube Q12, the third inductor L3, the fourth thyristor Q4, and the C phase in sequence; Figure 16 shown.

[0127] Energy release stage: the fourth thyristor Q4Q4 is turned on, the fourth switch tube Q12Q12 is turned off, the third inductor L3L3 releases energy, and the current flows from the neutral point, through the lower bus capacitor, the third inductor L3, the fourth thyristor Q4, and the C phase in sequence; Figure 17 shown.

[0128] Battery mode (battery discharge function)

[0129] Phase A battery positive:

[0130] Energy storage stage: The seventh thyristor Q7 is turned on, the fifth switch tube Q13 is turned on, and the fourth inductor L1 stores energy in this stage. The current flows from the positive electrode of the battery, through the seventh thyristor Q7, the fourth inductor L1, the fifth switch tube Q13, and the neutral point in sequence; Figure 18 shown.

[0131] Energy release stage: the seventh thyristor Q7 is turned on, the fifth switch tube Q13 is turned off, the fourth inductor L1 releases energy, and the current flows from the positive electrode of the battery, through the seventh thyristor Q7, the fourth inductor L1, the fifth diode D1, the upper bus capacitor, and the neutral point in sequence; Figure 19 shown.

[0132] Phase C battery positive:

[0133] Energy storage stage: The fifth thyristor Q5 is turned on, the third switch tube Q11 is turned on, and the second inductor L2 stores energy in this stage. The current flows from the positive electrode of the battery, through the fifth thyristor Q5, the second inductor L2, the third switch tube Q11, and the neutral point in sequence; Figure 20 shown.

[0134] Energy release stage: the fifth thyristor Q5 is turned on, the third switch tube Q11 is turned off, the second inductor L2 releases energy, and the current flows from the positive electrode of the battery, through the fifth thyristor Q5, the second inductor L2, the fifth diode D1, the upper bus capacitor, and the neutral point in sequence; Figure 21 shown.

[0135] Phase A battery negative:

[0136] Energy storage stage: the eighth thyristor Q8 is turned on, the sixth switch tube Q14 is turned on, and the fifth inductor L4 stores energy in this stage. The current flows from the neutral point, through the sixth switch tube Q14, the fifth inductor L4, the eighth thyristor Q8, and the negative electrode of the battery in sequence; Figure 22 shown.

[0137] Energy release stage: the eighth thyristor Q8 is turned on, the sixth switch tube Q14 is turned off, the fifth inductor L4 releases energy, and the current flows from the neutral point, through the lower bus capacitor, the sixth diode D6, the fifth inductor L4, the eighth thyristor Q8, and the negative electrode of the battery in sequence; Figure 23 shown.

[0138] Phase C battery negative:

[0139] Energy storage stage: the sixth thyristor Q6 is turned on, the fourth switch tube Q12 is turned on, and the third inductor L3 stores energy in this stage. The current flows from the neutral point, through the fourth switch tube Q12, the third inductor L3, the sixth thyristor Q6, and the negative electrode of the battery in sequence; Figure 24 shown.

[0140] Energy release stage: the sixth thyristor Q6 is turned on, the fourth switch tube Q12 is turned off, the third inductor L3 releases energy, and the current flows from the neutral point, through the lower bus capacitor, the fourth diode D5, the third inductor L3, the sixth thyristor Q6, and the negative electrode of the battery in sequence; Figure 25 shown.

[0141] Phase B circuit: In battery mode, the phase B circuit does not work.

[0142] In addition, the operating principles of the three-phase UPS circuit in different modes in the other two cases (the battery discharge circuit includes the A-phase and B-phase battery discharge circuits, and the battery discharge circuit includes the B-phase and C-phase battery discharge circuits) are the same as above and will not be repeated here.

[0143] The above-mentioned three-phase UPS circuit is configured to share a BOOST circuit by setting a battery discharge circuit and a PFC circuit, and the BOOST circuit is connected in parallel with the bus capacitor circuit; the battery discharge circuit is designed to be two-way, and in the BOOST circuit, the phase without a battery discharge circuit adopts a Vienna PFC structure; this not only reduces the cost of the three-phase UPS circuit, but also improves its efficiency in the main mode, solving the problem of low efficiency of the three-phase UPS circuit in the main mode caused by the existing method of reducing the number of battery discharge circuits in the three-phase UPS circuit to reduce the cost of the three-phase UPS circuit.

[0144] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and such modifications or substitutions are intended to be within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A three-phase UPS circuit, characterized in that: include: A battery discharge circuit, a PFC circuit, and a bus capacitor circuit, wherein the PFC circuit includes a BOOST circuit, the BOOST circuit includes three phases, the battery discharge circuit has two phases, and the battery discharge circuit includes two phases of the BOOST circuit; the other phase of the BOOST circuit adopts a Vienna PFC structure.

2. A three-phase UPS circuit according to claim 1, characterized in that: The PFC circuit is provided with a first mains input terminal, a second mains input terminal, a third mains input terminal, a second positive interface, a second negative interface, a first interface, a first positive interface, and a first negative interface; the first mains input terminal, the second mains input terminal, and the third mains input terminal of the PFC circuit are respectively connected to the three phases of the mains; the second positive interface, the second negative interface, the first interface, the first positive interface, and the first negative interface of the PFC circuit are respectively connected to the BOOST circuit.

3. A three-phase UPS circuit according to claim 2, characterized in that: The BOOST circuit includes a first inductor, a second inductor, a third inductor, a fourth inductor, a fifth inductor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a first diode, a second diode, a third diode, a fourth diode, a fifth diode and a sixth diode; One end of the first inductor is connected to the first interface, and the other end of the first inductor is respectively connected to the anode of the first diode, the cathode of the second diode, and one end of the first switching tube; the other end of the first switching tube is connected to one end of the second switching tube; the other end of the second switching tube is respectively connected to one end of the third switching tube, one end of the fourth switching tube, one end of the fifth switching tube, and one end of the sixth switching tube, and the other end of the second switching tube is connected to the neutral point; One end of the third switch tube is connected to one end of the second inductor and the anode of the third diode respectively; the other end of the second inductor is connected to the first positive interface of the PFC circuit and the battery discharge circuit; One end of the fourth switch tube is connected to one end of the third inductor and the cathode of the fourth diode respectively; the other end of the third inductor is connected to the first negative interface of the PFC circuit and the battery discharge circuit respectively; A first end of the fifth switch tube is connected to one end of the fourth inductor and the anode of the fifth diode respectively; the other end of the fourth inductor is connected to the second positive interface of the PFC circuit and the battery discharge circuit; One end of the sixth switch is connected to one end of the fifth inductor and the cathode of the sixth diode respectively; the other end of the fifth inductor is connected to the second negative interface of the PFC circuit and the battery discharge circuit; The cathode of the first diode, the cathode of the third diode, and the cathode of the fifth diode are respectively connected to the bus capacitor circuit; The anode of the second diode, the anode of the fourth diode, and the sixth diode are respectively connected to the bus capacitor circuit; The first inductor, the first switching tube, the second switching tube, the first diode and the second diode constitute the Vienna PFC structure.

4. A three-phase UPS circuit according to claim 3, characterized in that: The PFC circuit further includes a first thyristor, a second thyristor, a third thyristor, a fourth thyristor and a switching relay; The anode of the first thyristor is connected to the cathode of the second thyristor, and the connection point is the first mains input terminal of the PFC circuit; the cathode of the first thyristor is the second positive interface of the PFC circuit; the anode of the second thyristor is the second negative interface of the PFC circuit; One end of the switching relay is the second mains input end of the PFC circuit, and the switching relay is the first interface of the PFC circuit; The anode of the third thyristor is connected to the cathode of the fourth thyristor, and the connection point is the third mains input terminal of the PFC circuit; the cathode of the third thyristor is the first positive interface of the PFC circuit; and the anode of the fourth thyristor is the first negative interface of the PFC circuit.

5. A three-phase UPS circuit according to claim 3, characterized in that: The battery discharge circuit further includes a fifth thyristor, a sixth thyristor, a seventh thyristor and an eighth thyristor; The anode of the fifth thyristor and the anode of the seventh thyristor are respectively connected to the positive electrode of the battery; the cathode of the fifth thyristor is connected to the other end of the second inductor; and the cathode of the seventh thyristor is connected to the fourth inductor; The anode of the sixth thyristor and the anode of the eighth thyristor are respectively connected to the negative electrode of the battery; the cathode of the sixth thyristor is connected to the third inductor; and the cathode of the eighth thyristor is connected to the fifth inductor.

6. A three-phase UPS circuit according to claim 3, characterized in that: The bus capacitor circuit includes an upper bus capacitor and a lower bus capacitor, one end of the upper bus capacitor is connected to the neutral point; the other end of the upper bus capacitor is respectively connected to the cathode of the first diode, the cathode of the third diode, and the cathode of the fifth diode; one end of the lower bus capacitor is connected to the neutral point, and the other end of the lower bus capacitor is respectively connected to the anode of the second diode, the anode of the fourth diode, and the sixth diode.

7. A three-phase UPS circuit according to claim 3, characterized in that: The first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the fifth switch tube and the sixth switch tube are IGBT tubes or MOS tubes respectively.

8. A three-phase UPS circuit according to claim 2, characterized in that: The first mains power input terminal is connected to phase A of the mains power; the second mains power input terminal is connected to phase B of the mains power; and the third mains power input terminal is connected to phase C of the mains power.

9. A three-phase UPS circuit according to claim 2, characterized in that: The first mains power input terminal is connected to phase A of the mains power; the second mains power input terminal is connected to phase C of the mains power; and the third mains power input terminal is connected to phase B of the mains power.

10. A three-phase UPS circuit according to claim 2, characterized in that: The first mains power input terminal is connected to phase C of the mains power; the second mains power input terminal is connected to phase A of the mains power; and the third mains power input terminal is connected to phase B of the mains power.

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