Film layer structure for improving UV attenuation of TOPCon battery

Abstract

The utility model relates to the technical field of battery preparation, in particular to a film layer structure for improving UV attenuation of a TOPCon battery, which comprises a silicon substrate, electrodes are symmetrically arranged at two ends of the silicon substrate, and a laminated film layer and a first silicon nitride layer are sequentially arranged at the bottom of the silicon substrate. According to the utility model, through a lamination technology, an oxide layer is added between doped poly layers of the TOPCon solar cell to serve as a barrier layer, a laminated film layer structure is formed, the electrical performance of the TOPCon solar cell is effectively improved, and when front aluminum oxide is deposited and an aluminum oxide film layer and a silicon oxynitride film layer are laminated on the front surface of a cell silicon wafer, the cell is allowed to stand for 4 hours after RCA, so that the performance of the TOPCon solar cell is improved. According to the invention, uniform oxide layers are grown on the front and back surfaces, and then an aluminum oxide film layer (ALD85s + CVD230s) + 30s silicon oxynitride film layer + silicon nitride film layer is overlaid, so that the damage of ultraviolet rays to the TOPCon battery piece can be reduced, and the loss of UV30 to the electrical property of the battery piece is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of battery preparation, in particular to a film layer structure for improving UV attenuation of a TOPCon battery. Background Art

[0002] At a time when photovoltaic power generation technology is advancing by leaps and bounds, the high-efficiency and high-stability TOPCon solar cells are attracting much attention. Ultraviolet aging degradation (UV degradation) refers to the phenomenon that the performance of solar cell modules gradually deteriorates under long-term exposure to ultraviolet rays. The impact of UV degradation on photovoltaic cells is mainly reflected in the following aspects: UV degradation will cause some high-energy light energy to be unable to be utilized by photovoltaic cells, thereby reducing their power generation efficiency; light in the UV band has high energy, which will cause physical and chemical reactions inside photovoltaic cells. The photothermal effect will generate excessive heat, causing the battery temperature to rise, thereby causing aging and damage to the battery materials; light in the UV band will also cause oxidation reactions in battery materials, leading to corrosion and damage to the battery.

[0003] For example, patent application CN118588773A discloses a cell structure and a preparation method thereof for improving the UV attenuation resistance of a cell; the structure comprises a single-crystal silicon wafer, a tunneling oxide layer, a first doping layer and a first anti-reflection layer being sequentially provided at the bottom of the single-crystal silicon wafer, and a second doping layer, a silicon dioxide passivation layer, an aluminum oxide field passivation layer and a first anti-reflection layer being sequentially provided at the top of the single-crystal silicon wafer.

[0004] Currently, the main preparation methods for TOPCon cells in the industry are low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD) and sputtering. As for how to reduce the UV attenuation of TOPCon cells, research is still in its preliminary stage. The existing TOPCon cell membrane structure is usually as follows: after the cell passes through RCA, it directly enters the MAD machine to grow aluminum oxide (ALD85s+CVD275s) and silicon nitride film. However, this membrane structure has low resistance to UV damage. Ultraviolet light can destroy the Si-H bond in the film, significantly reduce the hydrogen content in the intrinsic and doped a-Si:H films, change the fixed charge density of the film, and increase the interface state density, thereby destroying the passivation film layer (silicon nitride / silicon oxide / silicon oxynitride) on the surface of the crystalline silicon cell, weakening the surface passivation effect, and leading to a decrease in electrical performance.

[0005] In summary, developing a film structure that improves the UV attenuation of TOPCon cells is still a key issue that needs to be urgently addressed in the field of battery preparation technology. Utility Model Content

[0006] In view of the problems existing in the prior art, the purpose of the present invention is to provide a film structure for improving UV attenuation of TOPCon cells.

[0007] To achieve the above objectives, the present invention provides the following technical solutions:

[0008] A film layer structure for improving UV attenuation of a TOPCon cell includes a silicon substrate, electrodes are symmetrically arranged at both ends of the silicon substrate, a stacked film layer and a first silicon nitride layer are sequentially arranged at the bottom of the silicon substrate, and a boron emitter layer, an aluminum oxide layer, a silicon oxynitride layer, and a second silicon nitride layer are sequentially arranged on the top of the silicon substrate, the stacked film layer includes a first oxide layer, a first doped layer, a second oxide layer, and a second doped layer, and the first oxide layer, the first doped layer, the second oxide layer, and the second doped layer are sequentially stacked from top to bottom.

[0009] The present invention is further configured as follows: the thickness of the first oxide layer is 3 nm, the thickness of the first doping layer is 30 nm, the thickness of the second oxide layer is 2 nm, and the thickness of the second doping layer is 115 nm.

[0010] The utility model is further configured as follows: the silicon substrate is a single crystal silicon wafer Cz-Si with a resistivity of 2.0Ω·cm after pre-cleaning.

[0011] Beneficial effects

[0012] Compared with the known public technology, the technical solution provided by the present utility model has the following beneficial effects:

[0013] (1) In the present invention, a thin oxide layer (SiO2) is added as a barrier layer in the middle of the doped poly layer of the original single TOPCon solar cell through a lamination process to form a laminated film structure, thereby achieving light doping of the poly-Si layer at the bottom of the laminated film layer and heavy doping of the poly-Si layer at the surface of the laminated film layer. The layered doping method can control the diffusion behavior of phosphorus atoms and reduce the number of phosphorus atoms entering the silicon substrate, thereby maintaining the barrier effect and passivation effect of the oxide layer. At the same time, a high phosphorus doping concentration can also be maintained in the doped poly layer to obtain good passivation and contact effects. The lamination process can optimize the phosphorus doping distribution of the laminated film layer, which can effectively improve the electrical performance of the TOPCon solar cell.

[0014] (2) In the present invention, when depositing aluminum oxide on the front side and superimposing an aluminum oxide film layer and a silicon oxynitride film layer on the front surface of the cell silicon wafer, the cell is left to stand for 4 hours after RCA to grow a uniform oxide layer on the front and back sides, and atomic layer deposition (ALD) and chemical vapor deposition (CVD) are used to coat the front surface of the cell silicon wafer, and an aluminum oxide film layer is superimposed. The coating time is 85 seconds and 230 seconds respectively. Plasma enhanced chemical vapor deposition (PECVD) equipment is used to complete silicon oxynitride coating and high-temperature annealing treatment. The coating time is 30 seconds, and a silicon oxynitride film layer is superimposed on the front surface of the cell silicon wafer. By leaving the cell to stand for 4 hours after RCA to grow a uniform oxide layer on the front and back sides, and then superimposing an aluminum oxide film layer (ALD 85 seconds + CVD 230 seconds) + 30 seconds silicon oxynitride film layer + silicon nitride film layer, the damage of ultraviolet rays to the TOPCon cell can be reduced, and the loss of UV30 on the electrical performance of the cell can be effectively reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic diagram of the cross-sectional structure of a film structure for improving UV attenuation of TOPCon cells;

[0016] Figure 2 A comparison chart of the test results of a film structure that improves the UV attenuation of TOPCon cells. DETAILED DESCRIPTION

[0017] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention are clearly and completely described below. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0018] The present invention will be further described below with reference to the embodiments.

[0019] Please refer to Figure 1As shown, a film structure for improving UV attenuation of a TOPCon cell includes a silicon substrate 1, electrodes 2 are symmetrically provided at both ends of the silicon substrate 1, a stacked film layer 3 and a first silicon nitride layer 4 are sequentially provided on the bottom of the silicon substrate 1, and a boron emitter layer 5, an aluminum oxide layer 6, a silicon oxynitride layer 7, and a second silicon nitride layer 8 are sequentially provided on the top of the silicon substrate 1. The stacked film layer 3 includes a first oxide layer 31, a first doped layer 32, a second oxide layer 33, and a second doped layer 34, and the first oxide layer 31, the first doped layer 32, the second oxide layer 33, and the second doped layer 34 are stacked in sequence from top to bottom; the thickness of the first oxide layer 31 is 3 nm, the thickness of the first doped layer 32 is 30 nm, the thickness of the second oxide layer 33 is 2 nm, and the thickness of the second doped layer 34 is 115 nm; the silicon substrate 1 uses a single crystal silicon wafer Cz-Si with a resistivity of 2.0 Ω·cm after pre-cleaning.

[0020] Example 1: Please refer to Figure 1 As shown, a method for preparing a film structure for improving UV attenuation of a TOPCon cell comprises the following steps:

[0021] Step 1: Damage removal and alkali texturing: After removing the surface damage layer, the silicon wafer surface is treated with an alkaline solution to prepare a low-reflectivity pyramid texture structure;

[0022] Among them, the surface of the silicon wafer is treated with an alkaline solution. The silicon wafer is immersed in a 75°C soaking solution in a texturing tank for 125 seconds, and then the silicon wafer is taken out and placed in an alkaline sodium hydroxide solution with a concentration of 0.5% for 380 seconds. The soaking solution is a mixture of sodium hydroxide, hydrogen peroxide and pure water in a mass ratio of 1:5:321.

[0023] Step 2: Prepare a boron emitter: Prepare a boron emitter with a square resistance of 110Ω / □ on the front side of the silicon wafer by diffusion in a diffusion furnace.

[0024] Step 3: Use an acid solution system to remove the borosilicate glass on the surface of the silicon wafer and polish the back surface.

[0025] Step 4: Preparation of back silicon oxide layer and polysilicon layer: Deposition of back surface silicon oxide layer and polysilicon layer by low pressure chemical vapor deposition (LPCVD) equipment. LPCVD is used to deposit silicon oxide layer and polysilicon layer on the back side of the silicon wafer. The polysilicon film will prepare for subsequent phosphorus diffusion. The process includes the following steps:

[0026] S41, forming a silicon oxide layer on the surface of the silicon wafer by a thermal oxidation process at a high temperature of 580°C and an oxygen atmosphere of 110 Torr using a low-pressure chemical vapor deposition (LPCVD) device;

[0027] S42. A silicon oxide layer is prepared by low-pressure chemical vapor deposition (LPCVD). High-temperature oxidation in a dry oxygen atmosphere is used to grow silicon dioxide with a thickness of 1.5 nm. The reaction formula is as follows:

[0028]

[0029] S43, the deposition of the polysilicon layer is a thermal decomposition reaction of silane. After the silicon oxide layer is prepared, silane is introduced at 600°C at a rate of 240 mL / min for a certain period of time, and the pressure is controlled at 0.1 Torr. After the silane is thermally decomposed, a polysilicon layer of a certain thickness is deposited on the tunnel oxide layer. The chemical reaction formula is as follows:

[0030]

[0031] Step 5: Phosphorus diffusion: Use a diffusion furnace to dope phosphorus on the back side of the polysilicon film to achieve heavy doping and high-temperature crystallization.

[0032] Step 6: Deposit aluminum oxide on the front surface, and superimpose an aluminum oxide film layer and a silicon oxynitride film layer on the front surface of the cell silicon wafer, including the following steps:

[0033] S61, after removing the phosphosilicate glass on the surface of the silicon wafer, depositing a passivation aluminum oxide film layer on the front side of the silicon wafer;

[0034] S62. Cleaning by RCA method: Let the cell stand for 4 hours after RCA to allow a uniform oxide layer to grow on both sides;

[0035] S63, using atomic layer deposition (ALD) and chemical vapor deposition (CVD) to coat the front surface of the solar cell silicon wafer, superimposing an aluminum oxide film layer. The coating times are 85s and 230s respectively. The chamber pressure in the coating process is 80Pa, the plasma power is 10,000W, the deposition temperature is 150°C, and the thickness of the aluminum oxide film layer is 5nm.

[0036] S64, after the aluminum oxide film is coated, the aluminum oxide film is annealed at a temperature of 550° C. for 30 minutes;

[0037] S65. Use plasma enhanced chemical vapor deposition (PECVD) equipment to complete silicon oxynitride coating and high-temperature annealing treatment. The coating time is 30 seconds, and a silicon oxynitride film layer is superimposed on the front surface of the battery silicon wafer.

[0038] Step 7: Superimpose silicon nitride film layers on the front and back of the cell silicon wafer, and use plasma enhanced chemical vapor deposition (PECVD) equipment to complete silicon nitride coating and high-temperature annealing treatment. The silicon nitride coating temperature is 450°C, and superimpose silicon nitride film layers on the front and back of the cell silicon wafer;

[0039] Among them, the temperature during silicon nitride coating is around 450°C, which is equivalent to completing the annealing treatment of the aluminum oxide film during the silicon nitride deposition process, increasing the negative charge on the sample surface and enhancing the field effect. A good passivation effect can be achieved without the need for additional annealing process, which is highly compatible with low-cost and high-efficiency industrial applications.

[0040] Step 8: Prepare double-sided anti-reflection film: Perform front-side coating and back-side coating to prepare anti-reflection film on both sides of the solar cell.

[0041] Step 9: Print metal paste on the surface of the battery and sinter it at high temperature to form the front electrode and back electrode.

[0042] Example 2: Please refer to Figure 1 As shown, a method for preparing a film structure for improving UV attenuation of a TOPCon cell comprises the following steps:

[0043] Step 1: Damage removal and alkali texturing: After removing the surface damage layer, the silicon wafer surface is treated with an alkaline solution to prepare a low-reflectivity pyramid texture structure;

[0044] Among them, the surface of the silicon wafer is treated with an alkaline solution. The silicon wafer is immersed in a 75°C soaking liquid in a texturing tank for 135 seconds, and then the silicon wafer is taken out and placed in a 1.0% alkaline sodium hydroxide solution for 400 seconds. The soaking solution is a mixture of sodium hydroxide, hydrogen peroxide and pure water in a mass ratio of 1:5:321.

[0045] Step 2: Prepare a boron emitter: Prepare a boron emitter with a square resistance of 110Ω / □ on the front side of the silicon wafer by diffusion in a diffusion furnace.

[0046] Step 3: Use an acid solution system to remove the borosilicate glass on the surface of the silicon wafer and polish the back surface.

[0047] Step 4: Preparation of back silicon oxide layer and polysilicon layer: Deposition of back surface silicon oxide layer and polysilicon layer by low pressure chemical vapor deposition (LPCVD) equipment. LPCVD is used to deposit silicon oxide layer and polysilicon layer on the back side of the silicon wafer. The polysilicon film will prepare for subsequent phosphorus diffusion. The process includes the following steps:

[0048] S41, using a low-pressure chemical vapor deposition (LPCVD) device to form a silicon oxide layer on the surface of the silicon wafer using a thermal oxidation process at a high temperature of 600°C and an oxygen atmosphere of 110 Torr;

[0049] S42. A silicon oxide layer is prepared by low-pressure chemical vapor deposition (LPCVD). High-temperature oxidation in a dry oxygen atmosphere is used to grow silicon dioxide with a thickness of 1.5 nm. The reaction formula is as follows:

[0050]

[0051] S43, the deposition of the polysilicon layer is a thermal decomposition reaction of silane. After the silicon oxide layer is prepared, silane is introduced at 610°C at a rate of 280 mL / min for a certain period of time, and the pressure is controlled at 0.2 Torr. After the silane is thermally decomposed, a polysilicon layer of a certain thickness is deposited on the tunnel oxide layer. The chemical reaction formula is as follows:

[0052]

[0053] Step 5: Phosphorus diffusion: Use a diffusion furnace to dope phosphorus on the back side of the polysilicon film to achieve heavy doping and high-temperature crystallization.

[0054] Step 6: Deposit aluminum oxide on the front surface, and superimpose an aluminum oxide film layer and a silicon oxynitride film layer on the front surface of the cell silicon wafer, including the following steps:

[0055] S61, after removing the phosphosilicate glass on the surface of the silicon wafer, depositing a passivation aluminum oxide film layer on the front side of the silicon wafer;

[0056] S62. Cleaning by RCA method: Let the cell stand for 4 hours after RCA to allow a uniform oxide layer to grow on both sides;

[0057] S63, using atomic layer deposition (ALD) and chemical vapor deposition (CVD) to coat the front surface of the solar cell silicon wafer, superimposing an aluminum oxide film layer. The coating times are 85s and 230s respectively. The chamber pressure in the coating process is 80Pa, the plasma power is 10,000W, the deposition temperature is 150°C, and the thickness of the aluminum oxide film layer is 5nm.

[0058] S64, after the aluminum oxide film is coated, the aluminum oxide film is annealed at a temperature of 550° C. for 30 minutes;

[0059] S65. Use plasma enhanced chemical vapor deposition (PECVD) equipment to complete silicon oxynitride coating and high-temperature annealing treatment. The coating time is 35 seconds, and a silicon oxynitride film layer is superimposed on the front surface of the battery silicon wafer.

[0060] Step 7: Superimpose silicon nitride film layers on the front and back of the battery silicon wafer, and use plasma enhanced chemical vapor deposition (PECVD) equipment to complete silicon nitride coating and high-temperature annealing treatment. The silicon nitride coating temperature is 450°C, and superimpose silicon nitride film layers on the front and back of the battery silicon wafer.

[0061] Step 8: Prepare double-sided anti-reflection film: Perform front-side coating and back-side coating to prepare anti-reflection film on both sides of the solar cell.

[0062] Step 9: Print metal paste on the surface of the battery and sinter it at high temperature to form the front electrode and back electrode.

[0063] Example 3: Please refer to Figure 1 As shown, a method for preparing a film structure for improving UV attenuation of a TOPCon cell comprises the following steps:

[0064] Step 1: Damage removal and alkali texturing: After removing the surface damage layer, the silicon wafer surface is treated with an alkaline solution to prepare a low-reflectivity pyramid texture structure;

[0065] Among them, the surface of the silicon wafer is treated with an alkaline solution. The silicon wafer is immersed in a 75°C soaking solution in a texturing tank for 145 seconds, and then the silicon wafer is taken out and placed in a 1.5% alkaline sodium hydroxide solution for 500 seconds. The soaking solution is a mixture of sodium hydroxide, hydrogen peroxide and pure water in a mass ratio of 1:5:321.

[0066] Step 2: Prepare a boron emitter: Prepare a boron emitter with a square resistance of 110Ω / □ on the front side of the silicon wafer by diffusion in a diffusion furnace.

[0067] Step 3: Use an acid solution system to remove the borosilicate glass on the surface of the silicon wafer and polish the back surface.

[0068] Step 4: Preparation of back silicon oxide layer and polysilicon layer: Deposition of back surface silicon oxide layer and polysilicon layer by low pressure chemical vapor deposition (LPCVD) equipment. LPCVD is used to deposit silicon oxide layer and polysilicon layer on the back side of the silicon wafer. The polysilicon film will prepare for subsequent phosphorus diffusion. The process includes the following steps:

[0069] S41, forming a silicon oxide layer on the surface of the silicon wafer by a thermal oxidation process at a high temperature of 630°C and an oxygen atmosphere of 110 Torr using a low-pressure chemical vapor deposition (LPCVD) device;

[0070] S42. A silicon oxide layer is prepared by low-pressure chemical vapor deposition (LPCVD). High-temperature oxidation in a dry oxygen atmosphere is used to grow silicon dioxide with a thickness of 1.5 nm. The reaction formula is as follows:

[0071]

[0072] S43, the deposition of the polysilicon layer is a thermal decomposition reaction of silane. After the silicon oxide layer is prepared, silane is introduced at 620°C at a rate of 300 mL / min for a certain period of time, and the pressure is controlled at 0.3 Torr. After the silane is thermally decomposed, a polysilicon layer of a certain thickness is deposited on the tunnel oxide layer. The chemical reaction formula is as follows:

[0073]

[0074] Step 5: Phosphorus diffusion: Use a diffusion furnace to dope phosphorus on the back side of the polysilicon film to achieve heavy doping and high-temperature crystallization.

[0075] Step 6: Deposit aluminum oxide on the front surface, and superimpose an aluminum oxide film layer and a silicon oxynitride film layer on the front surface of the cell silicon wafer, including the following steps:

[0076] S61, after removing the phosphosilicate glass on the surface of the silicon wafer, depositing a passivation aluminum oxide film layer on the front side of the silicon wafer;

[0077] S62. Cleaning by RCA method: Let the cell stand for 4 hours after RCA to allow a uniform oxide layer to grow on both sides;

[0078] S63, using atomic layer deposition (ALD) and chemical vapor deposition (CVD) to coat the front surface of the solar cell silicon wafer, superimposing an aluminum oxide film layer. The coating times are 85s and 230s respectively. The chamber pressure in the coating process is 80Pa, the plasma power is 10,000W, the deposition temperature is 150°C, and the thickness of the aluminum oxide film layer is 5nm.

[0079] S64, after the aluminum oxide film is coated, the aluminum oxide film is annealed at a temperature of 550° C. for 30 minutes;

[0080] S65. Use plasma enhanced chemical vapor deposition (PECVD) equipment to complete silicon oxynitride coating and high-temperature annealing treatment. The coating time is 40s, and a silicon oxynitride film layer is superimposed on the front surface of the battery silicon wafer.

[0081] Step 7: Superimpose silicon nitride film layers on the front and back of the battery silicon wafer, and use plasma enhanced chemical vapor deposition (PECVD) equipment to complete silicon nitride coating and high-temperature annealing treatment. The silicon nitride coating temperature is 450°C, and superimpose silicon nitride film layers on the front and back of the battery silicon wafer.

[0082] Step 8: Prepare double-sided anti-reflection film: Perform front-side coating and back-side coating to prepare anti-reflection film on both sides of the solar cell.

[0083] Step 9: Print metal paste on the surface of the battery and sinter it at high temperature to form the front electrode and back electrode.

[0084] Test experiment:

[0085] The TOPCon battery membrane structures prepared in Examples 1 to 3 were recorded as the experimental group, and the original TOPCon battery membrane structure before the experiment was recorded as the control group. The electrical performance parameters of the TOPCon battery membrane structures in the experimental group and the control group were tested respectively, and the average value of the data of the experimental groups 1 to 3 was taken as the final test data. The relevant data are recorded in Table 1.

[0086] Six silicon wafers were taken from the cell membrane structure prepared in the experimental group as experimental wafers (two wafers were taken from each of Examples 1 to 3, namely F-1, F-2, F-3, F-4, F-5, and F-6). UV30 attenuation was measured using an ultraviolet attenuation tester according to relevant standards, and the relevant data were recorded in Figure 2 .

[0087] Table 1: Test data record table

[0088]

[0089] From Table 1 and Figure 2 It can be seen that the photoelectric conversion efficiency, open circuit voltage and short circuit current of the cell film structure prepared by the preparation method of the present invention are improved; the TOPCon cell film structure prepared by the experimental group has no abnormalities in the efficiency of the experimental cell of the experimental group and its anti-UV30 ability is improved.

[0090] In the utility model, after first removing the surface damage layer, the surface of the silicon wafer is treated with an alkaline solution to prepare a pyramid velvet structure with low reflectivity; a boron emitter with a square resistance of 110Ω / □ is prepared on the front side of the silicon wafer by diffusion in a diffusion furnace; an acid solution system is used to remove the borosilicate glass on the surface of the silicon wafer and polish the back surface; a silicon oxide layer and a polysilicon layer are deposited on the back surface of the silicon wafer using a low-pressure chemical vapor deposition (LPCVD) device, and a silicon oxide layer and a polysilicon layer are deposited on the back side of the silicon wafer using the LPCVD method. The polysilicon thin film will prepare for subsequent phosphorus diffusion; a diffusion furnace is used to perform phosphorus doping on the back side, and the polysilicon on the back side is polished. Phosphorus diffusion is carried out on the crystalline silicon film to achieve heavy doping and high-temperature crystallization; aluminum oxide is deposited on the front side, and an aluminum oxide film layer and a silicon oxynitride film layer are superimposed on the front and back sides of the cell silicon wafer; silicon nitride film layers are superimposed on the front and back sides of the cell silicon wafer, and plasma enhanced chemical vapor deposition (PECVD) equipment is used to complete silicon nitride coating and high-temperature annealing treatment. The silicon nitride coating temperature is 450°C, and silicon nitride film layers are superimposed on the front and back sides of the cell silicon wafer; double-sided anti-reflection film is prepared: front and back coating are performed to prepare anti-reflection film on both sides of the solar cell; metal paste is printed on the cell surface, and front and back electrodes are formed by high-temperature sintering, and finally a structure such as Figure 1 The cell film structure shown;

[0091] Through a stacking (poly) process, a silicon oxide layer and a polysilicon layer are deposited on the back surface using low-pressure chemical vapor deposition (LPCVD) equipment. LPCVD is used to deposit silicon oxide and polysilicon layers on the back side of the silicon wafer. A thin oxide layer (SiO2) is added as a barrier layer in the middle of the doped poly layer of the original single TOPCon cell, forming a stacked film layer 3 structure (a first oxide layer 31, a first doped layer 32, a second oxide layer 33, and a second doped layer 34 are stacked in sequence from top to bottom). This achieves light doping of the bottom poly-Si layer of the stacked film layer 3 and heavy doping of the surface poly-Si layer of the stacked film layer 3. The layered doping method can control the diffusion behavior of phosphorus atoms and reduce the number of phosphorus atoms entering the silicon substrate, thereby maintaining the barrier and passivation effects of the oxide layer. At the same time, a high phosphorus doping concentration can be maintained in the doped poly layer to obtain good passivation and contact effects. The stacking process can optimize the phosphorus doping distribution of the stacked film layer 3, which can effectively improve the electrical performance of the TOPCon solar cell.

[0092] At the same time, when depositing front aluminum oxide and superimposing aluminum oxide film and silicon oxynitride film on the front surface of the battery silicon wafer, the battery cell is left to stand for 4 hours after RCA, and a uniform oxide layer grows on the front and back sides. Atomic layer deposition ALD and chemical vapor deposition CVD are used to coat the front surface of the battery silicon wafer, and an aluminum oxide film layer is superimposed. The coating time is 85s and 230s respectively. The chamber pressure in the coating process is 80Pa, the plasma power is 10000W, and the deposition temperature is 150℃. The thickness of the aluminum oxide film is 5nm. Plasma enhanced chemical vapor deposition PECVD equipment is used to complete silicon oxynitride coating and high-temperature annealing treatment. The coating time is 30s, and a silicon oxynitride film layer is superimposed on the front surface of the battery silicon wafer; by letting the battery cell stand for 4 hours after RCA, a uniform oxide layer grows on the front and back sides, and then superimposing an aluminum oxide film layer (ALD 85s+CVD 230s) + 30s silicon oxynitride film + silicon nitride film can reduce the damage of ultraviolet rays to TOPCon cells and effectively reduce the loss of UV30 on the electrical performance of the cells.

[0093] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A film structure for improving UV attenuation of a TOPCon cell, comprising a silicon substrate (1), electrodes (2) being symmetrically arranged at both ends of the silicon substrate (1), characterized in that: The bottom of the silicon substrate (1) is provided with a stacked film layer (3) and a first silicon nitride layer (4) in sequence, and the top of the silicon substrate (1) is provided with a boron emitter layer (5), an aluminum oxide layer (6), a silicon oxynitride layer (7) and a second silicon nitride layer (8) in sequence, the stacked film layer (3) includes a first oxide layer (31), a first doping layer (32), a second oxide layer (33) and a second doping layer (34), and the first oxide layer (31), the first doping layer (32), the second oxide layer (33) and the second doping layer (34) are stacked in sequence from top to bottom.

2. The film structure for improving UV attenuation of TOPCon cells according to claim 1, characterized in that: The thickness of the first oxide layer (31) is 3 nm, the thickness of the first doping layer (32) is 30 nm, the thickness of the second oxide layer (33) is 2 nm, and the thickness of the second doping layer (34) is 115 nm.

3. The film structure for improving UV attenuation of TOPCon cells according to claim 1, characterized in that: The silicon substrate (1) is a pre-cleaned single crystal silicon wafer Cz-Si with a resistivity of 2.0 Ω·cm.

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