Solar silicon wafer and solar cell

Abstract

The utility model provides a solar silicon wafer and a solar cell. The solar silicon wafer comprises a plurality of side walls, and a chamfer is formed between every two adjacent side walls. Wherein at least one chamfer is different from other chamfers in size. Therefore, the direction of the solar silicon wafer can be determined through the chamfer of the solar silicon wafer, and subsequent production management and control are facilitated.

Description

Technical Field

[0001] The present application relates to the field of solar cells, and in particular to a solar silicon wafer and a solar cell. Background Art

[0002] Solar energy, as a clean energy source, is widely used in manufacturing. Solar cells can effectively absorb solar energy and convert it into electricity. Heterojunction cells are a new type of cell based on the photovoltaic effect. Heterojunction cells use amorphous silicon thin films and single-crystal silicon to form a PN heterojunction, which structurally ensures that the solar cell can achieve a high open-circuit voltage. Heterojunction cells have advantages such as high conversion efficiency, high bifaciality, no photodegradation, good temperature characteristics, the ability to use thin silicon wafers, the ability to stack perovskites, and a relatively short process flow, and are expected to be widely used in the future. Some solar cells include solar silicon wafers, and the orientation of the solar silicon wafers cannot be determined, which is not conducive to subsequent production control. Utility Model Content

[0003] The present application provides a solar silicon wafer and a solar cell, which can determine the direction of the solar silicon wafer and facilitate subsequent production control.

[0004] The present application provides a solar silicon wafer, wherein the solar silicon wafer includes a plurality of side walls, and a chamfer is formed between two adjacent side walls; wherein at least one chamfer has a size different from that of the other chamfers.

[0005] Further, the multiple side walls include a first side wall, a second side wall, a third side wall and a fourth side wall; a first chamfer is formed between the first side wall and the third side wall, and a second chamfer is formed between the first side wall and the fourth side wall; a third chamfer is formed between the second side wall and the third side wall, and a fourth chamfer is formed between the second side wall and the fourth side wall; the first chamfer and the second chamfer have the same size; the first chamfer and the second chamfer are different in size from other chamfers.

[0006] Further, the multiple side walls include a first side wall, a second side wall, a third side wall and a fourth side wall; a first chamfer is formed between the first side wall and the third side wall, and a second chamfer is formed between the first side wall and the fourth side wall; a third chamfer is formed between the second side wall and the third side wall, and a fourth chamfer is formed between the second side wall and the fourth side wall; wherein, the size of the first chamfer is different from that of the other chamfers, and the size of at least two of the second chamfer, the third chamfer and the fourth chamfer are the same.

[0007] Furthermore, the difference between the first chamfer and each of the other chamfers is greater than 0.5 mm.

[0008] Furthermore, the sizes of the second chamfer, the third chamfer and the fourth chamfer are all the same.

[0009] Furthermore, the size of the first chamfer is in the range of 1.7 mm to 2.3 mm; and / or

[0010] The sizes of the second chamfer, the third chamfer, and the fourth chamfer are all in a range of 0.7 mm to 1.3 mm.

[0011] Furthermore, the bevel size of the first chamfer is in the range of 2.42 mm to 3.22 mm; and / or

[0012] The bevel sizes of the second chamfer, the third chamfer, and the fourth chamfer are all in a range of 1.01 mm to 1.85 mm.

[0013] Furthermore, the first chamfer includes a first endpoint and a second endpoint opposite to each other, and an angle between a line connecting the first endpoint and a center point of the solar silicon wafer and a line connecting the second endpoint and the center point of the solar silicon wafer ranges from 1.123° to 1.523°; and / or

[0014] The second chamfer includes a third endpoint and a fourth endpoint relative to each other, and the angle between a line connecting the third endpoint and the center point of the solar silicon wafer and a line connecting the fourth endpoint and the center point of the solar silicon wafer ranges from 0.458° to 0.858°.

[0015] Furthermore, the solar silicon wafer includes a silicon wafer body and a gettering layer, the silicon wafer body includes a processing surface, and the gettering layer is formed on the processing surface of the silicon wafer body; the at least one chamfer having a size different from that of other chamfers is located on a set side of the processing surface.

[0016] The present application provides a solar cell, comprising the solar silicon wafer as described in any of the above embodiments.

[0017] The solar silicon wafer provided herein includes multiple sidewalls, with chamfers formed between adjacent sidewalls. At least one chamfer has dimensions that differ from the other chamfers. This allows the orientation of the solar silicon wafer to be determined based on the chamfers, facilitating subsequent production control.

[0018] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0020] Figure 1 Shown is a schematic diagram of cutting a silicon wafer into two solar silicon wafers according to an embodiment of the present application;

[0021] Figure 2 Shown is a plan view of a solar silicon wafer according to an embodiment of the present application;

[0022] Figure 3 Shown is a plan view of a solar silicon wafer according to another embodiment of the present application;

[0023] Figure 4 Shown is a schematic structural diagram of a solar silicon wafer according to an embodiment of the present application. DETAILED DESCRIPTION

[0024] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0025] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. Unless otherwise defined, technical or scientific terms used in this application should have the ordinary meaning understood by a person of ordinary skill in the art to which this application belongs. The terms "first," "second," and similar words used in this specification and claims do not denote any order, quantity, or importance, but are simply used to distinguish different components. Similarly, the terms "a" or "an" and similar words do not denote a limitation of quantity, but rather denote the presence of at least one. The terms "plurality" or "several" mean two or more. Unless otherwise indicated, the terms "front," "rear," "lower," and / or "upper" and similar words are for convenience only and are not intended to limit to a single position or spatial orientation. The terms "include" or "comprising" and similar words mean that the elements or objects listed before "include" or "comprising" include the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. The terms "connected" or "connected" and similar words are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect.

[0026] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. As used in this application and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0027] The present application provides a solar silicon wafer and a solar cell. The solar silicon wafer and solar cell of the present application are described in detail below with reference to the accompanying drawings. The features of the following embodiments and implementations may be combined with each other unless they conflict.

[0028] The present application provides a solar cell, wherein the solar cell may be a heterojunction cell. The solar cell includes a solar silicon wafer. The solar silicon wafer is formed by cutting silicon material. In one embodiment of the heterojunction solar cell, the silicon material may be a rectangular sheet with a length of 210 mm and a width of 210 mm. The solar silicon wafer is cut in half from the silicon material. The solar silicon wafer may be a rectangular sheet with a length of 210 mm and a width of 105 mm, and therefore may also be referred to as a 210 half wafer.

[0029] See also Figure 1 、 Figure 2 and Figure 3 As shown, the present application provides a solar silicon wafer 10, which includes a plurality of side walls 11, and a chamfer 12 is formed between two adjacent side walls 11. The formation of the chamfer 12 can avoid or reduce the risk of the sharp corners of the solar silicon wafer 10 being damaged, improve the yield of the solar silicon wafer 10, and prevent damage to the screen printing plate in subsequent production processes, thereby reducing costs. The shape of the solar silicon wafer 10 can be rectangular, such as a square, a rectangle, etc. When the solar silicon wafer 10 is rectangular, the number of side walls 11 is four, and a chamfer 12 is formed between two adjacent side walls 11 to form four chamfers 12. Among them, at least one chamfer 12 is different in size from the other chamfers 12. The size of one chamfer 12 can be different from the size of the other chamfers 12, or the size of two chamfers 12 can be different from the size of the other chamfers 12.

[0030] The solar silicon wafer 10 provided in the present application includes a plurality of sidewalls 11, with a chamfer 12 formed between two adjacent sidewalls 11. At least one chamfer 12 has a different size from the other chamfers 12. In this way, the orientation of the solar silicon wafer 10 can be determined by the chamfer 12 of the solar silicon wafer 10, which is beneficial for subsequent production control. The orientation of the solar silicon wafer 10 can be determined by the position of at least one chamfer 12 that has a different size from the other chamfers 12. The orientation of the solar silicon wafer 10 includes a forward and reverse direction and an up and down direction. The size of at least one chamfer 12 is different from the size of the other chamfers 12, so that the difference between the chamfers 12 can be recognized by the human eye and optical equipment, thereby determining the position of the chamfers 12 of different sizes to determine the orientation of the solar silicon wafer 10. After determining the orientation of the solar silicon wafer 10, the orientation of the solar silicon wafer 10 can be fixed, and a coordinate system for use in a monitoring system can be established on the solar silicon wafer 10 to determine the location of defects in the coordinate system, thereby facilitating the location, analysis, search, and improvement of defects. A coordinate file of the defect location can also be established so that after the defect point is input, the equipment components that may cause the impact can be quickly matched, so as to achieve strict monitoring of the production process of the solar silicon wafer 10, strengthen the monitoring of the production line, and improve production efficiency and production quality.

[0031] See also Figure 2 As shown, in one embodiment, the plurality of sidewalls 11 include a first sidewall 13, a second sidewall 14, a third sidewall 15, and a fourth sidewall 16. The first sidewall 13 and the second sidewall 14 can be arranged opposite each other, and the third sidewall 15 and the fourth sidewall 16 can be arranged opposite each other. A first chamfer 17 is formed between the first sidewall 13 and the third sidewall 15, and a second chamfer 18 is formed between the first sidewall 13 and the fourth sidewall 16. A third chamfer 19 is formed between the second sidewall 14 and the third sidewall 15, and a fourth chamfer 20 is formed between the second sidewall 14 and the fourth sidewall 16. The first chamfer 17 and the second chamfer 18 have the same size. The first chamfer 17 and the second chamfer 18 have different sizes from the other chamfers. That is, the first chamfer 17 has different sizes from the third chamfer 19 and the fourth chamfer 20, and the second chamfer 18 has different sizes from the third chamfer 19 and the fourth chamfer 20. In this way, the direction of the solar silicon wafer 10 can be determined by the position of the first chamfer 17 and the second chamfer 18. For example, when the first chamfer 17 and the second chamfer 18 are both on the right side, the surface of the solar silicon wafer 10 is used as the front side of the solar silicon wafer 10, and the placement direction of the solar silicon wafer 10 is used as the forward direction. In this way, in subsequent processing steps, the front and back sides and the forward and reverse directions of the solar silicon wafer 10 can be determined based on the position of the first chamfer 17 and the second chamfer 18, which is beneficial to the subsequent production control of the solar silicon wafer 10.

[0032] In one embodiment, the third chamfer 19 and the fourth chamfer 20 have the same size, which facilitates the processing of the solar silicon wafer 10 and helps to distinguish the first chamfer 17 .

[0033] In one embodiment, the size a1 of the first chamfer 17 and the second chamfer 18 ranges from 1.7 mm to 2.3 mm. The size a1 of the first chamfer 17 and the second chamfer 18 can be 2 mm, which is convenient for processing.

[0034] In one embodiment, the size b1 of the third chamfer 19 and the fourth chamfer 20 is in the range of 0.7 mm to 1.3 mm. The size b1 of the third chamfer 19 and the fourth chamfer 20 can be 1 mm, which is convenient for processing.

[0035] In one embodiment, the bevel size c1 of the first chamfer 17 and the second chamfer 18 ranges from 2.42 mm to 3.22 mm. When the size a1 of the first chamfer 17 and the second chamfer 18 is 2 mm, the bevel size c1 of the first chamfer 17 and the second chamfer 18 is 2.82 mm.

[0036] In one embodiment, the bevel size d1 of the third chamfer 19 and the fourth chamfer 20 is in the range of 1.01 mm to 1.85 mm. When the size b1 of the third chamfer 19 and the fourth chamfer 20 is 1 mm, the bevel size d1 of the third chamfer 19 and the fourth chamfer 20 is 1.41 mm.

[0037] In one embodiment, the length of the first sidewall 13 ranges from 205.4 mm to 206.6 mm. When the dimension a1 of the first chamfer 17 and the second chamfer 18 is 2 mm, and the dimension b1 of the third chamfer 19 and the fourth chamfer 20 is 1 mm, the length of the first sidewall 13 can be 206 mm.

[0038] In one embodiment, the length of the second sidewall 14 ranges from 207.4 mm to 208.6 mm. When the dimension a1 of the first chamfer 17 and the second chamfer 18 is 2 mm, and the dimension b1 of the third chamfer 19 and the fourth chamfer 20 is 1 mm, the length of the second sidewall 14 can be 208 mm.

[0039] In one embodiment, the length of the third sidewall 15 and the fourth sidewall 16 ranges from 101.4 mm to 102.6 mm. When the dimension a1 of the first chamfer 17 and the second chamfer 18 is 2 mm, and the dimension b1 of the third chamfer 19 and the fourth chamfer 20 is 1 mm, the length of the third sidewall 15 and the fourth sidewall 16 can be 102 mm.

[0040] See also Figure 3As shown, in another embodiment, the first chamfer 17 has different dimensions from the other chamfers 12, that is, the first chamfer 17 has different dimensions from the second chamfer 18, the third chamfer 19, and the fourth chamfer 20. The dimensions of at least two of the second chamfer 18, the third chamfer 19, and the fourth chamfer 20 are the same. In this way, the orientation of the solar silicon wafer 10 can be determined by the position of the first chamfer 17. For example, when the first chamfer 17 is located in the upper right corner, the surface of the solar silicon wafer 10 is considered the front side of the solar silicon wafer 10, and the placement direction of the solar silicon wafer 10 is considered the forward direction. In this way, in subsequent processing steps, the front and reverse sides and the forward and reverse directions of the solar silicon wafer 10 can be determined based on the position of the first chamfer 17, thereby facilitating the processing of the solar silicon wafer 10 and facilitating efficiency improvement experiments of the solar silicon wafer 10. Moreover, the direction of the solar silicon wafer 10 can be determined by identifying the position of the first chamfer 17, thereby establishing a reference system based on the direction of the solar silicon wafer 10. For example, the intersection of the extension lines of the first side wall 13 and the third side wall 15 can be used as the coordinate origin, and the position of any point on the solar silicon wafer 10 can be expressed by coordinates.

[0041] In one embodiment, the difference between the first chamfer 17 and each of the other chamfers 12 is greater than 0.5 mm. The difference between the first chamfer 17 and the second chamfer 18 is greater than 0.5 mm, the difference between the first chamfer 17 and the third chamfer 19 is greater than 0.5 mm, and the difference between the first chamfer 17 and the fourth chamfer 20 is greater than 0.5 mm. The size of the first chamfer 17 can be larger or smaller than the other chamfers 12. This facilitates recognition and distinction by the human eye and optical equipment, making it easier to determine the position of the first chamfer 17.

[0042] In one embodiment, the second chamfer 18 , the third chamfer 19 , and the fourth chamfer 20 are all the same size, which facilitates the processing of the solar silicon wafer 10 and helps to distinguish the first chamfer 17 .

[0043] In one embodiment, the size a2 of the first chamfer 17 ranges from 1.7 mm to 2.3 mm. The size a2 of the first chamfer 17 can be 2 mm, which is convenient for processing.

[0044] In one embodiment, the size b2 of the second chamfer 18, the third chamfer 19 and the fourth chamfer 20 is in the range of 0.7 mm to 1.3 mm. The size b2 of the second chamfer 18, the third chamfer 19 and the fourth chamfer 20 can be 1 mm, which is convenient for processing.

[0045] In one embodiment, the bevel dimension c2 of the first chamfer 17 ranges from 2.42 mm to 3.22 mm. When the dimension a2 of the first chamfer 17 is 2 mm, the bevel dimension c2 of the first chamfer 17 and the second chamfer 18 is 2.82 mm.

[0046] In one embodiment, the bevel dimension d2 of the second chamfer 18, the third chamfer 19, and the fourth chamfer 20 is in a range of 1.01 mm to 1.85 mm. When the dimension b2 of the second chamfer 18, the third chamfer 19, and the fourth chamfer 20 is 1 mm, the bevel dimension d2 of the second chamfer 18, the third chamfer 19, and the fourth chamfer 20 is 1.41 mm.

[0047] In one embodiment, the first chamfer 17 includes a first endpoint 21 and a second endpoint 22. The angle φ between a line connecting the first endpoint 21 and the center of the solar wafer 10 and a line connecting the second endpoint 22 and the center of the solar wafer 10 ranges from 1.123° to 1.523°. When dimension a2 of the first chamfer 17 is 2 mm, the angle φ is 1.323°.

[0048] In one embodiment, the second chamfer 18 includes a third endpoint 23 and a fourth endpoint 24. The angle θ between the line connecting the third endpoint 23 and the center of the solar wafer 10 and the line connecting the fourth endpoint 24 and the center of the solar wafer 10 ranges from 0.458° to 0.858°. When the dimension b2 of the second chamfer 18 is 1 mm, the angle θ is 0.658°. The second chamfer 18, the third chamfer 19, and the fourth chamfer 20 have the same included angle.

[0049] In one embodiment, the length of the first sidewall 13 ranges from 206.4 mm to 207.6 mm. When the dimension a2 of the first chamfer 17 is 2 mm and the dimensions b2 of the second chamfer 18, the third chamfer 19 and the fourth chamfer 20 are 1 mm, the length of the first sidewall 13 is 207 mm.

[0050] In one embodiment, the length of the second sidewall 14 ranges from 207.4 mm to 208.6 mm. When the dimension a2 of the first chamfer 17 is 2 mm and the dimensions b2 of the second chamfer 18, the third chamfer 19 and the fourth chamfer 20 are 1 mm, the length of the second sidewall 14 is 208 mm.

[0051] In one embodiment, the length of the third sidewall 15 ranges from 101.4 mm to 102.6 mm. When the dimension a2 of the first chamfer 17 is 2 mm and the dimensions b2 of the second chamfer 18, the third chamfer 19 and the fourth chamfer 20 are 1 mm, the length of the third sidewall 15 is 102 mm.

[0052] In one embodiment, the length of the fourth sidewall 16 ranges from 102.4 mm to 103.6 mm. When the dimension a2 of the first chamfer 17 is 2 mm and the dimensions b2 of the second chamfer 18, the third chamfer 19 and the fourth chamfer 20 are 1 mm, the length of the fourth sidewall 16 is 102 mm.

[0053] See also Figure 1 、 Figure 2 and Figure 3 As shown, in an embodiment of the present application, the silicon material can be cut by an automatic chamfering machine to form four chamfers of the same size, that is, to form two groups of third chamfers 19 and fourth chamfers 20, and then the silicon material is cut in half to form two solar silicon wafers 10. At this time, a solar silicon wafer 10 includes two chamfers and two right angles formed by cutting in half, and then the right angles of the solar silicon wafer 10 are cut by an automatic chamfering machine to form two chamfers, that is, to form a first chamfer 17 and a second chamfer 18.

[0054] See also Figure 4 As shown, in one embodiment, a solar silicon wafer 10 includes a silicon wafer body 25 and a gettering layer 26. The silicon wafer body 25 includes a processed surface 27, and the gettering layer 26 is formed on the processed surface 27 of the silicon wafer body 25. In related art, when the solar cell is a heterojunction cell, the solar cell production process includes silicon material cutting, rough polishing, gettering, texturing, silicon-based thin film deposition, transparent conductive film deposition, and screen printing. After the silicon wafer body 25 undergoes rough polishing and gettering processes, surface defects and metal impurities on the silicon wafer body 25 can be reduced. The processed surface 27 of the silicon wafer body 25 can be treated using tubular or chain-type gettering equipment. A phosphorus paste layer can be formed on the processed surface 27 of the silicon wafer body 25. The phosphorus paste layer can dissolve with impurities in the silicon wafer body 25 through diffusion annealing to form the gettering layer 26, thereby forming the gettering layer 26 on the processed surface 27 of the silicon wafer body 25. At least one chamfer 12, whose dimensions differ from those of the other chamfers, is located on a predetermined side of the processed surface 27. In this way, the position of at least one chamfer 12 having a size different from that of other chamfers can be used to distinguish the front and back directions of the solar silicon wafer 10, so that the solar silicon wafer 10 has directionality, thereby determining the side of the silicon wafer body 25 where the impurity layer 26 is formed, which is conducive to efficiency improvement experiments.

[0055] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0056] It should be understood that the present application is not limited to the exact structure described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A solar silicon wafer, characterized in that: The solar silicon wafer comprises a plurality of side walls, and a chamfer is formed between two adjacent side walls; wherein at least one chamfer has a different size from the other chamfers; The multiple side walls include a first side wall, a second side wall, a third side wall and a fourth side wall; a first chamfer is formed between the first side wall and the third side wall, and a second chamfer is formed between the first side wall and the fourth side wall; a third chamfer is formed between the second side wall and the third side wall, and a fourth chamfer is formed between the second side wall and the fourth side wall; wherein, the sizes of the first chamfer and the other chamfers are different, and the sizes of at least two of the second chamfer, the third chamfer and the fourth chamfer are the same.

2. The solar silicon wafer according to claim 1, characterized in that: The difference between the first chamfer and each of the other chamfers is greater than 0.5 mm.

3. The solar silicon wafer according to claim 1, characterized in that: The second chamfer, the third chamfer, and the fourth chamfer have the same size.

4. The solar silicon wafer according to claim 3, characterized in that: The size of the first chamfer is in the range of 1.7 mm to 2.3 mm; and / or The sizes of the second chamfer, the third chamfer, and the fourth chamfer are all in a range of 0.7 mm to 1.3 mm.

5. The solar silicon wafer according to claim 3, characterized in that: The bevel size of the first chamfer is in the range of 2.42 mm to 3.22 mm; and / or The bevel sizes of the second chamfer, the third chamfer, and the fourth chamfer are all in a range of 1.01 mm to 1.85 mm.

6. The solar silicon wafer according to claim 3, characterized in that: The first chamfer includes a first endpoint and a second endpoint opposite to each other, and an angle between a line connecting the first endpoint and the center point of the solar silicon wafer and a line connecting the second endpoint and the center point of the solar silicon wafer is in a range of 1.123° to 1.523°; and / or The second chamfer includes a third endpoint and a fourth endpoint relative to each other, and the angle between a line connecting the third endpoint and the center point of the solar silicon wafer and a line connecting the fourth endpoint and the center point of the solar silicon wafer ranges from 0.458° to 0.858°.

7. The solar silicon wafer according to claim 1, characterized in that: The solar silicon wafer includes a silicon wafer body and a gettering layer, the silicon wafer body includes a processing surface, and the gettering layer is formed on the processing surface of the silicon wafer body; the at least one chamfer having a size different from that of other chamfers is located on a set side of the processing surface.

8. A solar cell, characterized in that: The solar silicon wafer comprises the solar silicon wafer as described in any one of claims 1 to 7.

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