Controllable multi-voltage output LDO power supply device

Abstract

The utility model aims to provide the controllable multi-voltage output LDO power supply device which is low in cost, high in precision, wide in application range and high in stability. The circuit comprises a linear voltage regulator and a feedback regulation module, the feedback regulation module collects signals at the output end of the linear voltage regulator, the feedback regulation module comprises a multiplexer and a plurality of groups of dial switches, the output end of the linear voltage regulator is connected with a first divider resistor, and the output end of the linear voltage regulator is connected with a second divider resistor. An ADJ end of the linear voltage regulator is connected with an output end of the linear voltage regulator through the first divider resistor, a D port of the multiplexer is connected with the first divider resistor, and a plurality of S ports of the multiplexer are respectively grounded through second divider resistors with different resistance values. And the plurality of groups of dial switches are matched with a control port of the multiplexer. The power supply device is applied to the technical field of power supply devices.

Description

Technical Field

[0001] The utility model is applied to the technical field of power supply devices, and particularly relates to a controllable multi-voltage output LDO power supply device. Background Art

[0002] Low-dropout (LDO) linear regulators (LDOs) with programmable multi-voltage outputs are widely used in consumer electronics, industrial equipment, communications equipment, medical devices, automotive electronics, embedded systems, and test and measurement equipment. Their digital programmability, low quiescent power consumption, and high-precision output enable them to provide stable power to various modules and meet the demands of dynamic loads. With the continuous advancement of technology across various industries, the importance of these products in power management is becoming increasingly significant.

[0003] Currently, commonly used methods for controlling and adjusting voltage output include digital potentiometers, automatic voltage regulators, programmable LDOs, cumulative LDO designs, and inverting amplifiers.

[0004] Digital potentiometers require an LDO power management chip with external feedback. The digital potentiometer then adjusts the feedback resistor to change the LDO output voltage. However, due to inherent precision limitations, errors may be introduced, and the adjustable range is limited by the digital potentiometer's operating voltage range and current capability. Furthermore, it is not suitable for high-power applications. Automatic voltage regulators (AVRs) require additional external components such as capacitors and resistors to provide feedback and voltage regulation. Their slow response time makes them unsuitable for rapidly changing loads, such as pulsed loads, and they may also require an additional energy source to provide a reference voltage. Programmable LDOs, such as the NCP4725, can set the output voltage directly through a control signal, but this is costly and requires learning and adopting the corresponding control protocol, making them unsuitable for some low-power or high-current scenarios. A summing LDO design uses multiple LDO chips switched through switches. This approach is not only costly and space-consuming, but can also cause current imbalances without proper load control. Inverting amplifier regulation introduces distortion and noise, affecting efficiency, making it unsuitable for high-precision outputs and potentially slow.

[0005] If a controllable multi-voltage output LDO power supply device with low cost, high precision, wide application range and high stability can be provided, the above technical problems can be well solved. Utility Model Content

[0006] The technical problem to be solved by the utility model is to overcome the deficiencies of the prior art and provide a controllable multi-voltage output LDO power supply device with low cost, high precision, wide application range and high stability.

[0007] The technical solution adopted by the utility model is as follows: the utility model includes a linear voltage regulator and a feedback regulation module, the feedback regulation module collects the signal of the output end of the linear voltage regulator, the feedback regulation module includes a multiplexer and several groups of dip switches, the output end of the linear voltage regulator is connected to a first voltage-dividing resistor, the ADJ end of the linear voltage regulator is connected to the output end of the linear voltage regulator through the first voltage-dividing resistor, the D port of the multiplexer is connected to the first voltage-dividing resistor, and several S ports of the multiplexer are respectively grounded through second voltage-dividing resistors of different resistance values, and several groups of dip switches cooperate with the control port of the multiplexer.

[0008] As can be seen from the above scheme, in this utility model, the linear regulator is responsible for providing power, while the feedback regulation module is responsible for controlling the output voltage. The first voltage-dividing resistor and the feedback regulation module form a voltage divider, which is used to set the output voltage. The feedback mechanism connects the ADJ pin of the linear regulator to the output terminal, and by monitoring the difference between the output voltage and a reference voltage (VREF), the linear regulator adjusts the output current to maintain a stable output voltage. When the output voltage falls below the set value, the linear regulator increases the output current, and vice versa. By changing the on / off state of the DIP switch, the voltage level of the control pin of the multiplexer is controlled, which in turn controls the conduction of the second voltage-dividing resistor of the corresponding resistance value, thereby achieving the effect of changing the output voltage. This provides a device that does not require external processor control and is highly accurate, compact, low-cost, and stable.

[0009] A preferred solution is that the present invention further includes a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4, the positive ends of the capacitor C1 and the capacitor C2 are connected between the input end of the linear regulator and the power supply, the negative ends of the capacitor C1 and the capacitor C2 are grounded, the positive ends of the capacitor C3 and the capacitor C4 are connected to the output end of the linear regulator, and the negative ends of the capacitor C3 and the capacitor C4 are grounded.

[0010] A preferred solution is that the present invention further includes a diode D1 and a diode D2, wherein the input end of the diode D1 is connected to the output end of the linear regulator, the output end of the diode D1 is connected to the input end of the linear regulator, the input end of the diode D2 is connected to the D port of the multiplexer, and the output end of the diode D2 is connected to the output end of the linear regulator. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a system block diagram of the utility model;

[0012] Figure 2 It is a cross-sectional view of the present utility model. DETAILED DESCRIPTION

[0013] like Figure 1 As shown, in this embodiment, the utility model includes a linear regulator U1 and a feedback regulation module. The feedback regulation module collects the signal from the output of the linear regulator U1. The feedback regulation module includes a multiplexer U2 and several groups of dip switches. The output of the linear regulator U1 is connected to a first voltage divider resistor R1. The ADJ terminal of the linear regulator U1 is connected to the output of the linear regulator U1 through the first voltage divider resistor R1. The D port of the multiplexer U2 is connected to the first voltage divider resistor R1. The several S ports of the multiplexer U2 are grounded through second voltage divider resistors of different resistance values. Several groups of dip switches cooperate with the control port of the multiplexer U2. In this embodiment, the model of the linear regulator U1 is LM317, and the model of the multiplexer U2 is ADG1404YRUZ.

[0014] In this utility model, the linear regulator U1 provides power, while the feedback regulation module controls the output voltage. The first voltage-divider resistor R1 and the feedback regulation module form a voltage divider, which sets the output voltage (VOUT). The output voltage formula is: VOUT = Vref(1+R2 / R1)+IADJ×R2. Vref is typically 1.25V, and IADJ is the current at the adjustment terminal, which is usually negligible. R1 in the formula is the resistance of the first voltage-divider resistor, and R2 is the resistance of the second voltage-divider resistor connected to the feedback regulation module.

[0015] The feedback mechanism connects the ADJ pin of the linear regulator U1 to the output terminal. By monitoring the difference between the output voltage and a reference voltage (VREF), the linear regulator adjusts the output current to maintain a stable output voltage. When the output voltage falls below the set value, the linear regulator increases the output current; otherwise, it decreases it. In this embodiment, two DIP switches are provided, connected to the A0 and A1 control pins of the linear regulator U1, respectively. Changing the switching state of these DIP switches controls the voltage level of the control pin of the multiplexer, which in turn switches on a second voltage divider resistor of a corresponding value, thereby varying the output voltage.

[0016] like Figure 2 As shown, setting R1 = 240Ω, according to the output voltage formula, changing the resistance value of R2 will result in the following voltage values:

[0017] When R2=960Ω, VOUT=Vref(1+R2 / R1)=1.25V*(1+960 / 240)=6.25V;

[0018] When R2=720Ω, VOUT=Vref(1+R2 / R1)=1.25V*(1+720 / 240)=5V;

[0019] When R2=390Ω, VOUT=Vref(1+R2 / R1)=1.25V*(1+390 / 240)=3.28125V≈3.3V;

[0020] When R2=110Ω, VOUT=Vref(1+R2 / R1)=1.25V*(1+110 / 240)=1.822917V≈1.8V;

[0021] Therefore, according to Figure 2 The circuit principle can be drawn as follows:

[0022] ;

[0023] The present invention further includes capacitors C1, C2, C3, and C4. The positive ends of capacitors C1 and C2 are connected between the input of linear regulator U1 and the power supply, while the negative ends of capacitors C1 and C2 are grounded. The positive ends of capacitors C3 and C4 are connected to the output of linear regulator U1, while the negative ends of capacitors C3 and C4 are grounded. Capacitor C1 is used to stabilize, filter, and improve transient response of the input power supply; capacitor C2 is used to filter and suppress high-frequency interference; capacitor C3 is used to stabilize, filter, and improve transient response of the output power supply; and capacitor C4 is used to filter and suppress high-frequency interference.

[0024] The present invention further includes a diode D1 and a diode D2. The input end of the diode D1 is connected to the output end of the linear regulator U1, the output end of the diode D1 is connected to the input end of the linear regulator U1, the input end of the diode D2 is connected to the D port of the multiplexer U2, and the output end of the diode D2 is connected to the output end of the linear regulator U1. The diodes D1 and D2 are used to provide a low-impedance discharge path to prevent the capacitor from discharging to the output end of the regulator.

[0025] like Figure 2As shown in the figure, resistors R2 and R6, and R3 and R5 respectively form a voltage divider network. When the dip switches S1 and S2 are closed, the control pins A0 and A1 of the multiplexer U2 are kept at a low level. Conversely, A0 and A1 are kept at a high level to control the selection of different channels. The EN port of the multiplexer U2 is also connected to a resistor R4. The resistor R4 is used to pull the enable pin of the multiplexer U2 high so that the multiplexer U2 is always in an enabled state to control the feedback to have a fixed gain and prevent damage to the linear regulator U1.

[0026] Although the embodiments of the present invention are described with practical solutions, they do not limit the meaning of the present invention. For those skilled in the art, it is obvious to modify the implementation scheme and combine it with other solutions based on this description.

Claims

1. A controllable multi-voltage output LDO power supply device, comprising a linear regulator (U1) and a feedback regulation module, wherein the feedback regulation module collects a signal from an output end of the linear regulator (U1), and is characterized in that: The feedback regulation module comprises a multiplexer (U2) and several groups of dip switches; the output end of the linear voltage regulator (U1) is connected to a first voltage-dividing resistor (R1); the ADJ end of the linear voltage regulator (U1) is connected to the output end of the linear voltage regulator (U1) via the first voltage-dividing resistor (R1); the D port of the multiplexer (U2) is connected to the first voltage-dividing resistor (R1); several S ports of the multiplexer (U2) are grounded via second voltage-dividing resistors of different resistance values; and several groups of dip switches cooperate with the control port of the multiplexer (U2).

2. The controllable multi-voltage output LDO power supply device according to claim 1, characterized in that: It also includes a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4, wherein the positive ends of the capacitor C1 and the capacitor C2 are connected between the input end of the linear regulator (U1) and the power supply, and the negative ends of the capacitor C1 and the capacitor C2 are grounded, and the positive ends of the capacitor C3 and the capacitor C4 are connected to the output end of the linear regulator (U1), and the negative ends of the capacitor C3 and the capacitor C4 are grounded.

3. The controllable multi-voltage output LDO power supply device according to claim 1, wherein: It also includes a diode D1 and a diode D2, wherein the input end of the diode D1 is connected to the output end of the linear regulator (U1), the output end of the diode D1 is connected to the input end of the linear regulator (U1), the input end of the diode D2 is connected to the D port of the multiplexer (U2), and the output end of the diode D2 is connected to the output end of the linear regulator (U1).

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