Back contact cell, cell assembly and photovoltaic system

Abstract

The utility model relates to the technical field of solar cells, and provides a back contact cell, a cell assembly and a photovoltaic system, in the back contact cell, base region doping layers and emitter doping layers are alternately arranged along a first direction, and through grooves penetrating through two sides of the base region doping layers along the first direction are formed in the base region doping layers. Doped connecting layers are arranged at the through grooves, the doped connecting layers are connected with the adjacent emitter doped layers and extend into the through grooves, and the sum of the orthographic projection areas of all the emitter doped layers and all the doped connecting layers on the silicon wafer is larger than the sum of the orthographic projection areas of all the base region doped layers on the silicon wafer. The polarity of the doped connection layer is the same as that of the emitter doped layer, and the polarity of the doped connection layer is opposite to that of the base region doped layer. Thus, the area of the emitter in the whole back contact battery can be increased, and the efficiency of the back contact battery is improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a back-contact cell, a cell assembly, and a photovoltaic system. Background Art

[0002] At present, among solar cells, the back-contact cell is a cell in which both the emitter and base contact electrodes are placed on the back side of the cell (non-light-receiving side). The light-receiving side of the cell is not blocked by any metal electrode, thereby effectively increasing the short-circuit current of the cell.

[0003] In the related art, in the back-contact battery, the doping layer and the electrode are designed on the back side. On the back side of the silicon wafer, the emitter doping layer and the base doping layer are arranged alternately in sequence along one direction. However, the efficiency of the existing back-contact battery needs to be improved. Therefore, how to improve the efficiency of the back-contact battery has become a technical problem studied by technicians. Utility Model Content

[0004] The present application provides a back-contact cell, a cell assembly, and a photovoltaic system.

[0005] The present application is implemented as follows: the back contact battery of the embodiment of the present application includes:

[0006] a silicon wafer having opposite front and back sides;

[0007] A plurality of base doping layers and a plurality of emitter doping layers are stacked on the back surface, the plurality of base doping layers and the plurality of emitter doping layers being alternately arranged in sequence along a first direction and extending along a second direction, the second direction intersecting the first direction; a plurality of through-grooves are formed on at least one of the base doping layers, the plurality of through-grooves being spaced apart along the second direction, the through-grooves penetrating both sides of the base doping layer along the first direction, so that the base doping layer includes a plurality of base doping segments spaced apart along the second direction;

[0008] a doped connection layer, wherein the doped connection layer is connected to the emitter doped layer adjacent to the base doped layer having the through-groove, and the doped connection layer extends into the through-groove along the first direction, the doped connection layer has the same polarity as the emitter doped layer and opposite polarity to the base doped layer, and the sum of the orthographic projection areas of all the emitter doped layers and all the doped connection layers on the silicon wafer is greater than the sum of the orthographic projection areas of all the base doped layers on the silicon wafer;

[0009] a back passivation layer, the back passivation layer covering the back surface;

[0010] A first gate line is provided on the back passivation layer and corresponds to the base doping layer, the first gate line is conductively connected to the base doping segment and insulated and isolated from the doped connection layer; and

[0011] A second gate line is disposed on the back passivation layer and corresponds to the emitter doping layer, and the second gate line is conductively connected to the emitter doping layer.

[0012] In some embodiments, through-grooves are formed on all the base doping layers, and each of the through-grooves has a corresponding doped connection layer.

[0013] In some embodiments, the through trenches on two adjacent base doping layers correspond to each other in the first direction.

[0014] In some embodiments, in the first direction, when the emitter doping layer is provided on both sides of the base doping layer, the doped connection layer passes through the through groove along the first direction and connects the two emitter doping layers adjacent to the base doping layer;

[0015] In the first direction, when only one side of the base doping layer has the emitter doping layer, the doped connection layer is connected to the adjacent emitter doping layer and extends into the through trench along the first direction.

[0016] In some embodiments, the ratio of the sum of the orthographic projection areas of all the emitter doping layers and all the doped connection layers on the silicon wafer to the sum of the orthographic projection areas of all the base doping layers on the silicon wafer is 0.75-1.5.

[0017] In some embodiments, the ratio of the sum of the orthographic projection areas of all the emitter doping layers and all the doped connection layers on the silicon wafer to the sum of the orthographic projection areas of all the base doping layers on the silicon wafer is 0.85-1.5.

[0018] In some embodiments, the ratio of the sum of the orthographic projection areas of all the emitter doping layers and all the doped connection layers on the silicon wafer to the sum of the orthographic projection areas of all the base doping layers on the silicon wafer is 1-1.5.

[0019] In some embodiments, the ratio of the sum of the orthographic projection areas of all the emitter doping layers, all the doped connection layers, and all the base doping layers on the silicon wafer to the area of ​​the back surface is 65%-95%.

[0020] In some embodiments, the ratio of the sum of the orthographic projection areas of all the emitter doping layers, all the doped connection layers, and all the base doping layers on the silicon wafer to the area of ​​the back surface is 75%-90%.

[0021] In some embodiments, a length of the doped connection layer in the second direction is smaller than a length of the emitter doped layer in the first direction.

[0022] In some embodiments, the length of the emitter doping layer in the first direction is 300um-600um, and the length of the doped connection layer in the second direction is 30um-300um.

[0023] In some embodiments, the length of the through groove in the second direction is 30um-300um.

[0024] In some embodiments, a length of a single base doped segment in the second direction is greater than or equal to 5 mm.

[0025] In some embodiments, a distance between a center line of the doped connection layer in the second direction and the base doped segment in the second direction is smaller than a distance between a center line of the emitter doped layer in the first direction and the base doped segment in the first direction.

[0026] In some embodiments, in the back-contact cell, at least one of the doped connection layers is in leaky contact with at least one of the base doped segments at the through-grooves.

[0027] In some embodiments, the doped connection layer in leakage contact with the base doped segment includes a first portion located within the through-groove and a second portion located outside the through-groove, the first portion in leakage contact with at least one of the base doped segments, and a length of the first portion in the second direction is greater than a length of the second portion in the second direction.

[0028] In some embodiments, the silicon wafer has a first edge and a second edge in the second direction, and in the base doping layer, the length of the base doping segment closest to the first edge and the second edge in the second direction is greater than the length of the remaining base doping segments in the second direction.

[0029] In some embodiments, a length of the emitter doping layer in the first direction is the same as a length of the base doping layer in the first direction.

[0030] In some embodiments, a plurality of first openings penetrating the back passivation layer are formed on a portion of the back passivation layer corresponding to the base doping segment, and the first gate line passes through the first openings to be in conductive contact with the base doping segment.

[0031] In some embodiments, in the back-contact cell, a ratio of the sum of the areas of all the first openings to the area of ​​the back surface is less than 0.2%-5%.

[0032] In some embodiments, in the back-contact cell, a ratio of the sum of the areas of all the first openings to the area of ​​the back surface is less than 0.2%-1%.

[0033] In some embodiments, in the back-contact cell, a ratio of the sum of the areas of all the first openings to the area of ​​the back surface is less than 0.2%-0.5%.

[0034] In some embodiments, a plurality of second openings penetrating the back passivation layer are formed on a portion of the back passivation layer corresponding to the emitter doping layer, and the second gate line passes through the second openings to be in conductive contact with the emitter doping layer.

[0035] In some embodiments, in the back-contact cell, a ratio of the sum of the areas of all the second openings to the area of ​​the back surface is less than 0.2%-5%.

[0036] In some embodiments, in the back-contact cell, a ratio of the sum of the areas of all the second openings to the area of ​​the back surface is less than 0.2%-1%.

[0037] In some embodiments, in the back-contact cell, a ratio of the sum of the areas of all the second openings to the area of ​​the back surface is less than 0.2%-0.5%.

[0038] In some embodiments, a plurality of discontinuous regions are formed on the emitter doping layer, the second gate line is disconnected at the discontinuous regions, and the discontinuous regions are used to set solder strips conductively connected to the first gate line.

[0039] The present application also provides a battery assembly, which includes several back-contact batteries as described in any one of the above items.

[0040] The present application also provides a photovoltaic system, which includes the above-mentioned battery assembly.

[0041] In the back-contact cell, cell assembly, and photovoltaic system of the embodiments of the present application, the base doping layer and the emitter doping layer are alternately arranged along a first direction, a through-groove is formed on the base doping layer and extends along the first direction through both sides of the base doping layer, a doped connection layer is provided at the through-groove, the doped connection layer connects adjacent emitter doping layers and extends into the through-groove, and the sum of the orthographic projection areas of all emitter doping layers and all doped connection layers on the silicon wafer is greater than the sum of the orthographic projection areas of all base doping layers on the silicon wafer. A first gate line is conductively connected to the base doping segment and insulated from the doped connection layer, and a second gate line is provided on the back passivation layer and corresponds to and is conductively connected to the emitter doping layer. In this way, a through groove is opened on the base doping layer and a doping connection layer extending along the first direction is arranged at the through groove and the doping connection layer is connected to the adjacent emitter doping layer, and the sum of the positive projection areas of all emitter doping layers and all doping connection layers on the silicon wafer is greater than the sum of the positive projection areas of all base doping layers on the silicon wafer. In this way, the emitter area in the entire back contact battery can be increased, thereby improving the efficiency of the back contact battery.

[0042] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 This is a module schematic diagram of a photovoltaic system provided by an embodiment of the present application;

[0044] Figure 2 Schematic diagram of a module of a battery assembly provided in an embodiment of the present application;

[0045] Figure 3 Schematic diagram of the planar structure of a back-contact battery provided in an embodiment of the present application;

[0046] Figure 4 is a cross-sectional schematic diagram of a back-contact battery provided in an embodiment of the present application;

[0047] Figure 5 is another cross-sectional schematic diagram of a back-contact battery provided in an embodiment of the present application;

[0048] Figure 6 yes Figure 4 A partial enlarged schematic diagram of the back contact battery in FIG;

[0049] Figure 7 is another partially enlarged schematic diagram of a back-contact battery provided in an embodiment of the present application;

[0050] Figure 8 Schematic diagram of the partial structure of a back-contact battery provided in an embodiment of the present application;

[0051] Figure 9 This is another planar structural schematic diagram of the back-contact battery provided in an embodiment of the present application.

[0052] Description of main component symbols:

[0053] Photovoltaic system 1000, battery assembly 200, back contact battery 100, silicon wafer 10, front side 11, back side 12, base doping layer 20, through groove 21, base doping section 22, emitter doping layer 30, discontinuity region 31, doped connection layer 40, back side passivation layer 50, first opening 51, second opening 52, first gate line 60, second gate line 70. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solutions and advantages of the present application more clear, the present application is further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application. In addition, it should be understood that the specific embodiments described herein are merely used to explain the present application and are not intended to limit the present application.

[0055] In the description of this application, it should be understood that the terms "length", "width", "up", "down", "horizontal", "longitudinal", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on this application.

[0056] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the described features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0057] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or mutual communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0058] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0059] The disclosure below provides many different embodiments or examples for realizing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numbers and / or reference letters in different examples. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those skilled in the art will appreciate the application of other processes and / or the use scenarios of other materials.

[0060] See also Figure 1-Figure 2 The photovoltaic system 1000 in the embodiment of the present application may include the battery assembly 200 in the embodiment of the present application, and the battery assembly 200 in the embodiment of the present application may include several back-contact batteries 100 in the embodiment of the present application.

[0061] In an embodiment of the present application, multiple back-contact cells 100 in a battery assembly 200 can be connected in series to form multiple battery strings. Each battery string can be connected in series, in parallel, or in a combination of series and parallel to achieve current bus output. For example, the connection between each battery cell can be achieved by welding a welding ribbon, or the connection between each battery string can be achieved by using a bus bar. In some embodiments, each battery string can be formed into a battery cell array, which is then packaged together with a front plate, a front adhesive film, a rear adhesive film, and a back plate to form a battery assembly 200.

[0062] See also Figure 3 The back contact cell 100 in the embodiment of the present application may include a silicon wafer 10, several base doping layers 20, several emitter doping layers 30, a doped connection layer 40, a back passivation layer 50, a first gate line 60 and a second gate line 70.

[0063] The silicon wafer 10 has a front side 11 and a back side 12 opposite to each other, and the base doping layer 20 and the emitter doping layer 30 are stacked on the back side 12. Several base doping layers 20 and emitter doping layers 30 are alternately arranged in sequence along a first direction and both extend along a second direction, which intersects the first direction.

[0064] Specifically, if Figure 3 As shown, the base doping layer 20 and the emitter doping layer 30 can be arranged alternately along the longitudinal direction of the silicon wafer 10 and both extend in the lateral direction. That is, the first direction can be the longitudinal direction of the back-contact cell 100, and the second direction can be the lateral direction of the back-contact cell 100, with the two directions being perpendicular to each other. Of course, in other embodiments, the first direction and the second direction can also be other directions, for example, both can be diagonal directions of the silicon wafer 10, and this is not limited here.

[0065] like Figure 3 As shown, in an embodiment of the present application, a plurality of through-grooves 21 are formed in at least one base doping layer 20. The through-grooves 21 are arranged at intervals along the second direction. The through-grooves 21 penetrate both sides of the base doping layer 20 along the first direction, so that the base doping layer 20 includes base doping segments 22 arranged at intervals along the second direction. In other words, among the plurality of base doping layers 20, at least one base doping layer 20 is composed of a plurality of base doping segments 22 arranged at intervals along the second direction, and two adjacent base doping segments 22 are separated by the through-grooves 21.

[0066] The doped connection layer 40 is located at a position corresponding to the through-trench 21. The doped connection layer 40 is connected to the emitter doped layer 30 adjacent to the base doped layer 20 having the through-trench 21, and the doped connection layer 40 extends into the through-trench 21 along a first direction. That is, the doped connection layer 40 is located at the through-trench 21 and connected to the adjacent emitter doped layer 30. The doped connection layer 40 has the same polarity as the emitter doped layer 30 and opposite polarity to the base doped layer 20 (that is, the doped connection layer 40 and the emitter doped layer 30 have the same doping type, and neither of them makes back contact with the emitter of the cell 100). The sum of the orthographic projection areas of all emitter doped layers 30 and all doped connection layers 40 on the silicon wafer 10 is greater than the sum of the orthographic projection areas of all base doped layers 20 on the silicon wafer 10. "Orthographic projection" refers to the orthographic projection along the thickness direction of the back-contacted cell 100. Reference should be made to this reference for any equivalent descriptions below.

[0067] like Figure 4As shown, the back passivation layer 50 covers the entire back surface 12. Specifically, the back passivation layer 50 is the outermost film layer on the back surface 12, and the back passivation layer 50 covers the base doping layer 20, the emitter doping layer 30, and the doped connection layer 40. In some embodiments, the base doping layer 20 and the emitter doping layer 30 can be alternately arranged, and the back passivation layer 50 is also covered in the area between them. Generally speaking, the back passivation layer 50 covers the entire back surface 12.

[0068] The first gate lines 60 are disposed on the back passivation layer 50 and correspond to the base doped layer 20. That is, the first gate lines 60 are disposed on the base doped layer 20 in the same number. The first gate lines 60 are conductively connected to the base doped segments 22 and insulated from the doped connection layer 40. Specifically, the first gate lines 60 are used to collect current from each base doped segment 22. The first gate lines 60 can extend along the second direction. The portion of the first gate line 60 located on the base doped segment 22 is conductively connected to the base doped segment 22, and the portion of the first gate line 60 located on the through-groove 21 (doped connection layer 40) is insulated from the doped connection layer 40 to prevent short circuits.

[0069] The second gate line 70 is arranged on the back passivation layer 50 and corresponds to the emitter doping layer 30 and is conductively connected to the emitter doping layer 30. Specifically, the second gate line 70 is correspondingly arranged on the emitter doping layer 30, and the number of the two corresponds. The second gate line 70 extends along the second direction, and the second gate line 70 is used to collect the current of the emitter doping layer 30.

[0070] It should be noted that, in this article, a certain film layer is stacked or covered on a certain surface or a partial area of ​​a certain film layer. The film layer may be directly stacked on the surface or a certain film layer, or other film layers may be arranged between the film layer and the surface or film layer. Covering is only used to limit the specific setting range of the film layer.

[0071] In the back-contact cell 100, cell assembly 200, and photovoltaic system 1000 of the embodiments of the present application, the base doping layers 20 and the emitter doping layers 30 are alternately arranged along a first direction. A through-groove 21 is formed on the base doping layer 20, extending through both sides of the base doping layer 20 along the first direction. A doped connection layer 40 is provided at the through-groove 21. The doped connection layer 40 connects adjacent emitter doping layers 30 and extends into the through-groove 21. The sum of the orthographic projection areas of all emitter doping layers 30 and all doped connection layers 40 on the silicon wafer 10 is greater than the sum of the orthographic projection areas of all base doping layers 20 on the silicon wafer 10. A first gate line 60 is conductively connected to the base doping segment 22 and insulated from the doped connection layer 40. A second gate line 70 is provided on the back passivation layer 50, corresponding to the emitter doping layer 30, and conductively connected to the emitter doping layer 30. In this way, a through groove 21 is opened on the base doping layer 20 and a doping connection layer 40 extending along the first direction is arranged at the through groove 21, and the doping connection layer 40 is connected to the adjacent emitter doping layer 30, and the sum of the positive projection areas of all emitter doping layers 30 and all doping connection layers 40 on the silicon wafer is greater than the sum of the positive projection areas of all base doping layers 20 on the silicon wafer. In this way, the emitter area in the entire back contact battery 100 can be increased, thereby improving the efficiency of the back contact battery 100.

[0072] In addition, in the related art, in the back-contact battery, in order to increase the area of ​​the emitter, it is usually achieved by increasing the width of the emitter doping layer (i.e., the length in the first direction). In such a case, on the one hand, in the related art, since the emitter doping layer increases in size in the first direction, in the back-contact battery of the same size, the number of arrangement periods of alternating base and emitter regions (one emitter doping layer and one base doping layer is 1 period) will be reduced, resulting in reduced efficiency. On the other hand, in the related art, since the emitter doping layer increases in size in the first direction, the path for the base doping layer to collect carriers will be increased, thereby reducing the efficiency of the base doping layer in collecting carriers, resulting in reduced efficiency.

[0073] However, in an embodiment of the present application, the area of ​​the emitter is increased by opening a through groove 21 on the base doping layer 20 and then providing a doped connection layer 40 extending along the first direction at the through groove 21. This can increase the area of ​​the emitter without reducing the number of arrangement periods of alternating arrangement of the base region and the emitter region, thereby improving efficiency.

[0074] That is to say, in the embodiment of the present application, the emitter area of ​​the back-contact battery 100 can be increased while ensuring the number of alternating arrangement periods of the base region and the emitter region, thereby improving the efficiency of the back-contact battery 100.

[0075] Specifically, in the embodiment of the present application, the silicon wafer 10 may be an n-type silicon wafer or a p-type silicon wafer, that is, the doping type of the silicon wafer 10 may be p-type doping or n-type doping, which is not specifically limited here.

[0076] When the doping type of the silicon wafer 10 is p-type doping, the doping type of the emitter doping layer 30 and the doping connection layer 40 is n-type doping, and the doping type of the base doping layer 20 is p-type doping.

[0077] When the doping type of the silicon wafer 10 is n-type doping, the doping type of the emitter doping layer 30 and the doping connection layer 40 is p-type doping, and the doping type of the base doping layer 20 is n-type doping.

[0078] That is to say, no matter what doping type the silicon wafer 10 is, the doping type of the emitter doping layer 30 and the doped connection layer 40 is opposite to the doping type of the silicon wafer 10 , and both are emitters of the back contact battery 100 , while the doping type of the base doping layer 20 is the same as the doping type of the silicon wafer 10 .

[0079] In this way, by setting the sum of the areas of all emitter doping layers 30 and all doped connection layers 40 to be larger than the sum of the areas of all base doping layers 20 , the emitter area can be increased, thereby improving efficiency.

[0080] In some embodiments, the emitter doping layer 30 and the doping connection layer 40 can be formed at one time during the manufacturing process. For example, in some embodiments, a plurality of base doping layers 20 can be prepared on the back side 12 first, and then the base doping layer 20 can be patterned (for example, laser patterning) to form a plurality of through grooves 21 on the base doping layer 20, and then the emitter doping layer 30 and the doping connection layer 40 can be deposited on the back side 12 at one time.

[0081] In some embodiments, the length of the emitter doping layer 30 in the first direction (ie, the width of the emitter doping layer 30 ) is the same as the length of the base doping layer 20 in the first direction (ie, the width of the base doping layer 20 ).

[0082] In this way, the width of the emitter doping layer 30 is set to be the same as the width of the base doping layer 20 and a doping connection layer 40 is set at the through groove 21. This can ensure the number of arrangement periods of the emitter doping layer 30 and the base doping layer 20 on the back side 12 (one emitter doping layer 30 and one base doping layer 20 is one arrangement period) while increasing the emitter area, thereby further improving the efficiency of the back contact battery 100.

[0083] See also Figure 3 and Figure 4In some embodiments, a plurality of first openings 51 penetrating the back passivation layer 50 are formed on a portion of the back passivation layer 50 corresponding to the base doping segment 22 , and the first gate line 60 passes through the first openings 51 and is in conductive contact with the base doping segment 22 .

[0084] Thus, by forming the first opening 51 on the back passivation layer 50 , the first gate line 60 can form a conductive contact with the base doped segment 22 on the base doped segment 22 , thereby achieving current collection and confluence.

[0085] In such an embodiment, the first opening 51 is not provided in the portion of the back passivation layer 50 corresponding to the through groove 21, and the portion of the first gate line 60 located on the through groove 21 and the doped connection layer 40 can be located on the back passivation layer 50 or partially embedded in the back passivation layer 50, thereby being insulated and isolated from the doped connection layer 40 by the back passivation layer 50 to avoid leakage.

[0086] Specifically, in some embodiments, the first opening 51 can be formed by laser drilling and etching drilling. Of course, in other embodiments, the first opening 51 can also be formed by burning through the back passivation layer 50 using a burn-through slurry. There is no specific limitation here.

[0087] Furthermore, in the back-contact battery 100, the ratio of the sum of the areas of all first openings 51 to the area of ​​the back side 12 (i.e., the ratio of the sum of the orthographic projection areas of all first openings 51 on the back side 12 to the area of ​​the back side 12) is less than 0.2%-5%.

[0088] In this way, by setting the area ratio of the first opening 51 within this reasonable range, it can be avoided that the area ratio of the first opening 51 is too small, which causes the area of ​​the metallized contact area on the base doping layer 20 to be too small and affects the collection effect; it can also be avoided that the area ratio of the first opening 51 is too large, which causes excessive damage during the opening process and leads to a significant decrease in efficiency.

[0089] Specifically, in such an embodiment, the area proportion of the first opening 51 may be, for example, 0.2%, 0.25%, 0.3%, 0.35%, 0.4%, 0.45%, 0.5%, 0.55%, 0.6%, 0.65%, 0.7%, 0.75%, 0.8%, 0.85%, 0.9%, 0.95%, 1%, 1.25%, 1.5%, 1.75%, 2%, 2.25%, 2.5%, 2.75%, 3%, 3.25%, 3.5%, 3.75%, 4%, 4.25%, 4.5%, 4.75%, 5% or any value between 0.2% and 5%.

[0090] In such an embodiment, the area of ​​the first opening 51 is preferably 0.2%-1%, and most preferably 0.2%-0.5%. In this way, the damage can be minimized while ensuring the metallization area.

[0091] See also Figure 3 and Figure 5 In some embodiments, a plurality of second openings 52 penetrating the back passivation layer 50 may be formed on a portion of the back passivation layer 50 corresponding to the emitter doping layer 30 , and the second gate line 70 passes through the second openings 52 to be in conductive contact with the emitter doping layer 30 .

[0092] In this way, by opening a plurality of second openings 52 in the region corresponding to the emitter doping layer 30 , the second gate line 70 can form a conductive contact with the emitter doping layer 30 to achieve current collection and merging.

[0093] Specifically, in some embodiments, the second opening 52 can be formed by laser drilling and etching drilling. Of course, in other embodiments, the second opening 52 can also be formed by burning through the back passivation layer 50 using a burn-through slurry. There is no specific limitation here.

[0094] Furthermore, in the back-contact battery 100, the ratio of the sum of the areas of all second openings 52 to the area of ​​the back side 12 (i.e., the ratio of the sum of the orthographic projection areas of all second openings 52 on the back side 12 to the area of ​​the back side 12) is less than 0.2%-5%.

[0095] In this way, by setting the area ratio of the second opening 52 within this reasonable range, it can be avoided that the area ratio of the second opening 52 is too small, which causes the area of ​​the metallized contact area on the emitter doping layer 30 to be too small and affects the collection effect; it can also be avoided that the area ratio of the second opening 52 is too large, which causes excessive damage during the opening process and leads to a significant decrease in efficiency.

[0096] Specifically, in such an embodiment, the area proportion of the second opening 52 may be, for example, 0.2%, 0.25%, 0.3%, 0.35%, 0.4%, 0.45%, 0.5%, 0.55%, 0.6%, 0.65%, 0.7%, 0.75%, 0.8%, 0.85%, 0.9%, 0.95%, 1%, 1.25%, 1.5%, 1.75%, 2%, 2.25%, 2.5%, 2.75%, 3%, 3.25%, 3.5%, 3.75%, 4%, 4.25%, 4.5%, 4.75%, 5% or any value between 0.2% and 5%.

[0097] In such an embodiment, the area of ​​the second opening 52 is preferably 0.2%-1%, and most preferably 0.2%-0.5%. In this way, the damage can be minimized while ensuring the metallization area.

[0098] Of course, it is understandable that in some embodiments, it is not necessary to open the second opening 52 on the back passivation layer 50. Instead, the back passivation layer 50 can be directly burned through by a burn-through slurry to achieve conductive contact between the emitter doping layer 30 and the second gate line 70. No specific limitation is made here.

[0099] See also Figure 3 In the first direction, when there are emitter doping layers 30 on both sides of the base doping layer 20, the doped connection layer 40 passes through the through groove 21 along the first direction to connect the two emitter doping layers 30 adjacent to the base doping layer 20;

[0100] In the first direction, when only one side of the base doping layer 20 has the emitter doping layer 30 , the doped connection layer 40 is connected to the adjacent emitter doping layer 30 and extends into the through trench 21 along the first direction.

[0101] Specifically, if Figure 3 As shown, in the first direction, the silicon wafer 10 has two opposite edges. When the doped layer closest to the two edges in the first direction is the base doped layer 20, the base doped layer 20 located at the edge has an adjacent emitter doped layer 30 only on one side. In this case, the doped connection layer 40 is connected to the emitter doped layer 30 closest to the edge and extends into the through groove 21 of the base doped layer 20 closest to the edge. In addition, as shown in FIG. Figure 3 As shown, in such a case, except for the base doping layer 20 located at the edge, the remaining base doping layers 20 have emitter doping layers 30 on both sides. In such a case, the doping connection layer 40 can extend through the through groove 21 along the first direction and connect the two emitter doping layers 30 located on both sides of the base doping layer 20. That is to say, in such a case, the doping connection layer 40 at the through groove 21 of the base doping layer 20 closest to the edge is only connected to one emitter doping layer 30, while the doping connection layer 40 at the through groove 21 of the base doping layer 20 located in the middle area is connected to the two adjacent emitter doping layers 30.

[0102] Of course, in some embodiments, in the first direction, the doping layer closest to the two side edges in the first direction may also be the emitter doping layer 30. In this way, all base doping layers 20 have an emitter doping layer 30 on both sides. In this case, the doping connection layer 40 at the through groove 21 of all base doping layers 20 connects the two adjacent emitter doping layers 30.

[0103] Please continue reading Figure 3 In some embodiments, a through-groove 21 may be formed on all base doping layers 20 , and each through-groove 21 corresponds to a doped connection layer 40 .

[0104] In this way, a doped connection layer 40 may be provided at the position of the through groove 21 of each base doping layer 20 , thereby further optimizing the efficiency of the back contact cell 100 .

[0105] Furthermore, in such an embodiment, the through-grooves 21 on two adjacent base doping layers 20 correspond to each other in the first direction. That is, in all base doping layers 20, the number of through-grooves 21 on each base doping layer 20 is the same, the through-grooves 21 on two adjacent base doping layers 20 correspond to each other in the first direction, and the through-grooves 21 are arranged in a number of columns. The number of through-grooves 21 on each base doping layer 20 is determined by the number of columns. For example, if the number of through-grooves 21 on the base doping layer 20 is N, then in the back contact cell 100, the through-grooves 21 are arranged in N columns.

[0106] In this way, by arranging the through grooves 21 on all the base doping layers 20 to correspond to each other in the first direction, the manufacturing process can be simplified and the manufacturing cost can be reduced.

[0107] Specifically, in such an embodiment, Figure 3 As shown, in the same column of through grooves 21 , the doped connection layer 40 extends along the first direction to connect the emitter doped layer 30 , and the emitter doped layer 30 and the doped connection layer 40 cross each other horizontally and vertically to form an emitter region of the back contact battery 100 with a mesh structure.

[0108] Of course, in some possible embodiments, the through-grooves 21 on each base doping layer 20 may not correspond to each other in the first direction, that is, the through-grooves 21 on adjacent base doping layers 20 may be staggered in the first direction, which is not specifically limited here. In addition, in some embodiments, the number of through-grooves 21 on different base doping layers 20 may also be different, which is not specifically limited here.

[0109] In some embodiments, the ratio of the sum of the orthographic projection areas of all emitter doping layers 30 and all doped connection layers 40 on the silicon wafer 10 to the sum of the orthographic projection areas of all base doping layers 20 on the silicon wafer 10 is 0.75-1.5.

[0110] In this way, by optimizing the area ratio between the two, the efficiency improvement of the back contact battery 100 can achieve the expected effect. That is to say, by setting such an area ratio, the efficiency improvement effect of the back contact battery 100 can be optimized.

[0111] Specifically, in such an embodiment, the area ratio of the two may be, for example, 0.75, 0.8, 0.85, 0.9, 0.95, 1, 1.05, 1.1, 1.15, 1.2, 1.25, 1.3, 1.35, 1.4, 1.45, 1.5 or any value between 0.75-1.5.

[0112] The ratio between the two may preferably be 0.85-1.5, and most preferably 1-1.5. In this way, the area ratios of the two may achieve an optimal matching effect, thereby improving the conversion efficiency of the back contact battery 100 .

[0113] Furthermore, in some embodiments, the ratio of the sum of the orthographic projection areas of all emitter doping layers 30 , all doped connection layers 40 , and all base doping layers 20 on the silicon wafer 10 to the area of ​​the back surface 12 may be 65%-95%.

[0114] In this way, the bifaciality of the back-contact cell 100 can be improved, and the relationship between the front conversion efficiency and the back conversion efficiency can be balanced, so that the front conversion efficiency and the back conversion efficiency can achieve a better matching effect.

[0115] Specifically, in such an embodiment, the ratio of the sum of the areas of the above three to the area of ​​the back side 12 may be, for example, 65%, 70%, 75%, 80%, 85%, 90%, 95% or any value between 65% and 95%.

[0116] In such an embodiment, the ratio of the sum of the orthographic projection areas of all emitter doping layers 30, all doped connection layers 40, and all base doping layers 20 on the silicon wafer 10 to the area of ​​the back surface 12 can preferably be 75%-90%. In this way, the front-side conversion efficiency and the back-side conversion efficiency can be optimally matched.

[0117] See also Figure 6 In some embodiments, the length L1 of the doped connection layer 40 in the second direction is smaller than the length L2 of the emitter doped layer 30 in the first direction, that is, L1 < L2.

[0118] Furthermore, in such an embodiment, the length L2 of the emitter doping layer 30 in the first direction may be 300 um-600 um, and the length L1 of the doped connection layer 40 in the second direction may be 30 um-300 um.

[0119] In this way, by setting the length of the doped connection layer 40 in the second direction to be smaller, the base doped layer 20 can have a higher efficiency in transferring carriers in the doped connection layer 40 region, thereby further improving the efficiency.

[0120] Specifically, in such an embodiment, the length L2 of the emitter doping layer 30 in the first direction may be, for example, 300um, 320um, 340um, 360um, 380um, 400um, 420um, 440um, 460um, 480um, 500um, 520um, 540um, 560um, 580um, 600um or any value between 300um-600um.

[0121] The length L1 of the doped connecting layer 40 in the second direction may be, for example, 30um, 40um, 50um, 60um, 70um, 80um, 90um, 100um, 110um, 120um, 130um, 140um, 150um, 160um, 170um, 180um, 190um, 200um, 210um, 220um, 230um, 240um, 250um, 260um, 270um, 280um, 290um, 300um or any value between 200um-300um, preferably 200um-300um.

[0122] See also Figure 6 In some embodiments, the length L3 of the through groove 21 in the second direction is 30 μm-300 μm.

[0123] In this way, it is possible to avoid the through-groove 21 being too short in length in the second direction, which would result in the process of forming the through-groove 21 being too difficult, and it is also possible to avoid the through-groove 21 being too long in the second direction, which would result in the base area on the back side 12 being too small, thus affecting efficiency.

[0124] Specifically, in such an embodiment, the length L3 of the through-groove 21 in the second direction may be, for example, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm, 210 μm, 220 μm, 230 μm, 240 μm, 250 μm, 260 μm, 270 μm, 280 μm, 290 μm, 300 μm, or any value between 200 μm and 300 μm. It will be understood that in the embodiment of the present application, the length of the portion of the doped connecting layer 40 located in the through-groove 21 in the second direction may be less than or equal to the length of the through-groove 21 in the second direction. In this context, the portion of the doped connecting layer 40 located in the through-groove 21 extends to the portion of the doped connecting layer 30 corresponding to the through-groove 21.

[0125] In some embodiments, the length of a single base doped segment 22 in the second direction is greater than or equal to 5 mm.

[0126] In this way, the length of a single base doping layer 20 in the second direction can be prevented from being too small, thereby effectively preventing the number of first openings 51 on a single base doping segment 22 from being small and affecting the area of ​​the metallization region on the base doping segment 22 .

[0127] See also Figure 6 In some embodiments, a distance L4 between a center line of the doped connection layer 40 in the second direction (the doped connection layer 40 is symmetrical about the center line in the second direction) and the base doped segment 22 in the second direction (i.e., a distance between the center line of the doped connection layer 40 and an end of the base doped segment 22 close to the center line) is smaller than a distance L5 between a center line of the emitter doped layer 30 in the first direction (the emitter doped layer 30 is symmetrical about the center line in the first direction) and the base doped segment 22 in the first direction (i.e., a distance between the center line of the emitter doped layer 30 and one side of the base doped segment 22 close to the center line). That is, in Figure 6 In the figure, L4 is smaller than L5.

[0128] In this way, the effect of collecting carriers of the base doped segment 22 in the area covered by the doped connection layer 40 can be improved, thereby improving the efficiency of the back contact cell 100 .

[0129] See also Figure 7 In some embodiments, in the back-contact cell 100 , there is at least one doped connection layer 40 in leaky contact with at least one base doped segment 22 at the through trench 21 .

[0130] In this way, by connecting at least one doped connecting layer 40 to at least one base doped segment 22 at the through groove 21 for leakage, a leakage channel can be formed at the through groove 21, thereby introducing a leakage point, which can reduce the reverse breakdown voltage of the back contact battery 100 when it is blocked, thereby improving the anti-hot spot performance of the back contact battery 100 and reducing the hot spot risk of the battery assembly 200.

[0131] It should be noted that "leakage contact" means that there is no insulation isolation between the two to enable the doped connection layer 40 and the base doped segment 22 to be conductive. It can be that the two are set to be in direct contact to achieve leakage contact between the two, or a film layer with conductive function (such as a tunneling layer) is set between the two to achieve indirect conduction between the two, thereby forming leakage contact. There is no specific limitation here.

[0132] Specifically, in such an embodiment, the doped connection layer 40 can form a leakage contact with the side surface of the base doped segment 22 (i.e., the side surface of the through-groove 21), and the portion of the doped connection layer 40 located within the through-groove 21 can fill the through-groove 21. In the back-contact cell 100, the number of through-grooves 21 forming the leakage contact can be single or multiple, as long as the leakage contact area is not too large, which would significantly reduce efficiency.

[0133] For further information, please refer to Figure 7 In such an embodiment, the doped connection layer 40 in leakage electrical contact with the base doped segment 22 includes a first portion 41 located within the through-groove 21 and a second portion 42 located outside the through-groove 21. The first portion 41 is in leakage electrical contact with at least one base doped segment 22. The length of the first portion 41 in the second direction (i.e., the width of the first portion 41) is greater than the length of the second portion 42 in the second direction (i.e., the width of the second portion 42).

[0134] In this way, by setting the length of the first portion 41 in the second direction to be larger, the doped connection layer 40 can form a composite contact with the base doped segment 22 through the first portion 41 .

[0135] Specifically, in such an embodiment, the first portion 41 may fill the entire through-groove 21 , and the length of the first portion 41 in the second direction may be the same as the length of the through-groove 21 in the second direction.

[0136] See also Figure 8 In some embodiments, the silicon wafer 10 has a first edge 101 and a second edge 102 in the second direction. In the base doping layer 20, the length of the base doping segment 22 closest to the first edge 101 and the second edge 102 in the second direction is greater than the length of the remaining base doping segments 22 in the second direction. That is, the length of the base doping segment 22 located at the edge of the silicon wafer 10 is greater than the length of the base doping segment 22 located in the middle of the silicon wafer 10.

[0137] In this way, the length of the base doping segment 22 located at the first edge 101 and the second edge 102 is set longer. When the soldering pad and the soldering strip are subsequently set for welding, the soldering pad can be set at a position farther away from the first edge 101 and the second edge 102, so as to avoid the soldering pad being too close to the first edge 101 and the second edge 102, which may easily cause hidden cracks or even splits in the battery cell during welding.

[0138] Specifically, in some embodiments, the welding strip connected to the first gate line 60 can be arranged basically parallel to the first gate line 60, and a welding strip is welded on each first gate line 60. By setting the length of the base doping segment 22 close to the first edge 101 and the second edge 102 to be longer, the starting point and the ending point of the welding strip can be set at a position with a certain distance from the first edge 101 and the second edge 102, thereby avoiding hidden cracks and splits during welding.

[0139] In other embodiments, the soldering ribbon connected to the first grid lines 60 may extend along the second direction, intersecting all first grid lines 60. In such embodiments, by lengthening the base region doping segments 22 near the first edge 101 and the second edge 102, the soldering points on the soldering ribbon closest to the first edge 101 and the second edge 102 can be positioned farther from the first edge 101 and the second edge 102, thereby effectively avoiding the occurrence of hidden cracks and splinters during soldering. The string soldering method for the back-contact cell 100 is not limited herein.

[0140] That is to say, in the embodiment of the present application, the back contact battery 100 may be a main grid-less back contact battery 100. In this case, when forming a battery string, each first grid line 60 may be welded with a corresponding welding point that is basically parallel to the first grid line 60, or the welding strips may be arranged crosswise with the first grid lines 60, and each welding strip is connected to all the first grid lines 60.

[0141] Of course, it can be understood that in some embodiments, the back-contact battery 100 can also be a back-contact battery 100 with a main grid. In this case, main grids of different polarities can be alternately arranged in sequence along the second direction, wherein the main grid of one polarity is only conductively connected to the first grid line 60, and the main grid of the other polarity is only conductively connected to the second grid line 70. The type of the back-contact battery 100 is not mentioned in this article.

[0142] See also Figure 9 In some embodiments, a plurality of discontinuous regions 31 may be formed on the emitter doping layer 30 , and the second gate line 70 is disconnected at the discontinuous regions 31 . The discontinuous regions 31 are used to set solder strips that are conductively connected to the first gate line 60 .

[0143] In this way, during the welding process, when setting the welding strip that crosses the first gate line 60 and the second gate line 70, the welding strip welded to the first gate line 60 can be set at the discontinuous area 31, thereby avoiding the welding strip connected to the first gate line 60 from contacting the second gate line 70 of opposite polarity and causing leakage.

[0144] Throughout this specification, reference to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0145] In addition, the above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A back contact battery, characterized in that: include: a silicon wafer having opposite front and back sides; A plurality of base doping layers and a plurality of emitter doping layers are stacked on the back surface, the plurality of base doping layers and the plurality of emitter doping layers being alternately arranged in sequence along a first direction and extending along a second direction, the second direction intersecting the first direction; a plurality of through-grooves are formed on at least one of the base doping layers, the plurality of through-grooves being spaced apart along the second direction, the through-grooves penetrating both sides of the base doping layer along the first direction, so that the base doping layer includes a plurality of base doping segments spaced apart along the second direction; a doped connection layer, wherein the doped connection layer is connected to the emitter doped layer adjacent to the base doped layer having the through-groove, and the doped connection layer extends into the through-groove along the first direction, the doped connection layer has the same polarity as the emitter doped layer and opposite polarity to the base doped layer, and the sum of the orthographic projection areas of all the emitter doped layers and all the doped connection layers on the silicon wafer is greater than the sum of the orthographic projection areas of all the base doped layers on the silicon wafer; a back passivation layer, the back passivation layer covering the back surface; a first gate line disposed on the back passivation layer and corresponding to the base doping layer, the first gate line being conductively connected to the base doping segment and insulated and isolated from the doped connection layer; and A second gate line is disposed on the back passivation layer and corresponds to the emitter doping layer, and the second gate line is conductively connected to the emitter doping layer.

2. The back contact battery according to claim 1, characterized in that A through groove is formed on all the base doping layers, and each through groove has a corresponding doping connection layer.

3. The back contact battery according to claim 2, characterized in that The through grooves on two adjacent base doping layers correspond to each other in the first direction.

4. The back contact battery according to claim 1, characterized in that In the first direction, when the emitter doping layer is provided on both sides of the base doping layer, the doped connection layer passes through the through groove along the first direction and connects the two emitter doping layers adjacent to the base doping layer; In the first direction, when only one side of the base doping layer has the emitter doping layer, the doped connection layer is connected to the adjacent emitter doping layer and extends into the through trench along the first direction.

5. The back contact battery according to claim 1, characterized in that The ratio of the sum of the orthographic projection areas of all the emitter doping layers and all the doped connection layers on the silicon wafer to the sum of the orthographic projection areas of all the base doping layers on the silicon wafer is 0.75-1.

5.

6. The back contact battery according to claim 5, characterized in that The ratio of the sum of the orthographic projection areas of all the emitter doping layers and all the doped connection layers on the silicon wafer to the sum of the orthographic projection areas of all the base doping layers on the silicon wafer is 0.85-1.

5.

7. The back contact battery according to claim 6, characterized in that The ratio of the sum of the orthographic projection areas of all the emitter doping layers and all the doped connection layers on the silicon wafer to the sum of the orthographic projection areas of all the base doping layers on the silicon wafer is 1-1.

5.

8. The back contact battery according to claim 1, characterized in that The ratio of the sum of the orthographic projection areas of all the emitter doping layers, all the doped connection layers and all the base doping layers on the silicon wafer to the area of ​​the back surface is 65%-95%.

9. The back contact battery according to claim 8, characterized in that The ratio of the sum of the orthographic projection areas of all the emitter doping layers, all the doped connection layers and all the base doping layers on the silicon wafer to the area of ​​the back surface is 75%-90%.

10. The back contact battery according to claim 1, characterized in that The length of the doped connection layer in the second direction is smaller than the length of the emitter doped layer in the first direction.

11. The back contact battery according to claim 10, characterized in that The length of the emitter doping layer in the first direction is 300um-600um, and the length of the doped connection layer in the second direction is 30um-300um.

12. The back contact battery according to claim 1, characterized in that The length of the through groove in the second direction is 30um-300um.

13. The back contact battery according to claim 1, characterized in that The length of a single base doping segment in the second direction is greater than or equal to 5 mm.

14. The back contact battery according to claim 1, characterized in that A distance between a center line of the doped connection layer in the second direction and the base doped segment in the second direction is smaller than a distance between a center line of the emitter doped layer in the first direction and the base doped segment in the first direction.

15. The back contact battery according to claim 1, characterized in that In the back contact cell, at least one of the doped connection layers is in leaky contact with at least one of the base doped segments at the through trench.

16. The back contact cell according to claim 15, characterized in that The doped connection layer in leakage contact with the base doped segment includes a first portion located within the through-groove and a second portion located outside the through-groove, the first portion in leakage contact with at least one of the base doped segments, and a length of the first portion in the second direction is greater than a length of the second portion in the second direction.

17. The back contact battery according to claim 1, characterized in that The silicon wafer has a first edge and a second edge in the second direction. In the base doping layer, the length of the base doping segment closest to the first edge and the second edge in the second direction is greater than the length of the remaining base doping segments in the second direction.

18. The back contact battery according to claim 1, characterized in that The length of the emitter doping layer in the first direction is the same as the length of the base doping layer in the first direction.

19. The back contact cell according to claim 1, characterized in that A plurality of first openings penetrating the back passivation layer are formed on a portion of the back passivation layer corresponding to the base doping segment. The first gate line passes through the first openings and is in conductive contact with the base doping segment.

20. The back contact cell according to claim 19, characterized in that In the back-contact battery, the ratio of the sum of the areas of all the first openings to the area of ​​the back surface is less than 0.2%-5%.

21. The back contact cell according to claim 20, characterized in that In the back-contact cell, the ratio of the sum of the areas of all the first openings to the area of ​​the back surface is less than 0.2%-1%.

22. The back contact cell according to claim 21, characterized in that In the back-contact cell, the ratio of the sum of the areas of all the first openings to the area of ​​the back surface is less than 0.2%-0.5%.

23. The back contact battery according to claim 1, characterized in that A plurality of second openings penetrating the back passivation layer are formed on a portion of the back passivation layer corresponding to the emitter doping layer, and the second gate line passes through the second openings and is in conductive contact with the emitter doping layer.

24. The back contact cell according to claim 23, characterized in that In the back-contact cell, the ratio of the sum of the areas of all the second openings to the area of ​​the back surface is less than 0.2%-5%.

25. The back contact cell according to claim 24, characterized in that In the back-contact cell, the ratio of the sum of the areas of all the second openings to the area of ​​the back surface is less than 0.2%-1%.

26. The back contact cell according to claim 25, characterized in that In the back-contact cell, the ratio of the sum of the areas of all the second openings to the area of ​​the back surface is less than 0.2%-0.5%.

27. The back contact cell according to claim 1, characterized in that A plurality of discontinuous areas are formed on the emitter doping layer, the second gate line is disconnected at the discontinuous areas, and the discontinuous areas are used to set solder strips that are conductively connected to the first gate line.

28. A battery assembly, characterized in that: A back contact battery comprising any one of several claims 1-27.

29. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 28.

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