HBC battery, battery assembly and photovoltaic system

Abstract

The utility model is applicable to the field of photovoltaic technology, and provides an HBC battery, a battery assembly and a photovoltaic system, the HBC battery comprises silicon: a silicon substrate, the silicon substrate is provided with a backlight surface and a light facing surface which are oppositely arranged, the backlight surface of the silicon substrate is alternately provided with a first area and a second area, the first area is a polished area, and the second area is a suede area; the first passivation layer, the first doping layer, the first conductive film layer and the first electrode are sequentially arranged in the first area in a stacked mode, the second passivation layer, the second doping layer, the second conductive film layer and the second electrode are sequentially arranged in the second area in a stacked mode, the first doping layer and the second doping layer are in a special shape, and the first conductive film layer and the second conductive film layer are not communicated; the width of the first electrode is smaller than that of the second electrode. The width of the second electrode is increased, so that the inner back reflection capability of front incident light can be improved, and the current output can be improved. And the influence of contact resistance is reduced, so that the transport efficiency of carriers is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of photovoltaics, and in particular relates to an HBC battery, a battery assembly and a photovoltaic system. Background Art

[0002] In existing HBC (Heterojunction with Back Contact) cells, significant progress has been made compared to BC (Back Contact) cells, but there are still some technical problems that limit its further improvement of photoelectric conversion efficiency and reduction of manufacturing costs.

[0003] Existing HBC solar cells have limitations in terms of light reflection and absorption, contact resistance, and long-wavelength light response. Although a textured surface treatment is used to reduce surface reflection, it is not effective in improving long-wavelength light absorption and internal back reflection, resulting in some light energy not being fully utilized. In addition, the traditional electrode design, due to insufficient width and high contact resistance, hinders carrier transport, increases series resistance (string resistance), and reduces the fill factor (FF), thereby affecting the overall photoelectric conversion efficiency. At the same time, the passivation layer and doping layer in different regions have not been optimally combined, which limits the performance improvement of the battery. Therefore, it is necessary to improve battery efficiency through design optimization and process improvement. Utility Model Content

[0004] The utility model provides an HBC battery, aiming to solve the problems of increased recombination rate of carriers and insufficient stability in existing HBC batteries.

[0005] The utility model is implemented as follows: an HBC battery, comprising:

[0006] A silicon substrate having a backlight surface and a light-facing surface opposite to each other, wherein a first region and a second region are provided on the backlight surface of the silicon substrate, wherein the first region is a polished region and the second region is a suede region, wherein the first region and the second region are alternately provided and do not overlap;

[0007] A first passivation layer, a first doped layer, and a first conductive film layer are sequentially stacked in the first region, and a second passivation layer, a second doped layer, and a second conductive film layer are sequentially stacked in the second region, the first doped layer and the second doped layer are of different types, and the first conductive film layer and the second conductive film layer are not connected; and

[0008] A first electrode stacked on the first conductive film layer and a second electrode stacked on the second conductive film layer, wherein a width of the first electrode is smaller than a width of the second electrode.

[0009] Optionally, the thickness of the first electrode is greater than the thickness of the second electrode.

[0010] Optionally, the second passivation layer and the second doping layer extend toward the first region and are stacked on the first doping layer.

[0011] Optionally, the first passivation layer is a tunneling oxide layer, and the first doped layer is a doped polysilicon layer;

[0012] The second passivation layer is at least one of an intrinsic amorphous silicon layer or a tunneling oxide layer, and the second doped layer is at least one of a doped amorphous silicon layer and a doped microcrystalline silicon layer.

[0013] Optionally, the first doping layer is an N-type doping layer, and the second doping layer is a P-type doping layer.

[0014] Optionally, the width of the second electrode is 10-300 μm.

[0015] Optionally, a difference between a width of the second electrode and a width of the first electrode is less than or equal to 50 μm.

[0016] Optionally, the thickness of the first electrode is 10-30 μm.

[0017] Optionally, a difference between the thickness of the first electrode and the thickness of the second electrode is less than or equal to 10 μm.

[0018] Optionally, the distance between the first electrode and the second electrode is 200-500 μm.

[0019] The utility model also provides a battery assembly, comprising the above-mentioned HBC battery.

[0020] The utility model also provides a photovoltaic system, comprising the above-mentioned battery assembly.

[0021] The beneficial effects achieved by the present invention are that alternating polished areas and velvet areas are provided on the backlight surface of the silicon substrate, which can optimize the reflection and absorption performance of light. Among them, the first area and the second area are respectively covered with different types of passivation layers, doping layers, conductive film layers and electrodes. Increasing the width of the second electrode can improve the internal back reflection ability of the front incident light, especially the spectral response effect of long-wavelength light. This will help to increase the current output. In addition, the wider electrode contact surface can reduce the influence of contact resistance, thereby improving the carrier transport efficiency. This improvement will reduce the series resistance (string resistance) and thus improve the fill factor (FF). In general, these changes can significantly improve the photoelectric conversion efficiency of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1This is a schematic diagram of the first structure of the HBC battery provided by the utility model;

[0023] Figure 2 This is a schematic diagram of the second structure of the HBC battery provided by the present invention;

[0024] Figure 3 This is a third structural diagram of the HBC battery provided by the present utility model;

[0025] Figure 4 This is a schematic diagram of electrode dimension marking for the first structure of the HBC battery provided by the present invention.

[0026] Description of reference numerals:

[0027] 100, HBC battery; 110, first region; 111, first passivation layer; 112, first doping layer; 113, first conductive film layer; 114, first electrode; 120, second region; 121, second passivation layer; 122, second doping layer; 123, second conductive film layer; 124, second electrode; 130, isolation region; 140, silicon substrate. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0029] In the description of the present invention, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0030] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the described features. In the description of this utility model, "plurality" means two or more, unless otherwise specifically defined.

[0031] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections, or mutual communication; direct connections or indirect connections through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on specific circumstances.

[0032] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0033] The disclosure below provides many different embodiments or examples for realizing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numbers and / or reference letters in different examples. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but a person of ordinary skill in the art will appreciate the application of other processes and / or the use of other materials.

[0034] The utility model arranges alternating polished areas and velvet areas on the backlight surface of the silicon substrate, which can optimize the reflection and absorption performance of light. Among them, the first area and the second area are respectively covered with different types of passivation layers, doping layers, conductive film layers and electrodes. Increasing the width of the second electrode can improve the internal back reflection ability of the front incident light, especially the spectral response effect of long-wavelength light. This will help to improve the current output. In addition, the wider electrode contact surface can reduce the influence of contact resistance, thereby improving the carrier transport efficiency. This improvement will reduce the series resistance (string resistance) and thus improve the fill factor (FF). In general, these changes can significantly improve the photoelectric conversion efficiency of the battery.

[0035] Example 1

[0036] like Figure 1 As shown, this embodiment provides an HBC battery 100, including:

[0037] A silicon substrate 140 having a backlight surface and a light-facing surface opposite to each other, wherein a first region 110 and a second region 120 are disposed on the backlight surface of the silicon substrate 140 , wherein the first region 110 is a polished region and the second region 120 is a suede region. The first regions 110 and the second regions 120 are alternately disposed and do not overlap.

[0038] A first passivation layer 112, a first doped layer, and a first conductive film layer 113 are sequentially stacked in the first region 110, and a second passivation layer 122, a second doped layer, and a second conductive film layer 123 are sequentially stacked in the second region 120, wherein the first doped layer and the second doped layer are of different types, and the first conductive film layer 113 and the second conductive film layer 123 are not connected; and

[0039] The first electrode 114 is stacked on the first conductive film layer 113 , and the second electrode 124 is stacked on the second conductive film layer 123 . The width of the first electrode 114 is smaller than that of the second electrode 124 .

[0040] An HBC cell (Heterojunction with Back Contact solar cell) is a solar cell with a heterojunction structure and a back contact design. It combines the advantages of different materials to improve photoelectric conversion efficiency. The heterojunction, formed on the back of the cell by different types of silicon materials (typically amorphous silicon and polycrystalline silicon), enhances cell performance.

[0041] The silicon substrate 140 has two main surfaces, a light-facing surface and a backlight surface. The light-facing surface directly faces the sunlight, while the backlight surface is the other side. The two surfaces are arranged opposite each other.

[0042] Two distinct regions, a first region 110 and a second region 120, are arranged on the backlight surface of the silicon substrate 140. These regions are arranged alternately. Specifically, a plurality of first regions 110 and a plurality of second regions 120 are arranged alternately along a first direction, and both the first regions 110 and the second regions 120 extend along a second direction that intersects the first direction. The first regions 110 and the second regions 120 may be arranged alternately along the lateral direction of the silicon substrate 140 and both extend along the longitudinal direction. That is, the first direction may be the lateral direction of the back-contact cell, and the second direction may be the longitudinal direction of the back-contact cell, with the two directions being perpendicular to each other. Of course, in other embodiments, the first and second directions may be other directions, for example, both may be diagonal directions of the silicon substrate 140, and this is not limited here. The first regions 110 and the second regions 120 do not overlap, and the first regions 110 and the second regions 120 may be adjacent to each other, or other regions may be provided between the first and second regions 110 and 120.

[0043] A first passivation layer 112, a first doped layer, and a first conductive film layer 113 are sequentially stacked in the first region 110. The first passivation layer 112, the first doped layer, and the first conductive film layer 113 are sequentially stacked in each first region 110. A second passivation layer 122, a second doped layer, and a second conductive film layer 123 are sequentially stacked in the second region 120. The second passivation layer 122, the second doped layer, and the second conductive film layer 123 are sequentially stacked in each second region 120.

[0044] The first electric film layer and the second electric film layer can be TCO film layers or other film layers with both light transmittance and conductive properties. Both can be single film layers or multi-layer composite film layers, and there is no specific limitation here.

[0045] It can be understood that the second region 120 is a velvet region, the second passivation layer 122 is stacked on the velvet region, and the surface of the second passivation layer 122 corresponding to the velvet region that is away from the silicon substrate 140 can be velvet. Furthermore, the surface of the second doped layer stacked on the second passivation layer 122 corresponding to the velvet region that is away from the silicon substrate 140 can be velvet, and the surface of the second conductive film layer 123 stacked on the second doped layer corresponding to the velvet region that is away from the silicon substrate 140 can be velvet.

[0046] The first conductive film layer is stacked on the first doped layer and covers at least a portion of the first doped layer. The second conductive film layer is stacked on the second doped layer and covers at least a portion of the second doped layer corresponding to the velvet area. The second conductive film layer and the first conductive film layer are insulated and spaced apart. Specifically, a space may be set between the second conductive film layer and the first conductive film layer, or an insulating medium may be set between the second conductive film layer and the first conductive film layer.

[0047] like Figure 2 As shown, in one embodiment, an isolation region 130 is included, and the isolation region 130 is placed between the first region 110 and the second region 120 .

[0048] The isolation region 130 effectively separates the first region 110 and the second region 120, preventing charge carrier mixing and recombination. This allows for more efficient separation and transfer of charge within the respective regions. The isolation region 130 reduces the chance of photogenerated carriers migrating across regions, lowering the probability of carrier recombination and thereby improving the solar cell's photoelectric conversion efficiency.

[0049] The first electrode 114 is stacked on the first conductive film layer 113, and the second electrode 124 is stacked on the second conductive film layer 123. The electrodes are usually long strips. The extension direction of the first electrode 114 is consistent with the extension direction of the first region 110, and the extension direction of the second electrode 124 is consistent with the extension direction of the second region 120. The width direction of the electrode is horizontal and perpendicular to the extension direction of the electrode. Figure 4 As shown, the width of the first electrode 114 is D1, and the width of the second electrode 124 is D2.

[0050] The width of the second electrode 124 is greater than the width of the first electrode 114. The wider second electrode 124 increases the reflection surface of the light inside the battery. When light is incident from the front and passes through the silicon substrate 140, a portion of the unabsorbed light will reach the back. The wider electrode can reflect more of this light back into the silicon wafer, increasing the effective path length of the light in the silicon. Long-wave light (near-infrared light) has a longer wavelength and is generally more difficult to be absorbed in the battery. The high reflectivity of the wide electrode causes light of these wavelengths to reflect and re-enter the silicon substrate 140 multiple times, thereby increasing the probability of being absorbed, which promotes the spectral response of long-wave light and thus increases the current.

[0051] The wider second electrode 124 increases the contact area with the silicon substrate 140 and enhances the contact interface for current transmission. The larger contact area reduces the current density and reduces the impact of contact resistance on current transmission. Low contact resistance means smoother current transmission, which helps to efficiently collect carriers over a larger range and improve the carrier transport efficiency, thereby reducing power loss in the electrodes and conductive paths, reducing the overall series resistance, and improving the output voltage and current performance of the solar cell, thereby increasing the FF (fill factor) and improving the carrier transport efficiency.

[0052] In this embodiment, by providing alternating polished areas and velvet areas on the backlight surface of the silicon substrate 140, the reflection and absorption properties of light can be optimized. Among them, the first area 110 and the second area 120 are respectively covered with different types of passivation layers, doping layers, conductive film layers and electrodes. Increasing the width of the second electrode 124 can improve the internal back reflection ability of the front incident light, especially the spectral response effect of long-wavelength light. This will help to increase the current output. In addition, the wider electrode contact surface can reduce the influence of contact resistance, thereby improving the carrier transport efficiency. This improvement will reduce the series resistance (string resistance) and thus improve the fill factor (FF). In general, these changes can significantly improve the photoelectric conversion efficiency of the battery.

[0053] Example 2

[0054] Based on the first embodiment, the thickness of the first electrode 114 is greater than the thickness of the second electrode 124 .

[0055] like Figure 4 As shown, the thickness of the first electrode 114 is H1, and the thickness of the second electrode 124 is H2. The first electrode 114 is arranged in the first region 110. The polished surface has a lower surface roughness than the velvet surface, which improves the incident efficiency of light, maximizes the entry of light and reduces surface light loss. This allows more light energy to reach the silicon substrate 140 for effective conversion. The first electrode 114 is thicker, which increases the ability to block and reflect light. This reflection can be combined with the effect of the polished surface to further ensure that light can be reflected back to the silicon substrate 140 multiple times, thereby improving the overall light utilization rate.

[0056] The width of the first electrode 114 is smaller than that of the second electrode 124. However, the increased thickness of the first electrode 114 provides sufficient cross-sectional area to support efficient current transmission, concentrating the current path, ensuring stable current transmission, and reducing resistance losses. Thick electrodes provide a greater contact depth. Even with a narrower width, the increased thickness can still reduce the local resistance of current passing through the electrode, thereby reducing the resulting power loss.

[0057] Example 3

[0058] like Figure 3 As shown, based on the first embodiment, the second passivation layer 122 and the second doping layer extend toward the first region 110 and are stacked on the first doping layer.

[0059] By extending the second passivation layer 122 and the second doped layer to the first region 110 and stacking them on top of the first doped layer, alignment requirements between layers can be reduced. Because these layers can be stacked and processed in the same area, the process is simplified, avoiding the complex steps of precise patterning in different areas. This design allows for continuous deposition or diffusion processes on the same substrate without the need for additional mask alignment or photolithography steps, reducing production complexity and costs, and minimizing errors.

[0060] Example 4

[0061] On the basis of the first embodiment, the first passivation layer 112 is a tunneling oxide layer, and the first doped layer is a doped polysilicon layer;

[0062] The second passivation layer 122 is at least one of an intrinsic amorphous silicon layer and a tunneling oxide layer, and the second doped layer is at least one of a doped amorphous silicon layer and a doped microcrystalline silicon layer.

[0063] The first passivation layer 112 may be a tunneling oxide layer, such as a tunneling silicon oxide layer, and the first doped layer may be a doped polysilicon layer. The second passivation layer 122 may be at least one of an intrinsic amorphous silicon layer or a tunneling oxide layer (such as a tunneling silicon oxide layer), and the second doped layer may be at least one of a doped amorphous silicon layer and a doped microcrystalline silicon layer.

[0064] In this case, the first passivation contact structure is a tunneling passivation contact structure, and the second passivation contact structure is a heterojunction passivation contact structure. Thus, by designing the first doped layer as a doped polysilicon layer and the second doped layer as at least one of a doped amorphous silicon layer and a doped microcrystalline silicon layer, the efficiency of the cell is improved.

[0065] At the same time, setting the area corresponding to the doped polysilicon as a polished area can avoid a significant reduction in the passivation effect of the area corresponding to the doped polysilicon, which would affect efficiency. Doped amorphous silicon and / or doped microcrystalline silicon have a better passivation effect. Setting the area corresponding to the doped amorphous silicon and / or doped microcrystalline silicon as a textured surface can improve the anti-reflection effect on the back side, thereby increasing the bifaciality of the cell. In other words, in this case, the bifaciality of the cell can be further improved while ensuring the passivation effect of the area corresponding to the first doped layer.

[0066] Example 5

[0067] On the basis of the fourth embodiment, the first doping layer is an N-type doping layer, and the second doping layer is a P-type doping layer.

[0068] Based on the first embodiment, the amorphous silicon layer is a P-type amorphous silicon layer, and the polycrystalline silicon layer is an N-type polycrystalline silicon layer.

[0069] Amorphous silicon has a high density of defect states, and these defects can trap electrons, resulting in low electron mobility. However, holes move relatively smoothly in amorphous silicon, so amorphous silicon is more suitable as a P-type material. Amorphous silicon as a P-type material can also effectively passivate the interface with the polycrystalline silicon or crystalline silicon substrate 140, reducing carrier recombination caused by interface defects, thereby improving interface quality. In addition, amorphous silicon as a P-type layer has good long-term stability, mature technology, and relatively easy control of process parameters, which meets the requirements of large-scale industrial production.

[0070] N-type polysilicon has a large number of free electrons and high electron mobility, which can effectively improve the conductivity of the device and reduce resistance loss. The crystalline structure of polysilicon is superior to that of amorphous silicon, with a lower defect state density, which makes polysilicon an N-type material that can better conduct electrons.

[0071] Setting the amorphous silicon layer to P-type and the polycrystalline silicon layer to N-type fully utilizes the advantages of their respective materials, optimizes the carrier transmission and separation efficiency, and improves the photoelectric conversion efficiency.

[0072] Example 6

[0073] Based on the first embodiment, the width of the second electrode 124 is 10-300 μm.

[0074] A width range of 10-300μm strikes a balance between light transmission and current collection. Narrower electrodes reduce light obstruction and improve light absorption efficiency, while sufficiently wide electrodes ensure effective current collection, thereby improving overall cell efficiency. Within this width range, the electrodes provide sufficient conductive paths to ensure efficient current transmission, reduce resistive losses on the electrodes, and improve the fill factor (FF).

[0075] At the same time, electrode widths within this range are adaptable to a variety of manufacturing technologies, such as screen printing, inkjet printing, or laser direct writing, allowing for flexible selection of different processes to achieve electrode patterning. This width range provides a certain degree of manufacturing tolerance without requiring extremely high alignment accuracy, reducing the complexity and cost of the microfabrication process.

[0076] Example 7

[0077] Based on the first embodiment, the difference between the width of the second electrode 124 and the width of the first electrode 114 is less than or equal to 50 μm.

[0078] The difference in width between the first electrode 114 and the second electrode 124 is less than or equal to 50μm, which means that the size of the electrodes is within a relatively close range. On the one hand, it can effectively reduce the problem of uneven light blocking caused by excessive differences in electrode width, which helps to more evenly distribute the light transmission area, further improve the light absorption rate, reduce the shadow effect, and thus improve the photoelectric conversion efficiency. When the electrode width difference is small, the current collection path is more symmetrical, which can effectively prevent uneven current transmission caused by uneven electrode distribution. This helps to reduce areas with excessively high or low local current density and improve the overall current transmission efficiency of the battery.

[0079] On the other hand, when the difference in width between the two electrodes is small, the resistance of the first electrode 114 and the second electrode 124 can be relatively matched, reducing the impedance mismatch problem when the current is transmitted between the different electrodes and reducing resistance losses. Due to the small difference in electrode width, the current is more evenly distributed when flowing through the electrodes, reducing the occurrence of localized heating. This helps to improve the long-term stability of the device and reduce thermal stress and electrical performance degradation caused by temperature unevenness.

[0080] Example 8

[0081] Based on the first embodiment, the thickness of the first electrode 114 is 10-30 μm.

[0082] The design of an electrode thickness of 10-30μm ensures low series resistance. The moderate thickness provides sufficient conductive cross-sectional area, reducing the resistance loss when current passes through the electrode, helping to improve the battery's fill factor (FF) and overall energy conversion efficiency. Furthermore, the electrode thickness of 10-30μm is suitable for a variety of common manufacturing processes, such as screen printing, electroplating, or vapor deposition. This thickness range simplifies thickness control and deposition processes while ensuring electrical performance, reducing production difficulty and cost.

[0083] Example 9

[0084] Based on the first embodiment, the difference between the thickness of the first electrode 114 and the thickness of the second electrode 124 is less than or equal to 10 μm.

[0085] When the thickness difference between the two electrodes is controlled within 10μm, the resistance difference of the electrodes is also reduced accordingly. This ensures that there will be no large resistance unevenness when the current flows between the two electrodes, thereby reducing power loss and improving the overall current transmission efficiency of the battery. When the thickness difference is small, the current density in the electrode is more uniform, avoiding the phenomenon of excessively high or low current in local areas. This helps to improve the battery's power conversion efficiency and stability. And the electrode thickness difference of less than 10μm can ensure that the mechanical stress distribution of the electrode is more uniform, reducing the problem of material fracture or deformation caused by uneven stress distribution. Especially under high temperature or external force, this design can significantly improve the durability of the electrode.

[0086] Example 10

[0087] Based on the first embodiment, the distance between the first electrode 114 and the second electrode 124 is 200-500 μm.

[0088] The distance between the first electrode 114 and the second electrode 124 refers to the distance between two adjacent opposing sides of the first electrode 114 and the second electrode 124. Controlling the distance between the first electrode 114 and the second electrode 124 to 200-500 μm can effectively reduce parasitic capacitance effects, reduce coupling interference between electrodes, and ensure uniform distribution of the electric field. This helps improve the switching speed and response efficiency of the device and is particularly suitable for electronic devices that require fast response. Appropriate electrode spacing can avoid short circuits caused by electrodes being too close, ensuring the safety and reliability of the battery or circuit.

[0089] An electrode spacing of 200-500μm also provides more space for heat transfer and dissipation, preventing heat accumulation between electrodes and reducing local overheating. This is particularly important for high-power devices or large batteries operating continuously, helping to improve thermal stability and safety during long-term operation. A more appropriate electrode spacing helps to achieve more uniform temperature distribution, avoid the formation of hot spots, reduce the concentration of thermal stress, and improve the lifespan and reliability of the entire device.

[0090] Example 11

[0091] This embodiment provides a battery assembly, including the HBC battery 100 of the above embodiment.

[0092] The beneficial effects of the battery assembly of this embodiment are equivalent to the beneficial effects of the above-mentioned HBC battery 100, and will not be repeated here.

[0093] Example 12

[0094] This embodiment provides a photovoltaic system, including the battery assembly of the above embodiment.

[0095] The beneficial effects of the photovoltaic system of this embodiment are equivalent to the beneficial effects of the above-mentioned battery assembly, and will not be described in detail here.

[0096] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An HBC battery, characterized in that: include: A silicon substrate having a backlight surface and a light-facing surface opposite to each other, wherein a first region and a second region are provided on the backlight surface of the silicon substrate, wherein the first region is a polished region and the second region is a suede region, wherein the first region and the second region are alternately provided and do not overlap; A first passivation layer, a first doped layer, and a first conductive film layer are sequentially stacked in the first region, and a second passivation layer, a second doped layer, and a second conductive film layer are sequentially stacked in the second region, wherein the first doped layer and the second doped layer are of different types, and the first conductive film layer and the second conductive film layer are not connected; as well as A first electrode stacked on the first conductive film layer and a second electrode stacked on the second conductive film layer, wherein a width of the first electrode is smaller than a width of the second electrode.

2. The HBC battery according to claim 1, wherein: The thickness of the first electrode is greater than the thickness of the second electrode.

3. The HBC battery according to claim 1, wherein: The second passivation layer and the second doping layer extend toward the first region and are stacked on the first doping layer.

4. The HBC battery according to claim 1, wherein: The first passivation layer is a tunneling oxide layer, and the first doped layer is a doped polysilicon layer; The second passivation layer is at least one of an intrinsic amorphous silicon layer or a tunneling oxide layer, and the second doped layer is at least one of a doped amorphous silicon layer and a doped microcrystalline silicon layer.

5. The HBC battery according to claim 4, characterized in that: The first doping layer is an N-type doping layer, and the second doping layer is a P-type doping layer.

6. The HBC battery according to claim 1, wherein: The width of the second electrode is 10-300 μm.

7. The HBC battery according to claim 6, wherein: A difference between a width of the second electrode and a width of the first electrode is less than or equal to 50 μm.

8. The HBC battery according to claim 2, wherein: The thickness of the first electrode is 10-30 μm.

9. The HBC battery according to claim 8, wherein: A difference between the thickness of the first electrode and the thickness of the second electrode is less than or equal to 10 μm.

10. The HBC battery according to claim 1, wherein: The distance between the first electrode and the second electrode is 200-500 μm.

11. A battery assembly, characterized in that: The HBC battery comprises the HBC battery according to any one of claims 1 to 10.

12. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 11.

Images