Side wall tin-filling structure capable of improving detectability of packaged finished product

Abstract

A side wall upper tin soldering structure capable of improving the detectability of a packaged finished product comprises a plastic packaging part, a chip, a bonding wire, a substrate, a tin soldering part and a PCB, the plastic packaging part and the PCB are arranged on the upper side and the lower side of the substrate respectively, the chip is arranged on the substrate, one end of the bonding wire is connected to the chip, the other end of the bonding wire is connected to the substrate, and the tin soldering part is arranged on the substrate. The plastic package part is arranged on the substrate and covers the chip and the bonding wire, the outer side surface of the substrate is provided with a concave groove body, and the soldering tin part is arranged in the groove body and is electrically connected with the PCB and the chip. According to the utility model, the substrate is arranged to carry the chip, the side wall of the substrate is provided with the groove body to form a tin climbing height difference, a certain solder paste height is formed after welding, and welding inspection can be realized through the side wall; therefore, the problem of insufficient soldering at the bottom or undetectable open circuit of the existing QFN type package after welding can be solved, and automatic inspection can be realized. The device is high in practicability and has high popularization significance.

Description

Technical Field

[0001] The utility model relates to a carrier board, in particular to a side wall tinning structure which can improve the inspectability of packaged finished products. Background Art

[0002] QFN (Quad Flat No Leads) is becoming increasingly common in IC packaging within the electronics industry. Its advantages include its small size, comparable to CSP (Chip Scale Package), relatively low cost, higher IC production yield, and improved coplanarity and heat dissipation for high-speed and power management circuits. Furthermore, QFN packages eliminate the need for pins from all four sides, resulting in superior electrical performance compared to traditional packaged ICs like SO, which require multiple pins from the side.

[0003] However, the QFN's leadless design makes it difficult to determine solderability, including issues like insufficient solder, insufficient solder, or cold solder joints, based on the appearance of the solder joints. Furthermore, it can easily trap gases, leading to bubbles in the solder joints. Furthermore, while the QFN package still has solder pins on the sides, these are flat, and most are formed by cutting through the leaf frame to expose the cut surface. This poses the risk of copper leakage and oxidation directly on the sidewalls of the pins. Utility Model Content

[0004] Based on this, it is necessary to address the deficiencies in the prior art and provide a sidewall tin structure that solves at least one of the technical problems in the above-mentioned background technology and can improve the inspectability of the finished packaged product.

[0005] A sidewall tinning structure that can improve the inspectability of packaged finished products includes a plastic sealing portion, a chip, bonding wires, a substrate, a soldering portion, and a PCB. The plastic sealing portion and the PCB are respectively arranged on the upper and lower sides of the substrate. The chip is mounted on the substrate. One end of the bonding wire is connected to the chip and the other end is connected to the substrate. The plastic sealing portion is arranged on the substrate and covers the chip and the bonding wire. An inwardly concave groove is provided on the outer surface of the substrate. The soldering portion is arranged in the groove and electrically connected to the PCB and the chip.

[0006] Furthermore, the groove body passes through the bottom end surface of the base plate, the inner side of the groove body is arranged at an angle, and the groove body extends inwardly from top to bottom.

[0007] Furthermore, the substrate is provided with a top electrical connection layer, a middle electrical connection layer, a bottom electrical connection layer and a side electrical connection layer in sequence from top to bottom, and the side electrical connection layer is provided on the inner side of the groove body, and the bottom end of the side electrical connection layer is connected to the outer end of the bottom electrical connection layer, and the top end is connected to the outer end of the middle electrical connection layer.

[0008] Furthermore, the side electrical connection layer includes a top layer and an inclined connection layer, the top layer is arranged below the middle electrical connection layer, the upper end of the inclined connection layer is connected to the inner end of the top layer, and the lower end is connected to the outer end of the bottom electrical connection layer.

[0009] Furthermore, an electrical connection area is provided on the substrate, a welding PAD is provided on the top electrical connection layer of the electrical connection area, and the bonding wire is connected to the welding PAD; the welding PAD, the middle electrical connection layer and the bottom electrical connection layer of the electrical connection area are connected through conductive columns; and the side electrical connection layer is provided in the electrical connection area.

[0010] Furthermore, a heat dissipation area is provided on the substrate and is spaced apart from the electrical connection area. A heat dissipation PAD is provided on the top electrical connection layer of the heat dissipation area, and the chip is provided on the heat dissipation PAD; the heat dissipation PAD, the middle electrical connection layer, and the bottom electrical connection layer of the heat dissipation area are connected by heat dissipation columns.

[0011] Furthermore, the PCB is provided with a circuit layer corresponding to the electrical connection area and a heat dissipation layer corresponding to the heat dissipation area. The top of the circuit layer contacts the bottom electrical connection layer, and the bottom electrical connection layer of the heat dissipation area contacts the heat dissipation layer.

[0012] Furthermore, the bottom of the solder portion is arranged on the circuit layer of the PCB, the inner side and the top surface are attached to the side electrical connection layer; and the outer side is arranged to extend outwardly from top to bottom.

[0013] In summary, the present invention utilizes a substrate to support the chip, and grooves are provided on the sidewalls of the substrate to create a height difference for solder paste creepage. This ensures a certain solder paste height after soldering, enabling soldering inspection through the sidewalls. This solves the problem of undetectable bottom joints or open circuits in existing QFN packages after soldering, and enables automated inspection. The present invention is highly practical and has significant potential for widespread adoption. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a schematic structural diagram of a tin structure on the side wall of the utility model that can improve the inspectability of the packaged finished product;

[0015] Figure 2 for Figure 1 Schematic diagram of the structure of the middle substrate. DETAILED DESCRIPTION

[0016] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0017] like Figure 1 and Figure 2 As shown, it is a side wall tinning structure provided by the present invention that can improve the inspectability of the packaged finished product. The side wall tinning structure that can improve the inspectability of the packaged finished product includes a plastic sealing part 10, a chip 20, a bonding wire 30, a substrate 40, a soldering part 50 and a PCB 60. The chip 20 is mounted on the substrate 40, one end of the bonding wire 30 is connected to the chip 20, and the other end is connected to the substrate 40. The plastic sealing part 10 is arranged on the substrate 40 and covers the chip 20 and the bonding wire 30. A groove body 47 is provided on the outer surface of the substrate 40. The soldering part 50 is arranged in the groove body 47 and connected to the PCB 60 and the substrate 40.

[0018] The substrate 40 is provided with a top electrical connection layer 41, a middle electrical connection layer 42, a bottom electrical connection layer 43, and a side electrical connection layer 44 in order from top to bottom. The number of the middle electrical connection layer 42 can be multiple, and is not limited to one. The side electrical connection layer 44 is provided on the inner side of the groove body 47. The bottom end of the side electrical connection layer 44 is connected to the outer end of the bottom electrical connection layer 43, and the top end of the side electrical connection layer 44 is connected to the outer end of the middle electrical connection layer 42. In this embodiment, the side electrical connection layer 44 includes a top layer and an inclined connection layer. The top layer is provided below the middle electrical connection layer 42. The upper end of the inclined connection layer is connected to the inner end of the top layer, and the lower end of the inclined connection layer is connected to the outer end of the bottom electrical connection layer 43. The inclined connection layer is provided to extend gradually inward from top to bottom.

[0019] The substrate 40 is spaced apart from one another, with electrical connection areas 45 and heat dissipation areas 46 arranged on the top electrical connection layer 41 of the electrical connection area 45. The bonding wires 30 are connected to the solder pads 411. The solder pads 411, the middle electrical connection layer 42, and the bottom electrical connection layer 43 of the electrical connection area 45 are connected via conductive posts 451. The heat dissipation area 46 is provided with a heat dissipation pad 412 on the top electrical connection layer 41, and the chip 20 is mounted on the heat dissipation pad 412. The heat dissipation pad 412, the middle electrical connection layer 42, and the bottom electrical connection layer 43 of the heat dissipation area 46 are connected via heat dissipation posts 461. In this embodiment, the conductive posts 451 are formed by filling the holes with a metal material having good electrical conductivity, while the heat dissipation posts 461 are formed by filling the holes with a material having good thermal conductivity. In this embodiment, the side electrical connection layer 44 is provided in the electrical connection area 45.

[0020] The PCB 60 is mounted on the bottom surface of the substrate 40. It includes a circuit layer corresponding to the electrical connection area 45. A heat dissipation layer is also mounted corresponding to the heat dissipation area 46. The top of the circuit layer contacts the bottom electrical connection layer 43, and the bottom electrical connection layer 43 of the heat dissipation area 46 contacts the heat dissipation layer. The bottom of the soldering portion 50 is mounted on the circuit layer of the PCB 60, with the side and top surfaces attached to the side electrical connection layer 44. The inner portion of the soldering portion extends into the base, providing a high solder creep height. This portion is clearly visible to the outside, facilitating visual inspection and open circuit detection.

[0021] In summary, the present invention provides a substrate 40 to support the chip 20, and provides a groove 47 on the sidewall of the substrate 40 to form a height difference for solder paste creepage. This ensures a certain solder paste height after soldering, allowing soldering inspection to be performed through the sidewall. This solves the problem of undetectable bottom joints or open circuits in existing QFN packages after soldering, and enables automated inspection. The present invention is highly practical and has strong promotional significance.

[0022] The above-described embodiment merely represents one embodiment of the present invention. While the description is relatively specific and detailed, it should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A sidewall tinning structure capable of improving the inspectability of packaged finished products, characterized in that: It includes a plastic sealing part, a chip, a bonding wire, a substrate, a solder part and a PCB, the plastic sealing part and the PCB are respectively arranged on the upper and lower sides of the substrate, the chip is installed on the substrate, one end of the bonding wire is connected to the chip, and the other end is connected to the substrate, the plastic sealing part is arranged on the substrate and covers the chip and the bonding wire, an outer surface of the substrate is provided with a concave groove body, the solder part is arranged in the groove body and is electrically connected to the PCB and the chip; the groove body passes through the bottom end surface of the substrate, the inner side of the groove body is inclined, and it extends inwardly from top to bottom; the substrate is sequentially provided with a top electrical connection layer, a middle electrical connection layer, a bottom electrical connection layer and a side electrical connection layer from top to bottom, the side electrical connection layer is arranged on the inner side of the groove body, the bottom end of the side electrical connection layer is connected to the outer end of the bottom electrical connection layer, and the top end is connected to the outer end of the middle electrical connection layer.

2. The sidewall tinning structure capable of improving the inspectability of packaged finished products according to claim 1, characterized in that: The side electrical connection layer includes a top layer and an inclined connection layer. The top layer is arranged below the middle electrical connection layer. The upper end of the inclined connection layer is connected to the inner end of the top layer, and the lower end is connected to the outer end of the bottom electrical connection layer.

3. The sidewall tinning structure capable of improving the inspectability of finished packaged products according to claim 1, wherein: An electrical connection area is provided on the substrate, a welding PAD is provided on the top electrical connection layer of the electrical connection area, and the bonding wire is connected to the welding PAD; the welding PAD, the middle electrical connection layer and the bottom electrical connection layer of the electrical connection area are connected by conductive columns; the side electrical connection layer is provided in the electrical connection area.

4. The tin-on-sidewall structure for improving the inspectability of finished packaged products according to claim 3, wherein: A heat dissipation area is also provided on the substrate, which is spaced apart from the electrical connection area. A heat dissipation PAD is provided on the top electrical connection layer of the heat dissipation area, and the chip is provided on the heat dissipation PAD; the heat dissipation PAD, the middle electrical connection layer, and the bottom electrical connection layer of the heat dissipation area are connected by heat dissipation columns.

5. The tin-on-sidewall structure for improving the inspectability of finished packaged products according to claim 4, wherein: The PCB is provided with a circuit layer corresponding to the electrical connection area and a heat dissipation layer corresponding to the heat dissipation area. The top of the circuit layer contacts the bottom electrical connection layer, and the bottom electrical connection layer of the heat dissipation area contacts the heat dissipation layer.

6. The tin-on-sidewall structure for improving the inspectability of finished packaged products according to claim 5, wherein: The bottom of the solder portion is arranged on the circuit layer of the PCB, the inner side surface and the top surface are attached to the side electrical connection layer; and the outer side is arranged to extend outwardly from top to bottom.

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