Optoelectronic device

Abstract

The present disclosure relates to an optoelectronic device comprising an assembly of pixels wherein a first pixel generates an event-based data element and a second pixel generates a light intensity data element. Each of the first and second pixels includes a portion of the layer that forms a photodiode. The first integrated circuit chip includes a first substrate and a first interconnection network, and the second integrated circuit chip includes a second substrate and a second interconnection network. The first integrated circuit chip and the second integrated circuit chip are attached to each other through the first interconnection network and the second interconnection network. The layer having the photodiode is located on a first surface of the second substrate opposite a second surface of the second substrate having the second interconnect network thereon.

Description

[0001] Priority claim

[0002] This application claims the priority benefit of French Patent Application No. 23 10461 filed on September 29, 2023, the contents of which are hereby incorporated by reference in their entirety to the maximum extent permitted by law. TECHNICAL FIELD

[0003] The present disclosure relates generally to electronic devices, and more particularly to optoelectronic devices. BACKGROUND

[0004] Like a standard camera, an event-based camera comprises a plurality of pixels, each pixel being configured to deliver a value corresponding to a position in an observed scene. However, contrary to a standard camera, i.e. a camera having each of its pixels configured to deliver periodically a light intensity value corresponding to this position, an event-based camera is configured to deliver information indicative of a change in light intensity. An event-based camera is thus configured to deliver an event-based image of the scene. A standard camera is thus configured to deliver a light intensity image of the scene. A standard camera is therefore a synchronous camera, enabling to obtain a series of images comprising as many intensity values as pixels at a frame frequency. An event-based camera is a synchronous camera or an asynchronous camera, providing for each pixel information indicative of a change in luminosity of the corresponding position in the scene. When the scene is static, a standard camera keeps delivering all intensity values periodically, whereas an event-based camera does not deliver values, thereby indicating a lack of change.

[0005] There is a need in the art to overcome all or part of the drawbacks of known optoelectronic devices. SUMMARY

[0006] In an embodiment, the optoelectronic device comprises at least one pixel assembly comprising at least a first pixel and at least a second pixel, the first pixel generating an event-based data element, the second pixel generating a light intensity data element, each first and second pixel comprising a portion of a layer, said portion forming a photodiode, the optoelectronic device further comprising a first integrated circuit chip and a second integrated circuit chip, the first integrated circuit chip comprising a first substrate and a first interconnection network, the second integrated circuit chip comprising a second substrate and a second interconnection network, the first and second integrated circuit chips being attached to each other by their first and second interconnection networks, the layer being located on a first surface of the second substrate, the first surface being opposite to a second surface of the second substrate having the second interconnection network located thereon.

[0007] According to an embodiment, the optoelectronic device is an event-based camera.

[0008] According to an embodiment, the first integrated circuit chip comprises at least a portion of control circuitry of at least the first pixel, and the second integrated circuit chip comprises at least control circuitry of at least the second pixel.

[0009] According to an embodiment, at least a portion of control circuitry of at least the first pixel is in the second integrated circuit chip.

[0010] According to an embodiment, the first integrated circuit chip and the second integrated circuit chip are attached by molecular bonds.

[0011] According to an embodiment, the optoelectronic device comprises an assembly of a plurality of pixels arranged in an array.

[0012] According to an embodiment, each assembly comprises four second pixels surrounding a first pixel.

[0013] According to an embodiment, each assembly comprises eight second pixels surrounding a first pixel.

[0014] According to an embodiment, each assembly comprises three second pixels and one first pixel arranged in an array.

[0015] According to an embodiment, the layer is continuous.

[0016] According to an embodiment, the layer completely covers the first surface of the second substrate.

[0017] According to an embodiment, the material of the layer is homogeneous.

[0018] According to an embodiment, the layer is in contact with the second substrate.

[0019] According to an embodiment, the layer is a layer of quantum dots or colloidal quantum dots.

[0020] According to an embodiment, the layer is made of a lead-based or tin-based photoactive perovskite material, or of a bulk heterojunction formed of a photoactive organic semiconductor.

[0021] In an embodiment, the optoelectronic device comprises:

[0022] an assembly of pixels, wherein the assembly of pixels comprises:

[0023] a first pixel configured to generate event-based data elements, and

[0024] a second pixel configured to generate light intensity data elements,

[0025] each first pixel and second pixel comprises a portion of a layer, the portion forming a photodiode;

[0026] a first integrated circuit chip comprising a first substrate and a first interconnection network;

[0027] a second integrated circuit chip comprising a second substrate and a second interconnect network;

[0028] wherein the first integrated circuit chip and the second integrated circuit chip are attached to each other through the first interconnect network and the second interconnect network; and

[0029] wherein the layer is on a first surface of the second substrate, the first surface being opposite to a second surface of the second substrate having the second interconnect network located thereon.

[0030] According to an embodiment, the optoelectronic device is an event-based camera.

[0031] According to an embodiment, wherein the first integrated circuit chip comprises at least a portion of control circuitry of the first pixel; and

[0032] wherein the second integrated circuit chip comprises control circuitry of the second pixel.

[0033] According to an embodiment, another portion of control circuitry of the first pixel is in the second integrated circuit chip.

[0034] According to an embodiment, the first integrated circuit chip and the second integrated circuit chip are attached at the first interconnect network and the second interconnect network through molecular bonds.

[0035] According to an embodiment, the optoelectronic device comprises an assembly of a plurality of pixels arranged in an array.

[0036] According to an embodiment, the assembly of each pixel comprises four second pixels surrounding one first pixel.

[0037] According to an embodiment, the assembly of each pixel comprises eight second pixels surrounding one first pixel.

[0038] According to an embodiment, the assembly of each pixel comprises three second pixels and one first pixel arranged in an array.

[0039] According to an embodiment, the layer is continuous.

[0040] According to an embodiment, the layer completely covers the first face of the second substrate.

[0041] According to an embodiment, the material of the layer is homogeneous.

[0042] According to an embodiment, the layer is in contact with the second substrate.

[0043] According to an embodiment, the layer is made of quantum dots.

[0044] According to an embodiment, the layer is made of colloidal quantum dots.

[0045] According to an embodiment, the layer is made of a light-sensitive perovskite material based on one of lead or tin.

[0046] According to an embodiment, the layer is made of a bulk heterojunction formed of a light-sensitive organic semiconductor. BRIEF DESCRIPTION OF DRAWINGS

[0047] The above features and advantages and other will be described in detail with reference to the drawings, which are presented as illustrative and not restrictive, in the disclosure of specific embodiments given below, wherein:

[0048] Figure 1 a cross-sectional view of an embodiment of an optoelectronic device is shown;

[0049] Figure 2 a perspective view of an embodiment of Figure 1

[0050] Figure 3 a schematic of a pixel control circuit is shown;

[0051] Figure 4A an alternative arrangement of a pixel assembly is shown; and

[0052] Figure 4B another alternative arrangement of a pixel assembly is shown. DETAILED DESCRIPTION

[0053] In the various figures, similar features have been indicated by similar reference signs. In particular, structural and / or functional features that are common among the various embodiments can have the same reference signs and can be provided with the same structural, dimensional and material properties.

[0054] For the sake of clarity, only the steps and elements useful for the understanding of the embodiments have been described and illustrated in detail.

[0055] Unless otherwise indicated, when referring to two elements connected together, this means a direct connection without any intermediate element other than a conductor, and when referring to two elements coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0056] ​In the following description, when referring to terms defining an absolute position, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or to terms defining a relative position, such as the terms "above", "below", "on top of", "on the bottom of", etc., or to terms defining a direction, such as the terms "horizontal", "vertical", etc., it refers to the orientation of the figures, unless otherwise specifically stated.

[0057] Unless otherwise specifically stated, the expressions "about", "approximately", "substantially" and "in the order of" mean plus or minus 10%, preferably plus or minus 5%.

[0058] Figure 1 A cross-sectional view of an embodiment of an optoelectronic device is shown. Figure 2 A perspective view of an embodiment of the device of Figure 1 is shown. More particularly, Figure 1 A cross-sectional view of the device of Figure 2 along the plane A-A is shown.

[0059] Figure 1 and Figure 2 An assembly 10 of pixels of an optoelectronic device is shown. The assembly 10 for example corresponds to a portion of an image capturing device, for example a camera. The assembly 10 comprises at least one pixel 12 and at least one pixel 14. More particularly, the assembly 10 comprises at least one event-based camera pixel 12 and at least one standard camera pixel 14. The pixel 14 is for example a "global shutter" type of pixel, or a "rolling shutter" type of pixel. The assembly 10 thus enables to obtain event-based data and standard luminance data. The camera is thus an event-based camera, or a neuromorphic camera.

[0060] In the example of Figure 1 and Figure 2 , the assembly 10 comprises only one pixel 14 and four pixels 12. The pixel 14 is surrounded by the pixels 12. The device, i.e. for example the camera, comprises a plurality of assemblies 10, preferably arranged in an array.

[0061] The device comprises a first integrated circuit chip 16 and a second integrated circuit chip 18. The first integrated circuit chip 16 comprises a semiconductor substrate 20 and an interconnection network 22. The substrate 20 comprises an upper surface 20a and a lower surface 20b. Similarly, the interconnection network comprises an upper surface 22a and a lower surface 22b. The interconnection network 22 is bonded to the substrate 20. More particularly, the lower surface 22b of the interconnection network 22 is bonded to the upper surface 20a of the substrate 20.

[0062] The substrate 20 is for example made of silicon. In the example of Figure 1 and Figure 2Electronic components not shown in Fig. 1 are formed on the inside and top of the substrate 20. For example, the electronic components are formed on the upper surface of the substrate 20.

[0063] The substrate 20 comprises at least part of the control circuitry of the pixels 14. In other words, at least part of the electronic components forming the control circuitry of the pixels 14 are located on the inside and top of the substrate 20. For example, the substrate comprises a synchronous or asynchronous readout circuitry, amplifiers, logic circuitry and memory cells of the pixels 14. Certain components can be common to a plurality of pixels.

[0064] The interconnect network 22 comprises a stack of insulating layers, metal tracks 24 located in the insulating layers and electrically conductive vias 26 located in the insulating layers and coupling the electrically conductive tracks together. The lower layers of the stack of insulating layers are located in contact with the substrate 20 and in particular the upper surface of the substrate 20. The upper layers of the stack, i.e. the insulating layers of the interconnect network that are farthest away from the substrate 20, comprise for example metal tracks 28. The tracks 28 are flush with the upper surface 22a of the interconnect network.

[0065] Similarly, the second integrated circuit chip 18 comprises a semiconductor substrate 28 and an interconnect network 30. The substrate 28 comprises an upper surface 28a and a lower surface 28b. Similarly, the interconnect network comprises an upper surface 30a and a lower surface 30b. The interconnect network 30 is bonded to the substrate 28. More specifically, the lower surface 30b of the interconnect network 30 is bonded to the upper surface 28a of the substrate 28.

[0066] The substrate 28 is for example made of silicon. In Figure 1 and Figure 2 Electronic components not shown in Fig. 1 are formed on the inside and top of the substrate 20. For example, the electronic components are formed on the upper surface of the substrate 20.

[0067] The substrate 28 comprises (preferably entirely) the control circuitry of the pixels 12. In particular, the substrate 28 preferably comprises the readout circuitry of the pixels 12. The substrate 28 comprises for example part of the control circuitry of the pixels 14.

[0068] The interconnect network 30 comprises a stack of insulating layers, metal tracks 32 located in the insulating layers and electrically conductive vias 34 located in the insulating layers and coupling the electrically conductive tracks together. The lower layers of the stack of insulating layers are located in contact with the substrate 28 and in particular the upper surface of the substrate 28. The upper layers of the stack, i.e. the insulating layers of the interconnect network that are farthest away from the substrate 28, comprise for example metal tracks 36. The tracks 36 are flush with the upper surface 30a of the interconnect network.

[0069] The chips 16 and 18 are attached to each other. More specifically, the networks 22 and 30 are attached to each other. More specifically, the upper surface 22a of the network 22 and the upper surface 30a of the network 30 are attached to each other. In Figure 1 and Figure 2In the example of Figure 1, the chips 16 and 18 are attached by molecular bonds. Thus, the tracks 28 and 36 are placed so as to be in contact with each other. Alternatively, the chips 16 and 18, more particularly the upper surfaces 22a and 30a, can be attached in another way, for example by solder balls, for example between the tracks 28 and 36.

[0070] The chips 16 and 18 are thus electrically coupled. In other words, the substrates 20 and 28 are electrically coupled by way of the via 26, the track 24, the track 28, the track 36, the track 32 and the via 34.

[0071] The assembly 10 also comprises a layer 40. The layer 40 comprises, for example, quantum dots (QD). The layer 40 comprises, for example, colloidal quantum dots (CQD). Alternatively, the layer 40 can be made of a lead-based or tin-based photoactive perovskite material. In other words, the layer 40 is made of, for example, a material of the type having the formula ABX3, where the element A is among the following elements: methylammonium, formamidinium or cesium, where the element B is among the following elements: lead or tin, and where the element X is a halide, i.e. an element among the following elements: iodine, chlorine or bromine. The quantum dots of the layer 40 can be made of a perovskite, for example of a lead-based or tin-based photoactive perovskite as previously described, or passivated with a lead-based or tin-based photoactive perovskite. The layer 40 can also be a bulk heterojunction formed of a photoactive organic semiconductor such as PDPP3T and fullerene. The layer 40 is located on the chip 18, more particularly on the substrate 28, more particularly on the lower surface 28b of the substrate 28. The layer 40 is, for example, in contact with at least a portion of the substrate 28. In other words, the layer 40 and the substrate 28 are not separated by an interconnection network.

[0072] The layer 40 is a continuous layer. The layer 40 preferably entirely covers the surface 28b. In other words, the layer 40 preferably does not comprise openings exposing the surface 28b. The layer 40 is common to the assembly 10 of pixels. Preferably, the layer 40 is common to all the pixels of the device.

[0073] The layer 40 comprises quantum dots. The quantum dots of the layer 40 are, for example, located in a layer made of a material other than a semiconductor material, for example made of an electrically insulating material, for example made of a resin.

[0074] By quantum dot, it is meant that each quantum dot is confined in all dimensions, i.e. in the three dimensions of space, by quantum effects. Each quantum dot thus preferably has, in all directions, a size on the order of tens of nanometres, in other words less than 100 nm, preferably in the range from 2 nm to 15 nm.

[0075] Each quantum dot comprises a core made of a semiconductor material (e.g., lead sulfide). The core preferably has dimensions on the order of tens of nanometers in all directions, in other words, less than 100 nm. Each quantum dot also includes a ligand extending from the core. The ligand is preferably made of an organic aliphatic molecule or a metal-organic or inorganic molecule.

[0076] Due to their net charge and their dipole moment, the ligands modify the effective doping of the quantum dot layer and its electron affinity. For example, the ligands of the quantum dots of layer 40 may be molecules that act as N-type dopants, for example organic molecules such as thiolates.

[0077] Layer 40 forms a photodiode. In other words, when light at the operating wavelength of layer 40 is absorbed by layer 40, depending on the quantum dots, layer 40 generates electric charges in the layer.

[0078] The material forming the quantum dots and the dimensions of each quantum dot (particularly the size of the semiconductor core) determine the quantum dot's absorption wavelength, i.e., the photodiode's operating wavelength. For example, the operating wavelength corresponds to the near-infrared, i.e., a wavelength in the range of 700 nm to 1.6 mm. It can also correspond to the mid-infrared, i.e., a wavelength in the range of 1.6 μm to 4 μm, or to the visible light range, i.e., a wavelength in the range of 300 nm to 700 nm.

[0079] It is possible to select an operating wavelength within a wider wavelength range than is possible for a standard photodiode (i.e., a photodiode that does not include a quantum dot layer). In fact, a quantum dot layer has an absorption curve with a peak that is prominently located at a wavelength that depends on the material of the quantum dots and can be any wavelength within a wavelength range that includes at least wavelengths from 300 nm to 4 μm.

[0080] For example, layer 40 includes a single type of quantum dots. In other words, all quantum dots in layer 40 have cores made of the same material and ligands made of the same material, for example. Preferably, layer 40 is homogeneous. In other words, the composition of layer 40 is preferably the same throughout layer 40.

[0081] Layer 40 includes distinct regions 42, 44. Each pixel 14 includes region 44. Each pixel 12 includes region 42. Each region 42 is a portion of layer 40 that generates charge for a corresponding pixel 12. Similarly, each region 44 is a portion of layer 40 that generates charge for a corresponding pixel 14.

[0082] Each pixel comprises for example a mechanism for attracting the charge generated in the whole area. For example, each pixel comprises a first layer, called electrode, for extracting electrons, respectively holes (not shown), in contact with the lower surface of the layer 40. Each pixel comprises for example a second layer, called electrode, for extracting holes, respectively electrons, in contact with the upper surface of the layer 40. The second extraction layer is transparent for the operating wavelength of the pixel it covers. The first and second extraction layers are for example made of doped silicon, for example formed by a doped region of the substrate 28 in the case of the first layer, or of metal oxide, for example of TiO x , ZnO, AZO, IGZO, M0O x , CoO, CuO x NiO x For example, each pixel comprises a mechanism for attracting the charge towards the circuit located in the substrates 20 and 28 corresponding to said pixel.

[0083] Thus, during the operation of the device, charges are generated in the whole layer 40. The charges located in each area 42, 44 are attracted by said mechanism towards the circuit corresponding to the pixel associated with the area 42, 44.

[0084] The areas 42 have for example a rectangular shape, preferably square, with a tapered angle. The tapered angles of the four areas 42 face the same point, i.e. the center of the assembly, so that the part of the layer 40 between the tapered angles, located at the center of the assembly, forms the area 44. Thus, an area 42 comprises, in the same row of pixels, two parallel sides, one shorter than the other, the short sides being in contact with each other. Similarly, an area 42 comprises, in the same column of pixels, i.e. in a direction perpendicular to the row direction, two parallel sides, one shorter than the other, the short sides being in contact with each other. Each area 42 also comprises a side coupling the shorter sides of said area 42, said side corresponding to a side of the area 44. The area 44 is thus quadrangular in top view. Thus, the area 44 is completely surrounded by the areas 42.

[0085] The assembly 10 is for example arranged in an array in the device. Preferably, each assembly 10 comprises pixels separate from the pixels of the other assemblies. Thus, each pixel 14 is for example separated from a pixel 14 of another assembly by the pixels 12 of two assemblies 10.

[0086] In an operating mode of the device, the pixels can be operated in a non-simultaneous way to be able to generate at different times an event-based image and a light intensity image. When only an event-based image is generated, only the event-based sensors are operated and then all the charges are collected by the charge extraction layers located in the corresponding pixels. This is allowed by the continuity of the layer 40, etc. This makes it possible to improve the sensitivity and speed of the event-based sensors without losing spatial and spectral aliasing information.

[0087] In another mode of operation, the event-based sensors are turned off and the charge generated by the light in the event-based pixels is distributed between the adjacent pixels.

[0088] In another mode of operation, both types of sensors can also be operated simultaneously, the electric field generated by each electrode allowing charge collection without electrical cross-talk between pixels.

[0089] Figure 3 An example of a pixel control circuit is shown. More specifically, Figure 3 The pixel 12 as well as the pixel 14 are schematically shown.

[0090] The pixel 12 comprises a photodiode 50. The photodiode 50 corresponds to a portion 42 of the layer 40 associated with said pixel 12. The photodiode 50 comprises a terminal, e.g. a cathode, coupled, preferably connected, to a node applying a bias voltage Vbias, e.g. via a doped well of the substrate 28 of the chip 18.

[0091] The pixel 12 further comprises a control circuit of the pixel 12. The control circuit of the pixel 12 comprises a control circuit 52 (RS / GS) of the photodiode 50. Each photodiode 50, i.e. each pixel 12, e.g. comprises a circuit 52. The circuit 52 is located in the substrate 28, preferably entirely in the substrate 28. The pixel photodiode 50 is coupled, preferably connected, to the circuit 52.

[0092] The circuit 54 is located in the substrate 28. The circuit 54 is an analog-to-digital converter (ADC). The circuit 54 is preferably entirely in the substrate 28. The circuit 54 is e.g. common to a plurality of pixels 12, e.g. to all pixels 12 of the assembly 10, e.g. to only the pixels 12 of the assembly 10. The circuit 54 is e.g. coupled, preferably connected, to the circuit 52.

[0093] The circuit 56 is located in the substrate 28. The circuit 56 is a pixel read-out (RO) circuit, e.g. a read-out circuit of the assembly 10. The circuit 56 is preferably entirely in the substrate 28. The circuit 56 is e.g. common to a plurality of pixels 12, e.g. to all pixels 12 of the assembly 10, e.g. to only the pixels 12 of the assembly 10. The circuit 56 is e.g. coupled, preferably connected, to the circuit 54. The circuit 56 delivers on an output 58 a value representative of the brightness of one or more pixels 12, e.g. of the pixels 12 of the assembly 10.

[0094] The pixel 14 comprises a photodiode 60. The photodiode 60 corresponds to a portion 44 of the layer 40 associated with said pixel 14. The photodiode 60 comprises a terminal, e.g. a cathode, coupled, preferably connected, to a node applying a bias voltage Vbias, e.g. via a doped well of the substrate 28 of the chip 18.

[0095] The pixel 14 comprises a control circuit of the pixel 14. The control circuit of the pixel 14 comprises for example a circuit (log) 62 with a function applying a logarithm to a value obtained by the photodiode 60. The circuit 62 is for example coupled, preferably connected, to the anode of the photodiode 60. The circuit 62 is for example located in the substrate 28, preferably entirely in the substrate 28.

[0096] The pixel 14 comprises a circuit (SF) 64. The circuit 64 is an amplifier, for example of the common-drain type, comprising for example a source-follower circuit. The circuit 64 is for example coupled, preferably connected, to the circuit 62. The circuit 64 is for example located in the substrate 28, preferably entirely in the substrate 28.

[0097] The control circuit of the pixel 14 further comprises other components located in the substrate 20. The control circuit of the pixel 14 comprises for example an amplifier (A) 66 coupled, preferably connected, to the circuit 64. The control circuit of the pixel 14 further comprises a logic circuit 68, for example a high-pass filter, associated with a memory 70. The circuit 68 is coupled, preferably connected, to the amplifier 66 to receive as input the signal amplified by the amplifier 66. The memory circuit (MEM) 70 is configured to contain a value obtained by the logic circuit 68.

[0098] Similarly, the control circuit of the pixel 14 comprises another logic circuit 72, for example a high-pass filter, associated with a memory circuit (MEM) 74. The circuit 72 is coupled, preferably connected, to the amplifier 66 to receive as input the signal amplified by the amplifier 66. The memory 74 is configured to contain a value obtained by the logic circuit 72.

[0099] According to an embodiment, the amplifier 66 is for example configured to be able to be reset, the reset depending on for example the output values of the circuits 68 and 72. For example, the pixel 14 can comprise a logic circuit (not shown), for example an OR gate. Said logic circuit is for example in the first integrated circuit chip 16. Said logic circuit comprises for example an input coupled, preferably connected, to the output of the circuit 68, another input coupled, preferably connected, to the output of the circuit 72, and an output coupled, preferably connected, to an input of the amplifier 66. For example, when this logic circuit (not explicitly shown) delivers a first binary value, the amplifier 66 is reset.

[0100] The pixel 14 further comprises a data processing circuit (DP) 76 and a read-out circuit (RO) 78. The circuit 76 is for example coupled, preferably connected, to the memories 70 and 74, and the circuit 78 is for example coupled, preferably connected, to the circuit 76. The circuits 76 and 78 are for example common to a plurality of pixels 14.

[0101] Thus, the substrate 28 comprises the control circuit of the pixel 12, preferably the entire control circuit of the pixel 12. The substrate 20 preferably does not comprise components of the control circuit of the pixel 12. The substrate 20 comprises at least part of the control circuit of the pixel 14. The substrate 28 can for example comprise part of the control circuit of the pixel 14. The components of the control circuit that are located in different substrates are coupled to each other by the interconnection networks 22 and 30. In particular, the components of the control circuit of the pixel 14 that are located on the substrates 20 and 28 are coupled together by the interconnection networks 22 and 30.

[0102] Figure 4A An alternative arrangement of pixel assemblies is shown. More specifically, Figure 4A A top view of the layer 40 of an assembly of pixels 12 and 14, such as Figure 1 and Figure 2 is shown.

[0103] In the example of Figure 4A , a pixel assembly comprises one pixel 14 and three pixels 12, the pixels being arranged in an array. The assembly thus comprises two columns of pixels 12 and one column comprising one pixel 14 and one pixel 12.

[0104] The pixel assembly is for example arranged in an array with other identical assemblies. Each pixel 14 is thus surrounded by pixels 12 of the assembly and of the assemblies in the vicinity.

[0105] Figure 4B Another alternative arrangement of pixel assemblies is shown. More specifically, Figure 4B A top view of the layer 40 of an assembly of pixels 12 and 14, such as Figure 1 and Figure 2 is shown.

[0106] In the example of Figure 4B , a pixel assembly comprises one pixel 14 and eight pixels 12, the pixels being arranged in an array. The assembly thus comprises two columns of three pixels 12 and one column comprising one pixel 14 and two pixels 12, in such a way that the pixel 14 is surrounded by pixels 12.

[0107] The pixel assembly is for example arranged in an array with other identical assemblies. Each pixel 14 is thus separated from the pixels 14 in the vicinity by at least two pixels 12.

[0108] An advantage of the described embodiments is that the size of the pixels is not limited by the distance required by the via manufacturing method, as is the case in arrangements in which the photodiodes are coupled to the substrate by an interconnection network.

[0109] Another advantage of the described embodiments is that the control circuit, which is divided over multiple chips, enables the pixels to be closer to each other.

[0110] Another advantage of the previously described embodiments is that the device can deliver event-based images and light intensity images, for example non-simultaneously, the event-based pixels and the standard pixels are independently readable.

[0111] Another advantage of the described embodiments is that it is possible to form a full screen by the use of the quantum dot layer. In other words, the electric charge can be generated on the entire surface of the screen. There is no area between the pixels that cannot generate electric charge.

[0112] Another advantage of the described embodiments is that the range of possible wavelengths is more significant depending on the choice of quantum dots.

[0113] Various embodiments and variants have been described. The person skilled in the art will understand that certain features of these various embodiments and variants can be combined and that other variants will occur to the person skilled in the art.

[0114] Finally, the actual implementation of the described embodiments and variants is within the capabilities of the person skilled in the art, based on the indications of the functions given above.

Claims

1. An optoelectronic device, characterized in that: The optoelectronic device comprises: A component of a pixel, wherein the component of the pixel comprises: a first pixel configured to generate a data element based on the event, and a second pixel configured to generate a light intensity data element, Each of the first and second pixels includes a portion of a layer, the portion forming a photodiode; a first integrated circuit chip comprising a first substrate and a first interconnect network; a second integrated circuit chip comprising a second substrate and a second interconnect network; wherein the first integrated circuit chip and the second integrated circuit chip are attached to each other via the first interconnect network and the second interconnect network; and The layer is located on a first surface of the second substrate, the first surface being opposite a second surface of the second substrate having a second interconnect network located thereon.

2. The optoelectronic device according to claim 1, wherein The optoelectronic device is an event-based camera.

3. The optoelectronic device according to claim 1, wherein: wherein the first integrated circuit chip includes at least a portion of a control circuit for the first pixel; and The second integrated circuit chip includes a control circuit for the second pixel.

4. The optoelectronic device according to claim 3, wherein: Another portion of the control circuit of the first pixel is in the second integrated circuit chip.

5. The optoelectronic device according to claim 1, wherein The first integrated circuit chip and the second integrated circuit chip are attached at the first interconnection network and the second interconnection network by molecular bonds. The optoelectronic device according to claim 1 , wherein: The optoelectronic device includes an assembly of a plurality of pixels arranged in an array.

7. The optoelectronic device according to claim 6, wherein: Each pixel component includes four second pixels surrounding one first pixel.

8. The optoelectronic device according to claim 6, wherein: Each pixel assembly includes eight second pixels surrounding one first pixel.

9. The optoelectronic device according to claim 6, wherein: The components of each pixel include three second pixels and one first pixel arranged in an array.

10. The optoelectronic device according to claim 1, wherein The layer is continuous.

11. The optoelectronic device according to claim 1, wherein The layer completely covers the first side of the second substrate.

12. The optoelectronic device according to claim 1, wherein The material of the layer is homogeneous.

13. The optoelectronic device according to claim 1, wherein The layer is in contact with the second substrate.

14. The optoelectronic device according to claim 1, wherein The layer is made of quantum dots.

15. The optoelectronic device according to claim 1, wherein The layer is made of colloidal quantum dots.

16. The optoelectronic device according to claim 1, wherein The layer is made of a photosensitive perovskite material based on one of lead or tin.

17. The optoelectronic device according to claim 1, wherein The layer is made of a bulk heterojunction formed from a photosensitive organic semiconductor.

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