Integrated package and semiconductor device

Abstract

An integrated package and a semiconductor device are provided. The semiconductor device includes an optical die, a laser die and an interposer. The optical die has a photonic integrated circuit (PIC), an electronic integrated circuit (EIC), and one or more first coupling waveguides. The laser crystal grain is provided with at least one laser diode and one or more second coupling waveguides. The optical die and the laser chip are bonded to the first side of the interposer using metal-to-metal bonding, wherein at least one of the one or more first coupled waveguides is optically aligned with at least one of the one or more second coupled waveguides. The optical cement fills a gap between the at least one of the aligned one or more first coupling waveguides and the at least one of the aligned one or more second coupling waveguides.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to an integrated package and a method of forming the same, and a semiconductor device, and more particularly to an improved integrated package, a method of forming the same, and an integrated optical chip package. BACKGROUND

[0002] Electrical signals and processing is a technology of signal transmission and processing. In recent years, optical signals and processing are used in more and more applications, particularly due to the use of fiber related applications for signal transmission.

[0003] Optical signals and processing are typically combined with electrical signals and processing to provide mature applications. For example, optical fibers can be used for long distance signal transmission, while electrical signals can be used for short distance signal transmission as well as processing and control. Accordingly, devices are formed that integrate long distance optical components and short distance electrical components for conversion between optical signals and electrical signals as well as processing of optical signals and electrical signals. Thus, a package can include optical (photonic) dies including optical devices and electronic dies including electronic devices.

[0004] Maintaining alignment between optical components held within a semiconductor device is particularly advantageous for efficient and high quality transmission of optical energy. However, known manufacturing methods can result in misalignment due to relative motion between components in the manufacturing process. SUMMARY

[0005] In some embodiments, an integrated package is provided. The integrated package includes an optical die, a laser die, an interposer, and an optical glue. The optical die includes a photonic integrated circuit, an electronic integrated circuit, and one or more first coupling waveguides. The laser die includes at least one laser diode and one or more second coupling waveguides. The optical die is bonded to a first side of the interposer using metal-to-metal bonding, the laser die is bonded to the first side of the interposer using metal-to-metal bonding, and at least one of the one or more first coupling waveguides is optically aligned with at least one of the one or more second coupling waveguides. The optical glue fills a gap between the at least one of the one or more first coupling waveguides and the at least one of the one or more second coupling waveguides.

[0006] In some embodiments, a package agent is also included, wherein the package agent covers the interposer and surrounds the optical die, the laser die, and the optical glue.

[0007] In some embodiments, a redistribution structure is also included on a second side of the interposer opposite the first side, wherein the redistribution structure includes one or more dielectric layers and one or more metallization layers, and wherein the one or more metallization layers electrically connect the interposer to external connectors.

[0008] In some embodiments, further comprising a silicon substrate attached to a second side of the interposer opposite the first side, wherein the silicon substrate includes through-silicon vias (TSVs) that pass through the silicon substrate and electrically connect the interposer to a plurality of external connectors.

[0009] In some embodiments, at least two sidewalls of the optical die include a first substantially straight portion closest to the interposer, a second substantially straight portion farthest from the interposer, and a third portion between the first and second portions, and the third portion is tapered;

[0010] wherein the at least two sidewalls are on two sides of the optical die, and wherein at least one of the at least two sidewalls intersects at least one of the one or more first coupling waveguides that is in optical alignment with the at least one of the one or more second coupling waveguides; and

[0011] wherein a first width of the optical die between the first portions of the at least two sidewalls is greater than a second width of the optical die between the second portions of the at least two sidewalls.

[0012] In some embodiments, the third portion is tapered to form an arcuate concave profile in the sidewall of the optical die between the first and second portions of the sidewall.

[0013] In some embodiments, the optical die and the laser die are horizontally spaced apart between 5um and 100um on the interposer, and wherein each of the optical die and the laser die is bonded to the interposer using a dielectric-to-dielectric bonding.

[0014] In some embodiments, a semiconductor device is provided. The semiconductor device includes one or more integrated packages, where each integrated package includes an optical die, a laser die, a mediator, and an optical glue. The optical die includes one or more photonic integrated circuits, one or more first coupling waveguides optically connected to at least one of the one or more photonic integrated circuits, and a first bonding layer including a first dielectric and a first metallization layer formed using a damascene or dual damascene process. The laser die includes at least one laser diode, one or more second coupling waveguides, and a second bonding layer including a second dielectric and a second metallization layer formed using a damascene or dual damascene process, and where at least one of the one or more second coupling waveguides is optically connected to the laser diode. The mediator includes a third bonding layer including a third dielectric and a third metallization layer. The first bonding layer of the optical die is bonded to the third bonding layer of the mediator using metal-to-metal bonding, where the second bonding layer of the laser die is bonded to the third bonding layer of the mediator using metal-to-metal bonding, and where at least one of the one or more first coupling waveguides is optically aligned with at least one of the one or more second coupling waveguides. The optical glue fills a gap between the at least one of the one or more first coupling waveguides and the at least one of the one or more second coupling waveguides that are aligned to serve as an optical transmission medium between the optical die and the laser die.

[0015] In some embodiments, each of the first bonding layer of the optical die and the second bonding layer of the laser die is further bonded to the third bonding layer of the mediator using dielectric-to-dielectric bonding, where the one or more integrated packages further includes a package agent, where the package agent covers the mediator and surrounds the optical die, the laser die, and the optical glue, and where the package agent is in contact with at least one sidewall of the optical die, at least one sidewall of the laser die, and a top portion of the optical glue.

[0016] In some embodiments, the one or more integrated packages further includes a redistribution structure attached to a second side of the mediator opposite the third bonding layer, where the redistribution structure includes one or more dielectric layers and one or more metallization layers, and where the one or more metallization layers electrically connect the mediator to a plurality of external connectors. BRIEF DESCRIPTION OF DRAWINGS

[0017] The embodiments of the present application will be best understood by reference to the following detailed description of the embodiments when read in conjunction with the accompanying drawings. It is to be noted, however, that the various components of the embodiments have not necessarily been drawn to scale in order to illustrate a particular embodiment more clearly. In fact, the dimensions of the various components can be arbitrarily increased or decreased for clarity. It is also to be understood that the specific devices and locations used are intended to be illustrative only and that other devices and locations could be used.

[0018] Figure 1 FIG. 1 shows a first integrated package with embedded laser die and compact universal photonic engine (COUPE) die according to some embodiments.

[0019] Figure 2 , 3A FIGS. 3B, 4A-D, 5A, 5B, 6A, 6B, 7, 8, 9 show formation and preparation of a COUPE die for integration into a first optical package according to some embodiments.

[0020] Figure 10 , 11 FIGS. 12A-D, 13A-D, 14 show formation and preparation of a laser die for integration into a first optical package according to some embodiments.

[0021] Figure 15 , 16 FIGS. 17, 18A, 18B, 19A, 19B show joining of a COUPE die and a laser die onto an interposer and uniting of its cells into a first integrated package according to some embodiments.

[0022] Figure 20A , 20B FIG. 20C shows including a first optical package in various devices according to some embodiments.

[0023] BRIEF DESCRIPTION OF DRAWINGS

[0024] 100: integrated package

[0025] 110, 810: compact universal photonic engine die

[0026] 120, 1310: laser die

[0027] 130: interposer

[0028] 140: optical molding glue

[0029] 150: molding portion

[0030] 160: rewiring layer portion

[0031] 170: external connector

[0032] 180: solder portion

[0033] 190: metallization layer

[0034] 195, 1530: dielectric layer

[0035] 210: first coupling waveguide

[0036] 220,610: first active portion

[0037] 230: first support substrate

[0038] 240: coupling lens

[0039] 260: first copper bonding pad

[0040] 270: first dielectric material

[0041] 310, 310a, 310b, 310c, 310d, 310e, 310f, 310g, 310h, 310i: compact universal photonic engine die area

[0042] 320: wafer shape

[0043] 330, 1130: scribe line

[0044] 410, 910: first bonding layer

[0045] 420: first opening

[0046] 430: first plate metal

[0047] 440: first bonding pad

[0048] 510: first patterned mask

[0049] 520: wafer

[0050] 620: support substrate area

[0051] 920, 1320: top sidewall portion

[0052] 930, 1330: middle sidewall portion

[0053] 940, 1340: bottom sidewall portion

[0054] 1010: second coupling waveguide

[0055] 1020, 1250: second active portion

[0056] 1030, 1260: second support substrate

[0057] 1040: laser diode

[0058] 1050: electrical interconnect

[0059] 1060: second copper bonding pad

[0060] 1070: second dielectric material

[0061] 1110, 1110a, 1110b, 1110c: laser die region

[0062] 1210, 1410: second bonding layer

[0063] 1220: second opening

[0064] 1230: second plate metal

[0065] 1240: second bonding pad

[0066] 1310: second patterned mask

[0067] 1510: third substrate

[0068] 1520: bonding via

[0069] 1540: conductive material

[0070] 1550, 1920: dielectric material

[0071] 1560: third bonding layer

[0072] 1570: third dielectric material

[0073] 1580: third bonding pad

[0074] 1610: optical glue

[0075] 1710: encapsulant

[0076] 1910: through-silicon via

[0077] 1930: metallization material

[0078] 1940: external connector

[0079] 1950: solder bump

[0080] 2010: integrated fan-out package

[0081] 2020: substrate on wafer on chip package

[0082] 2030: flip chip package

[0083] A1: sidewall profile angle

[0084] D2: distance

[0085] D3: width

[0086] K1: kerf width

[0087] W1: first width

[0088] W2: second width

[0089] W3: third width

[0090] W4: fourth width DETAILED DESCRIPTION

[0091] The following disclosure provides many different embodiments or examples for implementing different components of the embodiments of the present invention. Specific examples of components and arrangements are described below to simplify the embodiments of the present invention. Of course, these specific examples are merely examples and are not intended to be limiting. For example, if an embodiment of the present invention describes forming a first component over or on a second component, it may include an embodiment in which the first component and the second component are formed in direct contact, and may also include an embodiment in which other components are formed between the first component and the second component, so that the first component and the second component may not be in direct contact. In addition, the embodiments of the present invention may repeat component symbols and / or characters in various examples. This repetition itself does not limit the relationship between the various embodiments and / or configurations discussed, but is for the purpose of simplicity and clarity.

[0092] Furthermore, for ease of description, spatially relative terms, such as "beneath," "below," "lower," "above," "upper," and the like, may be used herein to describe the relationship of one element or component to another element or component as illustrated in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. The device may be oriented in other orientations (rotated 90 degrees or at other orientations), and the spatially relative terms used herein should be interpreted accordingly.

[0093] Embodiments will now be discussed with respect to specific embodiments in which one or more laser dies and one or more compact universal photon engine (COUPE) dies are embedded in an integrated package. Light from the laser dies is coupled to other optical devices, including the COUPE die. However, the embodiments presented herein are intended to be illustrative and are not intended to limit the embodiments to the precise description discussed. Rather, the embodiments discussed may be incorporated into a variety of implementations, and all such implementations are fully intended to be included within the scope of the embodiments.

[0094] Now refer to Figure 1 , showing the initial structure of the first integrated package 100 according to some embodiments. Figure 1In the particular embodiment shown, the first integrated package 100 includes an interposer 130, one or more COUPE dies 110, one or more laser dies 120, optical molding glue 140 between the one or more COUPE dies 110 and the one or more laser dies 120, a molding portion 150, a rewiring layer portion 160, a set of external connectors 170, and a solder portion 180. Additional devices not shown can be integrated into the first integrated package 100, and the embodiment shown is not limiting as to what devices can be present.

[0095] Figure 2 An exemplary COUPE die according to some embodiments is shown. The COUPE die 110 can include a first active portion 220 on a first support substrate 230. In some embodiments, the first active portion 220 of the COUPE die 110 includes a photonic integrated circuit (PIC - e.g., a circuit that includes optical devices that utilize light energy) (not shown), an electronic integrated circuit (EIC - e.g., a device that does not have optical devices) (not shown), and one or more first coupling waveguides 210. The COUPE die 110 also includes a bonding layer that includes first copper bonding pads 260 and first dielectric material 270.

[0096] In some embodiments, the one or more PICs can include optical components such as additional optical waveguides (e.g., ridge waveguides, rib waveguides, buried channel waveguides, diffused waveguides, etc.), couplers (e.g., grating couplers, edge couplers with narrow waveguides having widths between about 1 nm and about 200 nm, etc.), directional couplers, optical modulators (e.g., Mach-Zehnder silicon-photonic switches, microelectromechanical switches, micro-ring resonators, etc.), amplifiers, multiplexors, demultiplexors, optical-to-electrical converters (e.g., P-N junctions), electrical-to-optical converters, lasers, combinations thereof, or the like. However, any suitable optical components can be used.

[0097] In some embodiments, the first coupling waveguide 210 can be composed of silicon nitride. The first coupling waveguide 210 can be a multi-layer, multi-line, or trench style waveguide. For example, in one embodiment, the first coupling waveguide 210 can be a three-multi-layer waveguide. In another embodiment, the first coupling waveguide 210 can be a multi-line waveguide. Figure 2 In the illustrated embodiment, a three-multi-layer waveguide is shown. In one embodiment, the first coupling waveguide 210 can be patterned using, for example, one or more photolithography masks and etching processes. However, any suitable method of patterning the material used for the first coupling waveguide 210 can be utilized. For example, implantation processes, additional deposition and patterning processes for different materials, combinations of all these processes, or the like can be utilized, and all such combinations are fully intended to be included within the scope of embodiments.

[0098] In one embodiment, the first support substrate 230 may be a support material that is transparent to the wavelength of light desired to be used, such as silicon, and may be bonded to the substrate using, for example, an adhesive ( Figure 2 10). However, in other embodiments, the first support substrate 230 may be bonded to the first active portion 220 of the COUPE die 110 using, for example, a bonding process. Any suitable method of attaching the first support substrate 230 may be used. In the described embodiment, the first active portion 220 forming the COUPE die 110 is formed on a bulk substrate (not shown), such as a bulk silicon or other semiconductor material wafer, a silicon-on-insulator (SOI) wafer, or the like, and then the bulk wafer is removed (for example, by back side thinning, etching, or the like) after being mounted to the first support substrate 230. Since the process steps for forming the first active portion 220 are known, they are not repeated here for the sake of clarity and brevity. However, within the intended scope of embodiments of the present invention, the first support substrate 230 may be a bulk wafer, and the first active portion 220 of the COUPE die 110 is initially formed in and upon the bulk wafer (in which case the above-described step of bonding the first active portion 220 of the COUPE die 110 to the first support substrate 230 is not required).

[0099] The first support substrate 230 may additionally include a coupling lens 240 positioned to facilitate the transmission of light from the optical fiber ( Figure 2 The coupling lens 240 is formed by shaping the material of the support substrate (e.g., silicon) using a masking and etching process. However, any suitable process may be used.

[0100] like Figure 3A As shown, in some embodiments, the COUPE die 110 may be manufactured as part of a larger wafer or panel manufacturing process having multiple die regions, such as COUPE die regions 310a, 310b, and 310c (collectively referred to as 310). For example, Figure 3B A circular wafer shape 320 is shown with nine COUPE die regions 310a to 310i. In the embodiment shown, nine COUPE dies are included on the wafer, which allows nine COUPE dies 110 to be manufactured on a single wafer and singulated. In other embodiments, fewer or more die regions may be used on a single wafer.

[0101] Figures 4A-4D An exemplary embodiment of preparing a COUPE die 110 for a bonding layer before singulating the first integrated package 100 is shown.

[0102] According to some embodiments, Figure 4A As shown, first bonding layer 410 is formed of a first dielectric material such as silicon oxide, silicon nitride, or the like. The first dielectric material can be deposited using any suitable method, such as chemical vapor deposition (CVD), high-density plasma chemical vapor deposition (HDPCVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or the like. However, any suitable material and deposition process can be utilized. First bonding layer 410 can subsequently be used for dielectric-to-dielectric and metal-to-metal bonding between COUPE die 110 and interposer 130.

[0103] like Figure 4B As shown, once the first bonding layer 410 has been formed, a first opening 420 is formed in the first dielectric material of the first bonding layer 410 to expose the conductive portions (not shown) of the underlying layers in the first active portion 220 of the COUPE die 110 in preparation for forming the first bonding pad 4400 (as shown in FIG. Figure 4D Once the first opening 420 has been formed in the first dielectric material, a seed layer (not shown) and a first plate metal 430 (see FIG. Figure 4C ) fills first opening 420 to form a first bonding pad within first bonding layer 410. A seed layer may be blanket deposited over the top surface of the first dielectric material and the exposed conductive portion (not shown) of the underlying layer in first active portion 220 of COUPE die 110, as well as the sidewalls of first opening 420. The seed layer may include a copper layer. Depending on the desired material, the seed layer may be deposited using a process such as sputtering, evaporation, or plasma-enhanced chemical vapor deposition (PECVD), or the like.

[0104] like Figure 4CAs shown, a first plate metal 430 can be deposited over the seed layer (not shown) and the first dielectric material in the first bonding layer 410 by a plating process such as electroplating or electro-less plating. The first plate metal 430 can include copper, a copper alloy, or the like. The first plate metal 430 can be a filler material. Prior to the seed layer, a barrier layer (not separately shown) can be blanket deposited over the top surface of the first dielectric material in the first bonding layer 410 and the sidewalls of the first opening 420. The barrier layer can include titanium, titanium nitride, tantalum, tantalum nitride, or the like.

[0105] like Figure 4D As shown, after filling the first opening 420 with the first plate metal 430, a planarization process such as chemical mechanical polishing (CMP) is performed to remove the seed layer and excess portions of the first plate metal 430, thereby forming a first bonding pad 440 within the first bonding layer 410. In some embodiments, a bond pad via (not separately shown) may also be used to connect the first bonding pad 440 to a lower conductive portion of the COUPE die 110, and to connect the first bonding pad 440 to a lower metallization layer within the first active portion 220 of the COUPE die 110 through the lower conductive portion.

[0106] Figure 5A 、 5B , 6A, 6B, and 7 show a multi-step singulation process that may be used to singulate individual COUPE dies 110 along scribe lines 330 in preparation for bonding.

[0107] In one embodiment, if Figure 5A (Side view) and Figure 5B As shown in FIG. 5 (a top view of a COUPE die region on a circular wafer 520), the singulation process is initiated by applying a first patterned mask 510 to the COUPE die region 310, wherein the first patterned mask 510 has openings aligned with the scribe lines 330. In some embodiments, the openings in the first patterned mask 510 may be between 2 μm and 200 μm.

[0108] like Figure 6AAs shown, the dry etch process is used to create openings between the first active portions 610 of the individual COUPE die regions 310 and at least partially, but not fully, into the support substrate region 620. In some embodiments, the partial etch depth into the support substrate region 620 can be between 20 um and 200 um.

[0109] In some embodiments, the dry etch process produces a substantially straight profile. In this context, as used herein, substantially straight means that the sidewall profile angle Al from perpendicular to the major plane of the top of the COUPE die region 310 is less than or equal to about 10 degrees, and the difference between the distance D2 between the sidewall at the top of the active region portion etch and the sidewall at the interface of the first active portion 610 and the support substrate region 620 is less than about 100 nm. In addition, the dry etch process results in a trench width D3 between the interface of the first active portion 610 of the individual COUPE die region 310 and the support substrate region 620 of between 2 um and 200 um. Figure 6B Figure 6A As shown (displayed in exaggerated portion of the illustration), substantially straight means that the sidewall profile angle Al from perpendicular to the major plane of the top of the COUPE die region 310 is less than or equal to about 10 degrees, and the difference between the distance D2 between the sidewall at the top of the active region portion etch and the sidewall at the interface of the first active portion 610 and the support substrate region 620 is less than about 100 nm. In addition, the dry etch process results in a trench width D3 between the interface of the first active portion 610 of the individual COUPE die region 310 and the support substrate region 620 of between 2 um and 200 um.

[0110] In some embodiments, the etch process can be performed in multiple steps and can utilize a plasma dry etch process and / or a reactive ion etch (RIE). For example, a first reactive ion etch using a reactive gas such as CF4, C4F8, CHF3, or CH3F can be performed to preferentially etch through the first bonding layer 410 and the dielectric portion of the first active portion 610 of the COUPE die. In some cases, the depth of the trench formed by the first dry etch can be between 3 um to 30 um. Then, a second reactive ion etch using a gas such as SF6 or NF3 can be performed to preferentially etch between 20 um and 200 um into the support substrate. The depth of the etch can be controlled by varying the time of the etch process, among other process parameters. In some embodiments, a third etch can be performed, where the third etch is a wet etch to repair any surface defects in the COUPE die resulting from the dry etch process.

[0111] As shown, the dry etch process is used to create openings between the first active portions 610 of the individual COUPE die regions 310 and at least partially, but not fully, into the support substrate region 620. In some embodiments, the partial etch depth into the support substrate region 620 can be between 20 um and 200 um. Figure 7 ​The first patterned mask 510 (not shown here) is removed from the COUPE die region 310 as shown. The first patterned mask 510 can be removed by an acceptable ashing or lift-off process, such as using an oxygen plasma or the like.

[0112] In some embodiments, after the partial etching process, the COUPE die wafer 520 is cleaned and flipped (as shown in Figure 5B ) to complete the multi-step singulation process. As shown in Figure 8 , the COUPE die regions 310 are fully singulated by sawing along the scribe lines 330, for example, between the first COUPE die region 310a and the second COUPE die region 310b, and between the second COUPE die region 310b and the third COUPE die region 310c. The sawing penetrates only the support substrate region 620 of the COUPE die formed on the wafer 520, a depth sufficient to overlap the trench formed during the dry etching process. In some embodiments, the sawing depth can be between 80 um and 650 um, depending on the size of the support substrate and manufacturing / process requirements. The sawing fully singulates each COUPE die region from an adjacent COUPE die region and produces singulated COUPE dies 110 (as shown in Figure 2 ). In some embodiments, the width of the saw kerf K1 is 10 um to 200 um. However, the saw kerf width K1 should be wider than the width D3 (as shown in Figure 6B ) of the dry etching trench.

[0113] In some embodiments, as shown in Figure 9 , the saw blade has a rounded profile such that the singulated COUPE dies 110 produced by sawing along the scribe lines 330 (as shown in Figure 8 ) have a first support substrate 230 with a top sidewall portion 920, a middle sidewall portion 930, and a bottom sidewall portion 940. The top sidewall portion 920 is substantially straight and closest to the first active portion 220 (due to the above reference to Figure 6A and Figure 6BThe intermediate sidewall portion 930 is curved and concave. The bottom sidewall portion 940 is substantially straight. The first support substrate 230 at the top sidewall portion 920 has a first width Wl that is greater than a second width W2 of the first support substrate 230 at the bottom sidewall portion 940. In some embodiments, other saw blade profiles can be contemplated, such as stepped, angled, trapezoidal (with horizontal and vertical portions with angled portions in between), or triangular.

[0114] By performing the above-described multi-step dicing process, the sidewalls of the first active portion 220 of the diced COUPE die 110 are smoother than the sawed-through portions of the first support substrate 230. In some embodiments, the dry-etched sidewalls of the first active portion 220 of the diced COUPE die 110 have a roughness of less than 10 nm, and result in an optical transmission rate at the boundaries of the first coupling waveguide 210 of greater than or equal to 99%. In contrast, dicing the COUPE die 110 using only a saw blade can result in sidewall roughness of greater than 100 nm and an optical transmission rate of less than 90%. Thus, there is less optical interference at the boundaries of the active portion sidewalls, and specifically at the boundaries of the first coupling waveguide 210, when transmitting optical energy into or out of the COUPE die.

[0115] Figure 10 An exemplary laser die 120 according to some embodiments is shown. The laser die 120 can include a second active portion 1250 on a second support substrate 1030. In some embodiments, the second active portion 1250 of the laser die 120 includes a laser diode 1040. The laser diode 1040 converts electrical energy delivered through an electrical interconnect 1050 into optical energy to one or more second coupling waveguides 1010. The laser die 120 also includes a second bonding layer including a second copper bonding pad 1060 and a second dielectric material 1070.

[0116] In some embodiments, the second coupling waveguides 1010 can be composed of silicon nitride. The second coupling waveguides 1010 can be multi-layer, multi-line, or trench waveguides. For example, in Figure 10In the illustrated embodiment, a three-tier waveguide is shown. The second coupling waveguide 1010 of the laser die is designed to be aligned in the same horizontal and vertical alignment as the first coupling waveguide 210 of the COUPE die 110 to couple optical energy between the laser die 120 and the COUPE die 110. In some embodiments, the second coupling waveguide 1010 can be patterned using, for example, one or more photolithography masks and etching processes. However, any suitable method of patterning the material used for the second coupling waveguide 1010 can be utilized. For example, implantation processes, additional deposition and patterning processes for different materials, combinations of all these processes, or the like can be utilized, and all such combinations are fully intended to be included within the scope of the embodiments.

[0117] In one embodiment, the second support substrate 1030 can be a material such as silicon, and can be attached using, for example, an adhesive (not shown separately). However, in other embodiments, the second support substrate 1030 can be bonded to the second active portion 1250 of the laser die 120 using, for example, a bonding process. Any suitable method of attaching the second support substrate 1030 can be used. As with the first active portion 220 of the COUPE die 110, in some embodiments, the second active portion 1250 of the laser die 120 can be formed on a bulk substrate that also serves as a support substrate, and in such cases, the separate bonding process described above is not necessary. Figure 10 As shown in FIG. 1, in some embodiments, the laser die 120 can be fabricated as part of a larger wafer or panel fabrication process having multiple die regions, such as laser die regions 1110a, 1110b, and 1110c (collectively 1110). Similar to the COUPE die 110, as shown, multiple laser dies 120 can be fabricated on a single wafer or panel using a circular wafer shape or panel fabrication method. The number of laser die regions 1110 that can be included on a single wafer or panel is limited only by the physical size of the wafer / panel and the laser dies to be fabricated, as well as design considerations.

[0118] Figure 11 As shown, in some embodiments, the laser die 120 can be fabricated as part of a larger wafer or panel fabrication process having multiple die regions, such as laser die regions 1110a, 1110b, and 1110c (collectively 1110). Similar to the COUPE die 110, as shown, multiple laser dies 120 can be fabricated on a single wafer or panel using a circular wafer shape or panel fabrication method. The number of laser die regions 1110 that can be included on a single wafer or panel is limited only by the physical size of the wafer / panel and the laser dies to be fabricated, as well as design considerations. Figure 3B

[0119] Figures 12A-12D An exemplary embodiment of preparing the singulated laser die 120 for bonding within the first integrated package 100 is shown.

[0120] According to some embodiments, as shown in FIG. 1, the first coupling waveguide 210 of the COUPE die 110 can be designed to be aligned in the same horizontal and vertical alignment as the second coupling waveguide 1010 of the laser die 120 to couple optical energy between the COUPE die 110 and the laser die 120. In some embodiments, the first coupling waveguide 210 can be patterned using, for example, one or more photolithography masks and etching processes. However, any suitable method of patterning the material used for the first coupling waveguide 210 can be utilized. For example, implantation processes, additional deposition and patterning processes for different materials, combinations of all these processes, or the like can be utilized, and all such combinations are fully intended to be included within the scope of the embodiments. Figure 12A ​​As shown, second bonding layer 1210 is formed of a second dielectric material such as silicon oxide, silicon nitride, or the like. The second dielectric material can be deposited using any suitable method, such as CVD, high-density plasma chemical vapor deposition (HDPCVD), PVD, atomic layer deposition (ALD), or the like. However, any suitable material and deposition process can be utilized. Second bonding layer 1210 can subsequently be used to form dielectric-to-dielectric and metal-to-metal bonds between the singulated laser die 120 and the interposer 130.

[0121] like Figure 12B As shown, once the second bonding layer 1210 has been formed, a second opening 1220 is formed in the second bonding layer 1210 to expose the laser die 120 (see FIG. Figure 10 ) of the second active portion 1250 of the lower layer (underlying layers) of the conductive portion (not shown) and the electrical interconnect 1050 to prepare for forming the second bonding pad 1240 (such as Figure 12D 12 (shown) within the second bonding layer 1210. Once the second opening 1220 has been formed within the second dielectric material, the second opening 1220 can be filled with a seed layer (not shown) and a second plate metal 1230 to form a second bonding pad 1240 within the second bonding layer 1210. The seed layer can be blanket deposited over the second dielectric material and the exposed conductive portion (not shown) of the underlying layer in the second active portion 1250 of the singulated laser die 120 and the top surface of the electrical interconnect 1050 and the sidewalls of the second opening 1220. The seed layer can include a copper layer. Depending on the desired material, the seed layer can be deposited using a process such as sputtering, evaporation, or plasma-assisted chemical vapor deposition (PECVD), or the like.

[0122] like Figure 12C As shown, a second plate metal 1230 can be deposited over the seed layer (not shown) and the second dielectric material in the second bonding layer 1210 by a plating process such as electroplating or electroless plating. The second plate metal 1230 can include copper, a copper alloy, or the like. The second plate metal 1230 can also be a filler material. Prior to the seed layer, a barrier layer (not separately shown) can be blanket deposited over the top surface of the second dielectric material in the second bonding layer 1210 and the sidewalls of the second opening 1220. The barrier layer can include titanium, titanium nitride, tantalum, tantalum nitride, or the like.

[0123] like Figure 12D As shown, after filling the second opening 1220 with the second plate metal 1230 , a planarization process such as chemical mechanical polishing (CMP) is performed to remove the seed layer and excess portions of the second plate metal 1230 , forming a second bonding pad 1240 in the second bonding layer 1210 .

[0124] Figures 13A-13D A multi-step singulation process that can be used to singulate individual laser die 120 along scribe line 1130 to prepare for bonding is shown.

[0125] In an embodiment, as shown in FIG. 13A (side view), the singulation process is initiated by applying a second patterned mask 1310 to the laser die area 1110, where the second patterned mask 1310 has openings aligned with scribe line 1130. In some embodiments, the openings in the second patterned mask 1310 can be between 2 um and 200 um. Figure 13A

[0126] As shown in FIG. 13B (side view), a dry etch process is used to create openings between the second active portions 1250 of the individual laser die areas 1110 and at least partially, but not completely, into the second support substrate 1260. In some embodiments, the partial etch depth into the second support substrate 1260 can be between 20 um and 200 um. Figure 13B In some embodiments, the dry etch process produces a substantially straight profile. In this context, and as shown in FIG. 13C (side view), substantially straight means that the sidewall profile angle Al (as shown in FIG. 13C (side view)) from the vertical at the top of the main plane of the laser die area 1110 is less than or equal to about 10 degrees, and the difference between the sidewall at the top of the active area etch and the sidewall at the interface of the second active portion 1250 and the second support substrate 1260, distance D2, is less than about 100 nm. Additionally, the dry etch process results in a trench width D3 between the interface of the first active portion 610 and the support substrate area 620 of the individual COUPE die area 310 that is between 2 um and 200 um.

[0127] Figure 6B Figure 6B

[0128] ​​​​In some embodiments, the etching process can be performed in multiple steps and can utilize a plasma dry etching process and / or a reactive ion etching (RIE). For example, a fourth reactive ion etching using a reactive gas such as CF4, C4F8, CHF3, or CH3F can be performed to preferentially etch through the second bonding layer 1210 and the dielectric portion of the second active portion 1250 of the laser die. In some cases, the depth of the trench formed by the fourth dry etching can be between 3 um to 30 um. A fifth reactive ion etching using a gas such as SF6 or NF3 can then be performed to preferentially etch between 20 um and 200 um into the second support substrate 1260. The depth of the etching can be controlled by varying the time of the etching process, among other process parameters. In some embodiments, a sixth etching can be performed, where the sixth etching is a wet etching to repair any surface defects in the laser die caused by the dry etching process.

[0129] As shown in FIG. 11B, the second patterned mask 1310 (not shown here) is removed from the laser die area 1110. The second patterned mask 1310 can be removed by an acceptable ashing or lift-off process, such as using an oxygen plasma or the like. Figure 13C

[0130] In some embodiments, after the partial etching process, the laser die is cleaned and flipped (not shown) to complete the multi-step singulation process. As shown in FIG. 11C, the laser die area 1110 is completely singulated by sawing along the scribe lines 1130, for example, between the first laser die area 1110a and the second laser die area 1110b, and between the second laser die area 1110b and the third laser die area 1110c. The sawing penetrates only the second support substrate 1260 of the laser die formed on the wafer, to a depth sufficient to overlap the trench formed during the dry etching process. In some embodiments, the sawing depth can be between 80 um and 650 um, depending on the size of the support substrate and manufacturing / process requirements. The sawing completely singulates each laser die area from the adjacent laser die area and results in singulated laser dies 120 (as shown in FIG. 11D). Figure 13D Figure 10 In some embodiments, the saw kerf width K1 is 10 um to 200 um. However, the saw kerf width K1 should be wider than the width D3 of the dry etched trench (as shown in FIG. 10B with respect to the COUPE die). Figure 8

[0131] In some embodiments, as shown in FIG. 11C, the saw blade has an arc-shaped profile such that the sawing along the scribe lines 1130 (as shown in FIG. 11C) results in a curved edge of the singulated laser dies 120 (as shown in FIG. 11D). Figure 14 Figure 13D ​​​​The sawing produces a singulated laser die 120 having a second support substrate 1030 with a top sidewall portion 1320, a middle sidewall portion 1330, and a bottom sidewall portion 1340. The top sidewall portion 1320 is substantially straight and is proximate to the second active portion 1250. The middle sidewall portion 1330 is curved and concave. The bottom sidewall portion 1340 is substantially straight. The second support substrate 1030 at the top sidewall portion 1320 has a third width W3 that is greater than a fourth width W4 of the second support substrate 1030 at the bottom sidewall portion 1340. In some embodiments, other saw blade profiles are contemplated, such as stepped, angled, trapezoidal (with horizontal and vertical portions with angled portions therebetween), or triangular.

[0132] By performing the multi-step singulation process described above, the sidewall of the second active portion 1250 of the singulated laser die 120 is smoother than the sawn-through portion of the second support substrate 1030. Thus, there is less optical interference at the boundary of the active portion sidewall, and in particular at the boundary of the second coupling waveguide 1010, when light energy is transmitted into or out of the laser die.

[0133] Figure 15 An exemplary embodiment of a display interposer 130 is shown. The display interposer 130 metallization layers are formed on a third substrate 1510 to electrically connect the first active portion 220 of the singulated COUPE die 110 and the second active portion 1020 of the singulated laser die 120 to control circuitry, to each other, and to subsequently attached devices (not shown). Figure 15 The display interposer 130 is not shown, but is described below with reference to Figures 20A-20C and further shown and described.

[0134] In one embodiment, the third substrate 1510 can be a material that can be used not only for structural support, but also as a seed material for epitaxial growth of overlying materials, and while any suitable size and material can be used, can be, for example, a 2 inch or 4 inch material wafer. In one embodiment, the third substrate 1510 can be a semiconductor material used for structural support during subsequent processes, and can be, for example, a silicon wafer, a silicon germanium wafer, a silicon on insulator wafer, or the like. The third substrate 1510 can include a doped or undoped bulk silicon, or an active layer of a silicon on insulator (SOI) substrate. In general, an SOI substrate includes a layer of semiconductor material, such as silicon, germanium, silicon germanium, SOI, silicon on germanium (SGOI), or combinations thereof. Other substrates that can be used include a multilayer substrate, a graded substrate, or a hybrid orientation substrate.

[0135] Optionally, active devices (not shown here) can be added to the third substrate 1510. The active devices include a variety of active and passive devices, such as capacitors, resistors, inductors, or the like, which can be used to create the design desired structure and functional requirements of the third substrate 1510. The active devices can be formed within or on the third substrate 1510 using any suitable method.

[0136] In some embodiments, the metallization layers are formed from alternating layers of a dielectric material 1550 (e.g., a low dielectric constant (low-k) dielectric material, an extremely low-k dielectric material, an ultre low-k dielectric material, a combination thereof, or the like) and a conductive material 1540, and can be formed by any suitable process, such as deposition, damascene, dual damascene, or the like. However, any suitable materials and processes can be utilized. In particular embodiments, there can be multiple layers of metallization for interconnecting the various optical components, although the exact number of metallization layers depends on the design of the interposer 130 and the first integrated package 100.

[0137] In some embodiments, the interposer 130 can additionally include a core substrate and / or dielectric layer 1530, and bond vias 1520 that electrically connect the conductive material 1540 in the metallization layers to third bond pads 1580 in a third bonding layer 1560. The third bonding layer 1560 also includes a third dielectric material 1570. The third bonding layer can be formed using the damascene, dual damascene, or the like processes described above with respect to the singulated COUPE die 110 or the singulated laser die 120. Figures 4A-4D or the damascene, dual damascene, or the like processes described above with respect to the singulated COUPE die 110 or the singulated laser die 120. Figures 12A-12D In particular embodiments, the first bonding layer 910 of the singulated COUPE die 110 and the second bonding layer 1410 of the singulated laser die 120 can be bonded to the third bonding layer 1560 of the interposer 130 using dielectric-to-dielectric and metal-to-metal bonding processes, respectively. However, any other suitable bonding processes can also be utilized.

[0138] Figure 16 The display is shown as the singulated COUPE die 110 and the singulated laser die 120 bonded to the interposer 130. In particular embodiments, the first bonding layer 910 of the singulated COUPE die 110 and the second bonding layer 1410 of the singulated laser die 120 can be bonded to the third bonding layer 1560 of the interposer 130 using dielectric-to-dielectric and metal-to-metal bonding processes, respectively. However, any other suitable bonding processes can also be utilized.

[0139] In certain embodiments utilizing a dielectric-to-dielectric and metal-to-metal bonding process, the process can be initiated by activating the surface of the singulated COUPE die 110, the surface of the first bonding layer 910, the surface of the singulated laser die 120, the surface of the second bonding layer 1410, the surface of the interposer, and the surface of the third bonding layer 1560. The activation of the top surfaces of the bonding layers, the singulated COUPE die 110, the singulated laser die 120, and the interposer 130 can include, for example, dry processing, wet processing, plasma processing, exposure to an inert gas plasma, exposure to H2, exposure to N2, exposure to O2, combinations thereof, or the like. In embodiments utilizing wet processing, for example, RCA cleaning can be used. In another embodiment, the activation process can include other types of processing. The activation process facilitates the bonding of the singulated COUPE die 110 and the singulated laser die 120 to the interposer 130.

[0140] After the activation process, the interposer 130, the singulated COUPE die 110, and the singulated laser die 120 can be cleaned using, for example, a chemical rinse, and then the singulated COUPE die 110 and the singulated laser die 120 are aligned and placed in physical contact with the interposer 130. In some embodiments, the singulated COUPE die 110 and the singulated laser die 120 can be placed on the interposer 130 at a distance (width) D3 of between about 5 um and about 100 um.

[0141] The interposer 130, diced COUPE die 110, and diced laser die 120 are then subjected to heat treatment and contact pressure to join the diced COUPE die 110 and the diced laser die 120 to the interposer 130. For example, the interposer 130, diced COUPE die 110, and diced laser die 120 can be subjected to a pressure of about 200 kPa or less and a temperature of between about 25 °C and about 250 °C to fuse the diced COUPE die 110 and the diced laser die 120 to the interposer 130. The interposer 130, diced COUPE die 110, and diced laser die 120 can then be subjected to a temperature at or above the eutectic point of the material of the first bonding pad 440, second bonding pad 1240, and third bonding pad 1580, for example, between about 150 °C and about 650 °C, to melt the metal. In this way, the diced COUPE die 110 and the diced laser die 120 form a dielectric-to-dielectric and metal-to-metal bonded device with the interposer 130. In some embodiments, the bonded dies are subsequently baked, annealed, pressed, or otherwise treated to strengthen or terminate the bond.

[0142] Additionally, while specific processes for initiating and strengthening the bond have been described, these descriptions are intended to be illustrative and are not intended to limit the embodiments. Rather, any suitable combination of baking, annealing, pressing, or combination of processes can be utilized. All such processes are fully intended to be included within the scope of the embodiments.

[0143] Figure 17An embodiment is shown in which optical glue 1610 fill is applied to the cavity between the singulated COUPE die 110 and the singulated laser die 120. Due to the shape of the sidewalls of the singulated COUPE die 110 and the singulated laser die 120 resulting from the multi-step singulation process described above, the space between the singulated COUPE die 110 and the singulated laser die 120 at the top (farthest from the interposer 130) is larger than the space between the singulated COUPE die 110 and the singulated laser die 120 at the bottom (closest to the interposer 130). As a result, the optical glue flows more easily from the top to the bottom and completely fills the cavity between the singulated COUPE die 110 and the singulated laser die 120. In addition, due to the multi-step singulation process described above, the roughness of the dry etched sidewalls of the singulated COUPE die 110 and the laser die 120 is less than 10 nm. Accordingly, the optical transmission at the boundary of the first coupling waveguide 210 and the optical glue and at the boundary of the second coupling waveguide 1010 and the optical glue is greater than or equal to 99%. In contrast, the optical transmission at the boundary formed by sawing can result in a sidewall roughness greater than 100 nm and a related optical transmission less than 90%. Thus, the disclosed embodiments and processes result in fewer manufacturing defects and reduced optical transmission loss between the optically coupled dies.

[0144] Due to the preparation of the bonding layers of the singulated COUPE die 110, the singulated laser die 120, and the interposer 130, and in particular due to the CMP finishing of each of the relevant bonding layers described above, the surfaces of the singulated COUPE die 110, the singulated laser die 120, and the interposer 130 achieve a high level of coplanarity. As a result, the vertical displacement between the alignment of the singulated COUPE die 110 and the singulated laser die 120 after the reflow bonding process placement is virtually eliminated, or at least significantly reduced, when compared to conventional methods utilizing micro-bump joints between the dies and the interposer.

[0145] Dielectric-to-dielectric and metal-to-metal bonding have the additional benefit of making the individual components more rigid, at least in part due to stronger silicon oxide bonding. Dielectric-to-dielectric and metal-to-metal bonding can also reduce vertical displacement compared to traditional micro-bump bonding. Traditional micro-bump bonding can experience horizontal displacement of 1um to 3um during reflow. In contrast, dielectric-to-dielectric and metal-to-metal bonding limit horizontal displacement to between 0.2um and 0.8um. ​​All of these benefits result in improved optical alignment between the first coupling waveguide 210 of the segmented COUPE die 110 and the second coupling waveguide 1010 of the segmented laser die 120. This results in lower optical losses, fewer manufacturing defects, greater allowable design errors, and the ability to manufacture at smaller sizes relative to traditional bonding methods such as micro-bump bonding.

[0146] In some embodiments, as Figure 18A As shown, filling is performed by forming an encapsulant 1710 on and around the various components. In some embodiments, the encapsulant 1710 covers at least the top of the interposer 130 and surrounds the singulated COUPE die 110 and the singulated laser die 120. In some embodiments, the top of the optical adhesive 1610 is also covered by the encapsulant 1710. The encapsulant 1710 can be formed from a molding compound, epoxy, or the like, and can be applied by compression molding, transfer molding, or the like. The encapsulant 1710 can be applied in a liquid or semi-liquid form and then cured. The encapsulant 1710 can be formed over the interposer 130 so that the singulated COUPE die 110, the singulated laser die 120, and the optical adhesive 1610 are buried or covered.

[0147] exist Figure 18BIn some embodiments, a planarization process may be performed on the encapsulant 1710 to expose the coupling lens 240 of the segmented COUPE die 110. In some cases, the topmost surface of the segmented COUPE die 110, the segmented laser die 120, and / or the optical glue 1610 may also be exposed. After the planarization process within the process variation, the topmost surface of the first integrated package 100 is substantially level (e.g., planar). The planarization process may be, for example, chemical mechanical polishing (CMP), a grinding process, or the like. In some embodiments, for example, if the coupling lens 240 of the segmented COUPE die 110 is already exposed, the planarization may be omitted. Other processes may be used to achieve similar results.

[0148] In the case where the coupling lenses 240 of the singulated COUPE die 110 are recessed below the topmost surface of the singulated COUPE die 110 , further etching, grinding, and / or patterning may be performed on the encapsulant 1710 to expose the coupling lenses 240 of the singulated COUPE die 110 .

[0149] Figure 19A and Figure 19B Alternative back-end connection possibilities for the first integrated package 100 are shown.

[0150] In some embodiments, as Figure 19A As shown, substrate de-bonding is performed to detach (or "de-bond") the third substrate 1510 from the interposer 130. According to some embodiments, de-bonding includes irradiating light, such as laser light or ultraviolet (UV) light, onto a release layer (not shown), causing the release layer to decompose under the heat of the light, and the third substrate 1510 can be removed.

[0151] like Figure 1 As shown, a redistribution layer portion 160 may be attached and / or formed on the bottom of the interposer 130. The redistribution layer portion 160 includes a metallization layer 190 and a dielectric layer 195, which is connected between the interposer and external components ( Figure 1 In some embodiments, external connector 170 may be part of a microbump bond that additionally includes a solder portion 180. Any suitable method may be used to form and pattern redistribution layer portion 160 and external connector 170.

[0152] In other embodiments, such as Figure 19B As shown in FIG. 15B, the third substrate 1510 can instead be held on the interposer 130, and a through silicon via (TSV) 1910 is formed to connect the conductive material 1540 of the metallization layer of the interposer 130 to an external connector 1940. An additional metallization layer can be added to the bottom of the interposer 130 consisting of additional dielectric material 1920 and metallization material 1930. Any suitable method can be used to form and pattern the through silicon via (TSV) 1910, the external connector 1940, and the additional dielectric material 1920 and metallization material 1930.

[0153] For example, in possible embodiments, the TSV 1910 can be formed within the third substrate 1510 at any desired point in the manufacturing process to provide electrical connectivity from the front side of the third substrate 1510 to the backside of the third substrate 1510. In one embodiment, as with the above-described Figure 15 The second TSV 1910 can be formed by initially forming a TSV opening in the third substrate 1510 prior to forming the alternating layers of dielectric material 1550 and conductive material 1540 and the third bonding layer 1560. The TSV opening can be formed by applying and developing a suitable photoresist, and removing a portion of the underlying material exposed to a desired depth. The TSV opening can be formed to extend to a depth in the third substrate 1510 that is greater than the eventual desired height of the third substrate 1510.

[0154] Once the TSV opening has been formed within the third substrate 1510, the TSV opening can be lined with a liner. The liner can be, for example, an oxide or silicon nitride formed from a derivative of tetraethylorthosilicate (TEOS), although any suitable dielectric material can be used. The liner can be formed using a plasma enhanced chemical vapor deposition (PECVD) process, although other suitable processes such as physical vapor deposition or thermal processes can be used.

[0155] Once the liner has been formed along the sidewalls and bottom of the TSV opening, a barrier layer can be formed, and the remaining portion of the TSV opening can be filled with a first conductive material. Although other suitable materials can be used, such as aluminum, alloys, doped polysilicon, combinations thereof, or the like, the first conductive material can include copper. The first conductive material can be formed by electroplating copper onto the seed layer, filling and overfilling the TSV opening. Once the TSV opening has been filled, the excess liner, barrier layer, seed layer, and conductive material outside of the TSV opening can be removed by a planarization process, such as chemical mechanical polishing (CMP), although any suitable removal process can be used.

[0156] Once the TSV opening has been filled, after the alternating layers of dielectric material 1550 and conductive material 1540 are formed, and the third bonding layer 1560 is formed, and after the COUPE die 810 and laser die 1310 are bonded to the interposer 130, the third substrate 1510 can be thinned until the TSV 1910 has been exposed. In one embodiment, the third substrate 1510 can be thinned using, for example, a chemical mechanical polishing process, a grinding process, or the like. Further, once exposed, the TSV 1910 can be recessed using, for example, one or more etching processes, such as a wet etching process, in order to recess the third substrate 1510 such that the TSV 1910 extends out of the third substrate 1510.

[0157] In one embodiment, the second external connector 1940 can be placed on the third substrate 1510 in electrical connection with the second TSV 1910, and can be, for example, a ball grid array (BGA) including eutectic material, such as solder 1950, although any suitable material can be used. Alternatively, underbump metallization or additional metallization layers (not shown separately in the figures) can be used between the third substrate 1510 and the external connector 1940. Figure 19B In embodiments where the external connector 1940 includes solder bumps 1950, the external connector 1940 can be formed using a ball drop method, such as a direct ball drop process. In another embodiment, the solder bumps 1950 can be formed by first forming a layer of tin by any suitable method, such as evaporation, electroplating, printing, solder transfer, and then performing a reflow to shape the material into the desired bump shape. Once the external connector 1940 has been formed, testing can be performed to ensure that the structure is suitable for further processing.

[0158] Embodiments have been described in relation to a specific context, namely application to integrated chip on system (SoIC) packaging. However, other embodiments can also apply to other packaging, including, for example, chip on wafer on substrate (CoWoS) packaging or integrated fan-out (InFO) packaging. Moreover, as shown in Figures 20A-20C one or more first integrated packages 100 can also be included in an overarching packaging. For example, Figure 20A Embodiments are shown in which the first integrated package 100 is included in an InFO packaging 2010. Figure 20B Embodiments are shown in which multiple first integrated packages 100 are included in a CoWoS packaging 2020. Figure 20C Embodiments are shown in which the first integrated package 100 is included in a flip chip packaging 2030. Embodiments discussed herein will provide examples of enabling or using the inventive subject matter of embodiments of the present disclosure, and it will be readily apparent to those of ordinary skill in the art that variations can be made in preserving the intended scope of the embodiments. Like reference numerals and characters refer to like parts throughout the several views of the drawings. Although method embodiments can be discussed as being performed in a certain order, other method embodiments can be performed in any logical order.

[0159] By utilizing the methods and processes as above, vertical misalignment between the dies sending and receiving the optical signals / energy during manufacturing can be virtually eliminated or at least significantly reduced, and horizontal misalignment during manufacturing can be greatly reduced. Moreover, optical loss due to media movement between the dies sending and receiving the optical signals / energy can be reduced. Thus, utilizing the described processes can result in fewer manufacturing defects and allow for smaller optical design requirements.

[0160] In some embodiments, an integrated package includes an optical die, a laser die, an interposer, and optical glue. The optical die includes a photonic integrated circuit (PIC), an electronic integrated circuit (EIC), and one or more first coupling waveguides. The laser die includes at least one laser diode and one or more second coupling waveguides. The optical die is bonded to a first side of the interposer using metal-to-metal bonding, the laser die is bonded to the first side of the interposer using metal-to-metal bonding, and at least one of the one or more first coupling waveguides is optically aligned with at least one of the one or more second coupling waveguides. The optical glue fills a gap between the aligned at least one of the one or more first coupling waveguides and the at least one of the one or more second coupling waveguides.

[0161] In some embodiments, the integrated package further includes an encapsulant, where the encapsulant covers the interposer and surrounds the optical die, the laser die, and the optical glue.

[0162] In some embodiments, the integrated package further includes a redistribution structure on a second side of the interposer opposite the first side, where the redistribution structure includes one or more dielectric layers and one or more layers of metallization, and where the one or more layers of metallization electrically connect the interposer to a plurality of external connectors.

[0163] In some embodiments, the integrated package further comprises a silicon substrate attached to a second side of the interposer opposite the first side, wherein the silicon substrate includes through-silicon vias (TSVs) through the silicon substrate and electrically connecting the interposer to the plurality of external connectors.

[0164] In some embodiments, at least two sidewalls of the optical die include a first portion that is substantially straight closest to the interposer, a second portion that is substantially straight furthest from the interposer, and a third portion between the first and second portions, and the third portion is tapered; wherein the at least two sidewalls are on two sides of the optical die, and wherein at least one of the at least two sidewalls intersects the at least one of the one or more first coupling waveguides that is in optical alignment with the at least one of the one or more second coupling waveguides; and wherein a first width of the optical die between the first portions of the at least two sidewalls is greater than a second width of the optical die between the second portions of the at least two sidewalls.

[0165] In some embodiments, the third portion is tapered to form a rounded concave profile in the sidewall of the optical die between the first and second portions of the sidewall.

[0166] In some embodiments, the optical die and the laser die are horizontally spaced between about 5 um and about 100 um on the interposer, and each of the optical die and the laser die is bonded to the interposer using a dielectric-to-dielectric bond.

[0167] In some embodiments, a method of forming an integrated package includes forming a first bonding layer on a first side of an optical die, the first bonding layer including a first dielectric layer and a first metallization layer, wherein the optical die includes a photonic integrated circuit (PIC), an electronic integrated circuit (EIC), and one or more first coupling waveguides; forming a second bonding layer on a first side of a laser die, the second bonding layer including a second dielectric layer and a second metallization layer, wherein the laser die includes at least one laser diode and one or more second coupling waveguides; forming a third bonding layer on a first side of a mediator, the third bonding layer including a third dielectric layer and a third metallization layer; aligning the first side of the optical die and the first side of the laser die on the first side of the mediator, wherein the first bonding layer of the optical die and the second bonding layer of the laser die physically contact the third bonding layer of the mediator, and wherein at least one of the one or more first coupling waveguides is optically aligned with at least one of the one or more second coupling waveguides; forming a metal-to-metal bond between the first bonding layer and the third bonding layer and between the second bonding layer and the third bonding layer; and filling a void between the optical die and the laser die with an optical adhesive.

[0168] In some embodiments, the method of forming an integrated package further includes, prior to aligning the first side of the optical die and the first side of the laser die on the first side of the mediator, multi-step singulating the optical die, and the multi-step singulating includes performing a dry etch from a first direction to partially singulate between at least two optical dies, wherein the dry etch forms a trench through an active portion of the optical die penetrating into the optical die, and wherein the dry etch partially penetrates through a first substrate of the optical die attached to the active portion of the optical die; and sawing through an un-etched portion of the first substrate from a second direction opposite the first direction using a saw blade, wherein the saw blade forms a tapered or rounded cutting profile in at least a portion of a cutting surface of the first substrate, and wherein a maximum width of a cutting portion of the saw blade is greater than a maximum width of the trench formed by the dry etch.

[0169] In some embodiments, the method of forming an integrated package further includes performing a multi-step singulation of the laser die before aligning the first side of the optical die and the first side of the laser die on the first side of the interposer, and the multi-step singulation includes performing a dry etch from a first direction to partially singulate between at least two laser dies, wherein the dry etch forms a trench through an active portion of a laser die including a laser diode to penetrate into the laser die, and wherein the dry etch partially penetrates a second substrate of the laser die attached to the active portion of the laser die; and sawing through an unetched portion of the second substrate from a second direction opposite the first direction using a saw blade, wherein the saw blade forms a tapered or arcuate cut profile in at least a portion of a cut surface of the second substrate, and wherein a maximum width of a cutting portion of the saw blade is greater than a maximum width of the trench formed by the dry etch.

[0170] In some embodiments, the method of forming an integrated package further includes forming a dielectric-to-dielectric bond of a dielectric between the first bonding layer and the third bonding layer and between the second bonding layer and the third bonding layer; and forming an encapsulant over the interposer, wherein the encapsulant surrounds the optical die, the laser die, and the optical adhesive.

[0171] In some embodiments, the method of forming an integrated package further includes electrically connecting the interposer to a plurality of external connectors, and the plurality of external connectors are on a side of the interposer opposite the optical die and the laser die.

[0172] In some embodiments, electrically connecting the interposer to the plurality of external connectors includes de-bonding the third substrate from the interposer; forming or attaching a first side of a redistribution structure on a second side of the interposer opposite the optical die and the laser die, wherein the redistribution structure includes one or more dielectric layers and one or more metallization layers; and forming the plurality of external connectors on a second side of the redistribution structure opposite the interposer, wherein the one or more metallization layers of the redistribution structure electrically connect the interposer to the plurality of external connectors.

[0173] In some embodiments, electrically connecting the interposer to the plurality of external connectors includes forming one or more through-silicon vias (TSVs) through a third substrate attached to a second side of the interposer opposite the optical die and the laser die; and forming the plurality of external connectors on a side of the third substrate opposite the interposer, and wherein the through-silicon vias electrically connect the interposer to the plurality of external connectors.

[0174] In some embodiments, a semiconductor device includes one or more integrated packages, where each integrated package includes an optical die, a laser die, a mediator, and an optical glue. Wherein the optical die includes one or more photonic integrated circuits (PICs), one or more first coupling waveguides that are optically connected to at least one of the one or more photonic integrated circuits, and a first bonding layer that includes a first dielectric and a first metallization layer formed using a damascene or dual damascene process. Wherein the laser die includes at least one laser diode, one or more second coupling waveguides, and a second bonding layer that includes a second dielectric and a second metallization layer formed using a damascene or dual damascene process, and wherein at least one of the one or more second coupling waveguides is optically connected to the laser diode. Wherein the mediator includes a third bonding layer that includes a third dielectric and a third metallization layer. Wherein the first bonding layer of the optical die is bonded to the third bonding layer of the mediator using metal-to-metal bonding, wherein the second bonding layer of the laser die is bonded to the third bonding layer of the mediator using metal-to-metal bonding, and wherein at least one of the one or more first coupling waveguides is optically aligned with at least one of the one or more second coupling waveguides. Wherein the optical glue fills a gap between the at least one of the one or more first coupling waveguides and the at least one of the one or more second coupling waveguides that are aligned to serve as an optical transmission medium between the optical die and the laser die.

[0175] In some embodiments, each of the first bonding layer of the optical die and the second bonding layer of the laser die is further bonded to the third bonding layer of the mediator using a dielectric-to-dielectric bond, wherein the one or more integrated packages further include an encapsulant, wherein the encapsulant covers the mediator and surrounds the optical die, the laser die, and the optical glue, and wherein the encapsulant is in contact with at least one sidewall of the optical die, at least one sidewall of the laser die, and a top of the optical glue.

[0176] In some embodiments, the one or more integrated packages further include a re-wiring structure attached to a second side of the mediator opposite the third bonding layer, wherein the re-wiring structure includes one or more dielectric layers and one or more metallization layers, and wherein the one or more metallization layers electrically connect the mediator to a plurality of external connectors.

[0177] In some embodiments, the one or more integrated packages further comprise a silicon substrate attached to a second side of the interposer opposite the third bonding layer, wherein the silicon substrate comprises through-silicon vias (TSVs) that electrically connect the interposer to the plurality of external connectors.

[0178] In some embodiments, at least two sidewalls of the optical die and at least two sidewalls of the laser die comprise a substantially straight first portion closest to the interposer, a substantially straight second portion farthest from the interposer, and a third portion between the first portion and the second portion, and the third portion is tapered; wherein the at least two sidewalls are on two sides of the optical die and the laser die, and wherein at least one of the at least two sidewalls of the optical die intersects the at least one of the one or more first coupling waveguides that is in optical alignment with the at least one of the one or more second coupling waveguides, and wherein at least one of the at least two sidewalls of the laser die intersects the at least one of the one or more second coupling waveguides that is in optical alignment with the at least one of the one or more first coupling waveguides; wherein a first width of the optical die between the first portions of the at least two sidewalls is greater than a second width of the optical die between the second portions of the at least two sidewalls; and wherein a third width of the laser die between the first portions of the at least two sidewalls is greater than a fourth width of the laser die between the second portions of the at least two sidewalls.

[0179] In some embodiments, the one or more integrated packages are integrated horizontally and / or vertically on a redistribution layer (RDL) interconnect, on a silicon interposer, on a RDL interposer, on a local silicon interconnect and RDL interposer, or on an integrated fan out with one or more additional heterogeneous integrated packages, memories, or dies.

[0180] The foregoing disclosure outlines the components of the embodiments, so that those skilled in the art can better understand the aspects of the embodiments. Those skilled in the art will understand that they can easily design or modify other processes and structures based on the embodiments, and achieve the same purpose and / or achieve the same advantages as the embodiments introduced in this paper. Those skilled in the art will also understand that these equivalent configurations do not deviate from the concept and scope of the embodiments, and various changes, substitutions or replacements can be made to the embodiments without deviating from the concept and scope of the embodiments.

Claims

1. An integrated package, characterized by, comprises: an optical die, wherein the optical die comprises photonic integrated circuits, electronic integrated circuits, and one or more first coupling waveguides; a laser die, wherein the laser die comprises at least one laser diode and one or more second coupling waveguides; an interposer, wherein the optical die is bonded to a first side of the interposer using metal-to-metal bonding, wherein the laser die is bonded to the first side of the interposer using metal-to-metal bonding, and wherein at least one of the one or more first coupling waveguides is optically aligned with at least one of the one or more second coupling waveguides; and an optical glue filling a gap between the at least one of the one or more first coupling waveguides and the at least one of the one or more second coupling waveguides that are aligned.

2. The integrated package of claim 1, wherein, further comprising an encapsulant, wherein the encapsulant covers the interposer and surrounds the optical die, the laser die, and the optical glue.

3. The integrated package of claim 1, wherein, further comprising a redistribution structure on a second side of the interposer opposite the first side, wherein the redistribution structure comprises one or more dielectric layers and one or more metallization layers, and wherein the one or more metallization layers electrically connect the interposer to external connectors.

4. The integrated package of claim 1, wherein, further comprising a silicon substrate attached to a second side of the interposer opposite the first side, wherein the silicon substrate comprises through-silicon vias that pass through the silicon substrate and electrically connect the interposer to external connectors.

5. The integrated package of claim 1, wherein, at least two sidewalls of the optical die comprise a first substantially straight portion closest to the interposer, a second substantially straight portion farthest from the interposer, and a third portion between the first portion and the second portion, and the third portion is tapered; wherein the at least two sidewalls are on two sides of the optical die, and wherein at least one of the at least two sidewalls intersects the at least one of the one or more first coupling waveguides that is optically aligned with the at least one of the one or more second coupling waveguides; and wherein a first width of the optical die between the first portions of the at least two sidewalls is greater than a second width of the optical die between the second portions of the at least two sidewalls.

6. The integrated package of claim 5, wherein, the third portion is tapered to form an arcuate concave profile in the sidewall of the optical die between the first portion and the second portion of the sidewall.

7. The integrated package of claim 1, wherein, the optical die and the laser die are horizontally spaced apart on the interposer by between 5 um and 100 um, and wherein each of the optical die and the laser die is further bonded to the interposer using dielectric-to-dielectric bonding.

8. A semiconductor device, characterized by comprising: comprises: one or more integrated packages, wherein each integrated package comprises: an optical die, wherein the optical die comprises one or more photonic integrated circuits; one or more first coupling waveguides optically connected to at least one of the one or more photonic integrated circuits; and a first bonding layer comprising a first dielectric and a first metallization layer formed using a damascene or dual damascene process; a laser die, wherein the laser die includes at least one laser diode; one or more second coupling waveguides; and a second bonding layer including a second dielectric and a second metallization layer formed using a damascene or dual damascene process, and wherein at least one of the one or more second coupling waveguides is optically connected to the laser diode; an interposer, wherein the interposer includes a third bonding layer including a third dielectric and a third metallization layer, wherein the first bonding layer of the optical die is bonded to the third bonding layer of the interposer using metal-to-metal bonding, wherein the second bonding layer of the laser die is bonded to the third bonding layer of the interposer using metal-to-metal bonding, and wherein at least one of the one or more first coupling waveguides and at least one of the one or more second coupling waveguides are optically aligned; and an optical glue, wherein the optical glue fills a gap between the at least one of the one or more first coupling waveguides and the at least one of the one or more second coupling waveguides that are aligned to serve as an optical transmission medium between the optical die and the laser die.

9. The semiconductor device according to claim 8, wherein each of the first bonding layer of the optical die and the second bonding layer of the laser die is further bonded to the third bonding layer of the interposer using dielectric-to-dielectric bonding, wherein the one or more integrated packages further include an encapsulant, wherein the encapsulant covers the interposer and surrounds the optical die, the laser die, and the optical glue, and wherein the encapsulant is in contact with at least one sidewall of the optical die, at least one sidewall of the laser die, and a top portion of the optical glue.

10. The semiconductor device according to claim 8, wherein the one or more integrated packages further include a redistribution structure attached to a second side of the interposer opposite the third bonding layer, wherein the redistribution structure includes one or more dielectric layers and one or more metallization layers, and wherein the one or more metallization layers electrically connect the interposer to a plurality of external connectors.

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