Radio frequency front-end module

Abstract

The utility model relates to the technical field of radio frequency, in particular to a radio frequency front-end module. The radio frequency front end module comprises a substrate and a power amplifier, wherein the power amplifier comprises a power amplification chip and an output circuit which are respectively arranged on the substrate; the power amplification chip is integrated with a power amplification circuit; the output circuit comprises a first balun and a second balun which are connected with the power amplification circuit; the first balun and the second balun are respectively positioned on two sides of a first central axis of a setting area of the power amplification chip; because the first balun and the second balun are respectively arranged at two sides of the central axis of the power amplification chip, overlapping of a first transmission path between the power amplification circuit and the first balun and a second transmission path between the power amplification circuit and the second balun can be avoided; meanwhile, interference between the first transmission path and the second transmission path is reduced, the stability of the power amplifier during working is improved, and the stability of the radio frequency front-end module is further improved.

Description

Technical Field

[0001] This application relates to the field of radio frequency technology, and in particular to a radio frequency front-end module. Background Technology

[0002] Existing radio frequency (RF) front-end modules are widely used in wireless communication, the Internet of Things (IoT), smart homes, and other fields. Among them, the power amplifier, as the core unit of the RF front-end module, has a significant impact on the signal output performance of the RF front-end module.

[0003] The power amplifier first amplifies the radio frequency signal using a power amplifier circuit, and then uses a balun to convert the signal output from the power amplifier circuit. Improper placement of the power amplifier circuit and balun can lead to overlapping or interference between traces, which is detrimental to the stability of the RF front-end module. Utility Model Content

[0004] In view of the above problems, this application provides a radio frequency front-end module to solve the above-mentioned technical problems that are not conducive to improving the stability of the radio frequency front-end module.

[0005] In a first aspect, embodiments of this application provide a radio frequency front-end module, including:

[0006] substrate;

[0007] A power amplifier, the power amplifier including a power amplifier chip and an output circuit respectively disposed on the substrate;

[0008] The power amplifier chip integrates a power amplifier circuit.

[0009] The output circuit includes a first balun and a second balun connected to the power amplifier circuit.

[0010] The first balun and the second balun are located on either side of the first central axis of the setting area of ​​the power amplifier chip.

[0011] Secondly, embodiments of this application provide a radio frequency front-end module, including:

[0012] substrate;

[0013] A power amplifier is used to amplify the power of radio frequency signals in multiple frequency bands. The power amplifier includes a power amplifier chip and an output circuit respectively disposed on the substrate. The power amplifier chip integrates a power amplifier circuit. The output circuit includes a first balun and a second balun connected to the power amplifier circuit.

[0014] A switching chip disposed on the substrate, the switching chip comprising a plurality of switching units, the switching units being used to selectively input the radio frequency signal of at least one frequency band to the power amplifier chip;

[0015] And a control chip disposed on the substrate, the control chip being electrically connected to the power amplifier chip;

[0016] The first balun and the second balun are located on opposite sides of the first central axis of the power amplifier chip's mounting area. The first balun and the second balun are located on the first side of the power amplifier chip along the first direction. The switch chip and the control chip are located on the second side of the power amplifier chip along the first direction.

[0017] The radio frequency front-end module provided in this application includes a substrate and a power amplifier. The power amplifier includes a power amplifier chip and an output circuit respectively disposed on the substrate. The power amplifier chip integrates a power amplifier circuit. The output circuit includes a first balun and a second balun connected to the power amplifier circuit. The first balun and the second balun are respectively located on both sides of a first central axis of the setting area of ​​the power amplifier chip. Since the first balun and the second balun are respectively disposed on both sides of the central axis of the power amplifier chip, the overlap of the first transmission path between the power amplifier circuit and the first balun and the second transmission path between the power amplifier circuit and the second balun can be avoided. At the same time, the interference between the first transmission path and the second transmission path is reduced, which is beneficial to improving the stability of the power amplifier during operation, thereby improving the stability of the radio frequency front-end module.

[0018] These or other aspects of this application will become more apparent in the following description of the embodiments. Attached Figure Description

[0019] Figure 1 A schematic diagram of the structure of a radio frequency front-end module provided in an embodiment of this application is shown.

[0020] Figure 2 Shown Figure 1 The diagram shows the interaction between the substrate and the power amplifier chip in the RF front-end module.

[0021] Figure 3 Shown Figure 1 The diagram shows a power amplifier circuit and an output circuit in the RF front-end module.

[0022] Figure 4 Shown Figure 1 Another circuit diagram of the power amplifier circuit and output circuit in the RF front-end module shown.

[0023] Figure 5Shown Figure 1 The diagram shows another structural schematic of the RF front-end module.

[0024] Figure 6 Shown Figure 1 Another circuit diagram of the power amplifier circuit and output circuit in the RF front-end module shown.

[0025] Figure 7 Shown Figure 1 The diagram shows another structural schematic of the RF front-end module.

[0026] Figure 8 Shown Figure 1 Another circuit diagram of the power amplifier circuit and output circuit in the RF front-end module shown.

[0027] Figure 9 Shown Figure 1 The diagram shows another structural schematic of the RF front-end module.

[0028] Figure 10 A schematic diagram of the structure of a radio frequency front-end module provided in an embodiment of this application is shown.

[0029] Figure 11 Shown Figure 10 The circuit diagram shown is of the power amplifier circuit and the output circuit in the RF front-end module. Detailed Implementation

[0030] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0031] To enable those skilled in the art to better understand the solutions of this application, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0032] In the embodiments of this application, it should be noted that, in this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0033] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0034] In the description of the embodiments of this application, the words "example" or "for example" are used to indicate exemplification, illustration, or description. Any embodiment or design described as "example" or "for example" in the embodiments of this application is not to be construed as being more preferred or having more advantages than another embodiment or design. The use of the words "example" or "for example" is intended to present relative concepts in a clear manner.

[0035] Furthermore, in the embodiments of this application, "multiple" refers to two or more. Therefore, in the embodiments of this application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, such as one, two, or more. For example, including at least one means including one, two, or more, and is not limited to which ones are included. For example, including at least one of A, B, and C, then it could include A, B, C, A and B, A and C, B and C, or A and B and C.

[0036] It should be noted that in the embodiments of this application, "and / or" describes the relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after it are in an "or" relationship.

[0037] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0038] One embodiment of this application provides a radio frequency front-end module 100. Please refer to [link to relevant documentation]. Figures 1 to 3 As shown, the RF front-end module 100 includes a substrate 10 and a power amplifier 20. The power amplifier 20 includes a power amplifier chip 21 and an output circuit 22. The power amplifier chip 21 and the output circuit 22 are respectively disposed on the substrate 10. The power amplifier chip 21 is located in the setting area A1 on the substrate 10.

[0039] The power amplifier chip 21 integrates a power amplifier circuit 21a, and the output circuit 22 includes a first balun 221 and a second balun 222, which are respectively connected to the power amplifier circuit 21a.

[0040] The power amplifier circuit can be composed of at least one type of amplifier circuit, such as a single-ended amplifier circuit, a differential amplifier circuit, a Dougherty power amplifier circuit, or a balanced power amplifier circuit. This embodiment does not specifically limit the type and structure of the power amplifier circuit.

[0041] As an example, the power amplifier circuit 21a can amplify a pair of differential radio frequency signals separately, output the amplified signal formed by one of the differential radio frequency signals to the first balun 221, and output the amplified signal formed by the other differential radio frequency signal to the second balun 222.

[0042] The setting area A1 of the power amplifier chip 21 has a first central axis S1, in Figure 1 In the top-view perspective shown, the first central axis S1 is also the central axis of the power amplifier chip 21, with the first balun 221 and the second balun 222 located on either side of the first central axis S1. Exemplarily, the first balun 221 and the second balun 222 can be implemented using metal traces wound on the substrate 10, or they can be implemented using surface-mount baluns, or they can be implemented using balun chips; this embodiment does not impose any limitations.

[0043] In one specific embodiment, the first balun 221 and the second balun 222 can be either a balanced-to-unbalanced balun or an unbalanced-to-balanced balun.

[0044] In this embodiment, since the first balun and the second balun are respectively located on both sides of the central axis of the power amplifier chip, the first transmission path between the power amplifier circuit and the first balun and the second transmission path between the power amplifier circuit and the second balun can be avoided from overlapping. At the same time, the interference between the first transmission path and the second transmission path is reduced, which is beneficial to improving the stability of the power amplifier during operation, and thus improving the stability of the RF front-end module.

[0045] In one implementation, the first balun 221 and the second balun 222 are arranged symmetrically with respect to the first central axis S1 of the power amplifier chip 21. Specifically, when the first balun 221 and the second balun 222 are respectively surface mount baluns, balun chips, or metal traces, the mounting area of ​​the first balun 221 on the substrate 10 and the mounting area of ​​the second balun 222 on the substrate 10 are arranged symmetrically with respect to the first central axis S1.

[0046] In this embodiment, the first balun and the second balun are arranged symmetrically with respect to the first central axis, which can improve the symmetry of the first trace between the power amplifier circuit and the first balun and the second trace between the power amplifier circuit and the second balun, thereby improving signal transmission efficiency and further reducing interference between the first transmission path and the second transmission path, thus improving the stability of the RF front-end module.

[0047] In some implementations, please refer to Figure 9 As shown, in the first balun 221, the distance between the trace closest to the first central axis S1 and the first central axis S1 is a first distance h1, and in the second balun 222, the distance between the trace closest to the first central axis S1 and the first central axis S1 is a second distance h2. The first distance h1 and the second distance h2 are equal. For example, the distance between the trace and the first central axis S1 can be the distance from the midpoint of the trace to the first central axis S1.

[0048] In some implementations, please refer to [the relevant documentation]. Figure 9 As shown, the distance between the center point of the magnetic core region of the first balun 221 and the first central axis S1 is the third distance h3, and the distance between the center point of the magnetic core region of the second balun 222 and the first central axis S1 is the fourth distance h4. The third distance h3 and the fourth distance h4 are equal.

[0049] In some embodiments, when the first balun 221 and the second balun 222 are respectively made of metal traces, the metal trace pattern of the first balun 221 and the metal trace pattern of the second balun 222 are arranged symmetrically with respect to the first central axis S1.

[0050] In this embodiment, the metal trace patterns of the first and second baluns are arranged symmetrically with respect to the first central axis. The positions of the same type of input or output terminals of the first and second baluns are also symmetrical with respect to the first central axis. This improves the symmetry of the first transmission path between the power amplifier circuit and the first balun, as well as the second transmission path between the power amplifier circuit and the second balun, thereby improving signal transmission efficiency and further reducing interference between the first and second traces, thus enhancing the stability of the RF front-end module. For example, the first transmission path can be a first trace, and the second transmission path can be a second trace.

[0051] In one implementation, power amplifier 20 is used to amplify the power of radio frequency signals across multiple frequency bands. Please refer to... Figure 4 and Figure 5As shown, the RF front-end module 100 also includes a switch chip 30 disposed on the substrate 10. The switch chip 30 includes a plurality of switch units 31. Each switch unit 31 is used to select and input RF signals of at least one frequency band to the power amplifier chip 21. The power amplifier circuit 21a integrated in the power amplifier chip 21 performs power amplification processing on the RF signals of the frequency band.

[0052] In this embodiment, each switching unit 31 corresponds to at least one frequency band of radio frequency signal. When a radio frequency signal of a specific frequency band is output, the switching unit 31 corresponding to that specific frequency band is turned on, and the other switching units 31 are turned off. In this way, it is possible to be compatible with the output of radio frequency signals of different frequency bands.

[0053] In some implementations, please refer to [the relevant documentation]. Figure 5 As shown, the first balun 221 and the second balun 222 are located on the first side of the power amplifier chip 21 along the first direction L1, and the switch chip 30 is located on the second side of the power amplifier chip 21 along the first direction L1.

[0054] In this embodiment, the first balun and the second balun used to process the output signal of the power amplifier chip are located on the first side of the first direction, and the traces of the output terminal of the power amplifier chip are also located on the first side of the first direction; the switch chip used to select the input signal of the power amplifier chip is located on the second side of the first direction, and the traces of the input terminal of the power amplifier chip are also located on the second side of the first direction. The traces of the input terminal and the traces of the output terminal of the power amplifier chip are far apart from each other, so they will not overlap or interfere with each other, which is beneficial to further improve the stability of the RF front-end module.

[0055] In this context, the first side and the second side of the power amplifier chip are opposite sides of the power amplifier chip along the first direction. For example, the first side of the power amplifier chip is the upper side of the power amplifier chip, and the second side of the power amplifier chip is the lower side of the power amplifier chip; or, the first side of the power amplifier chip is the left side of the power amplifier chip, and the second side of the power amplifier chip is the right side of the power amplifier chip.

[0056] In some implementations, please refer to [the relevant documentation]. Figure 5As shown, the RF front-end module 100 of this embodiment also includes a control chip 40, which is disposed on a substrate and electrically connected to the power amplifier chip 21. Exemplarily, the control chip 40 can be used to output control signals. These control signals can be a first control signal used to control the switching units in the switching chip 30 to be turned on or off; or a second control signal used to turn on the output switch of the bias signal in the power amplifier chip 21. Exemplarily, the control chip 40 can be a CMOS (Complementary Metal-Oxide-Semiconductor) chip, fabricated using CMOS technology.

[0057] The control chip 40 is located on the second side of the power amplifier chip 21 along the first direction L1.

[0058] In this embodiment, the traces between the power amplifier chip and the control chip are far apart from the traces between the power amplifier chip and the first and second baluns, so that the traces do not overlap, which can avoid interference between different signals and further improve the stability of the RF front-end module.

[0059] In some implementations, please refer to [the relevant documentation]. Figure 5 As shown, the first direction L1 is parallel to the first central axis S1 of the power amplifier chip 21; the control chip 40 and the switch chip 30 are arranged side by side along the second direction L2, which is perpendicular to the first direction L1.

[0060] In this embodiment, the first direction and the second direction correspond to the length / width direction and the width / length direction of the power amplifier chip, respectively, making it easier to arrange the wiring between the power amplifier chip and the first balun, the second balun, the control chip and the switch chip in a regular manner.

[0061] As one possible implementation method, please refer to [link / reference]. Figure 5 and Figure 9 As shown, the setting area A1 of the power amplifier chip 21 is divided into a first chip area A11 and a second chip area A12 by the first central axis S1. The projection of the setting area of ​​the first balun 221 along the extension direction of the first central axis S1 is located in the first chip area A11 near the edge A111 of the first balun 211. The projection of the setting area of ​​the second balun 222 along the extension direction of the first central axis S1 is located in the second chip area A12 near the edge A121 of the second balun 222.

[0062] In this embodiment, the first balun corresponds to the first chip region, and the second balun corresponds to the second chip region. This helps to reduce the length of the traces between the first balun and the power amplifier chip, as well as between the second balun and the power amplifier chip. This helps to reduce mutual interference between traces and also helps to reduce insertion loss caused by signals passing through excessively long traces.

[0063] In some implementations, please refer to [the relevant documentation]. Figure 9 As shown, the center point of the core region of the first balun 221 is located on the second central axis S11 of the chip region A11, and the center point of the core region of the second balun 222 is located on the third central axis S12 of the second chip region A12.

[0064] In some implementations, please refer to [the relevant documentation]. Figure 5 As shown, the first balun 221 is symmetrically arranged with respect to the second central axis S11 of the first chip region A11, and the second balun 222 is symmetrically arranged with respect to the third central axis S12 of the second chip region A12. The first central axis S1, the second central axis S11, and the third central axis S12 are parallel to each other.

[0065] In this embodiment, when the first balun 221 and the second balun 222 are respectively surface mount baluns, balun chips, or metal traces, the area where the first balun 221 is disposed on the substrate 10 is symmetrically arranged with respect to the second central axis S11 of the first chip area A11, and the area where the second balun 222 is disposed on the substrate 10 is symmetrically arranged with respect to the third central axis S12 of the second chip area A12. This can further improve the symmetry of the first trace between the power amplifier circuit and the first balun and the second trace between the power amplifier circuit and the second balun, further reduce the interference between the first trace and the second trace, and improve the stability of the RF front-end module.

[0066] In some embodiments, when the first balun 221 and the second balun 222 respectively use metal traces, the metal trace pattern of the first balun 221 is symmetrically arranged with respect to the second central axis S11 of the first chip region A11, and the metal trace pattern of the second balun 222 is symmetrically arranged with respect to the third central axis S12 of the second chip region A12.

[0067] In this embodiment, the metal trace patterns of the first balun and the second balun are axially symmetrical patterns, which can further improve the symmetry of the first trace between the power amplifier circuit and the first balun and the second trace between the power amplifier circuit and the second balun, further reduce the interference between the first trace and the second trace, and improve the stability of the RF front-end module.

[0068] As one implementation method, please refer to Figure 6As shown, the power amplifier circuit 21a includes a first power amplifier branch 211 and a second power amplifier branch 212. The first power amplifier branch 211 includes a first output terminal 211a and a second output terminal 211b, and the second power amplifier branch 212 includes a third output terminal 212a and a fourth output terminal 212b. The first balun 221 includes a first primary side 2210 and a first secondary side 2211 coupled together. The two ends of the first primary side 2210 are respectively connected to the first output terminal 211a and the second output terminal 212b of the first power amplifier branch 211. Terminal 211b, one end of the first secondary side 2211 is connected to the signal output terminal 223 of the output circuit 22, and the other end of the first secondary side 2211 is grounded; the second balun 222 includes a coupled second primary side 2220 and a second secondary side 2222, the two ends of the second primary side 2220 are respectively connected to the third output terminal 212a and the fourth output terminal 212b of the corresponding second power amplifier branch 212, one end of the second secondary side 2222 is connected to the signal output terminal 223 of the output circuit 22, and the other end of the second secondary side 2222 is grounded.

[0069] In this embodiment, the first power amplification branch 211 and the second power amplification branch 212 respectively perform power amplification processing on a pair of differential radio frequency signals. The first power amplification branch 211 outputs a first pair of differential power amplified signals formed by one of the differential radio frequency signals to the first balun 221 through the first output terminal 211a and the second output terminal 211b, respectively. The second power amplification branch 212 outputs a second pair of differential power amplified signals formed by the other differential radio frequency signal to the second balun 222 through the third output terminal 212a and the fourth output terminal 212b, respectively. The first balun 221 and the second balun 222 adopt a differential-to-single-ended architecture. The first balun 221 converts the first pair of differential power amplified signals output by the first power amplification branch 211 into a first differential power amplified radio frequency signal. The second balun 222 converts the second pair of differential power amplified signals output by the second power amplification branch 212 into a second differential power amplified radio frequency signal. The first differential power amplified radio frequency signal and the second differential power amplified radio frequency signal are combined and output at the signal output terminal 223.

[0070] In some implementations, please refer to Figure 6 and Figure 7As shown, the output circuit 22 also includes a first capacitor C1 and a second capacitor C2 disposed on the substrate 10. The first capacitor C1 is connected to the first balun 221, and the second capacitor C2 is connected to the second balun 222. The first capacitor C1 is disposed in the magnetic core region of the first balun 221, and the first end of the first capacitor C1 is connected to the midpoint 221a of the first primary side 2210, and the second end of the first capacitor C1 is grounded. The second capacitor C2 is disposed in the magnetic core region of the second balun 222, and the first end of the second capacitor C2 is connected to the midpoint 222a of the second primary side 2220, and the second end of the second capacitor C2 is grounded.

[0071] The first primary edge 2210 may include a first coil segment L1a and a second coil segment L1b connected in series, and the midpoint 221a of the first primary edge 2210 is the connection point of the first coil segment L1a and the second coil segment L1b; the second primary edge 2220 may include a third coil segment L2a and a fourth coil segment L2b connected in series, and the midpoint 222a of the second primary edge 2220 is the connection point of the third coil segment L2a and the fourth coil segment L2b.

[0072] In this embodiment, the first capacitor is positioned between the midpoint of the first primary side and the ground terminal. The first pair of differential power amplified signals output by the first power amplification branch are differential-mode signals. The midpoint of the first primary side is equivalent to a short circuit for differential-mode signals and an open circuit for common-mode signals. The first capacitor, connected in parallel to ground at the midpoint of the first primary side, provides a path to ground the common-mode signals, thereby improving the common-mode signal rejection level. Similarly, the second capacitor is positioned between the midpoint of the second primary side and the ground terminal. The second pair of differential power amplified signals output by the second power amplification branch are differential-mode signals. The midpoint of the second primary side is equivalent to a short circuit for differential-mode signals and an open circuit for common-mode signals. The second capacitor, connected in parallel to ground at the midpoint of the second primary side, provides a path to ground the common-mode signals, thereby improving the common-mode signal rejection level. Therefore, the placement of the first and second capacitors is beneficial for improving the balance of the power amplifier.

[0073] In some implementations, please refer to Figure 7As shown, the first secondary side 2211 surrounds the magnetic core region, and the first primary side 2210 surrounds the first secondary side 2211. The first primary side 2210 includes a first coil body 22101 and two first connecting portions 22102. The first coil body 22101 is a single-turn structure with a first opening, located on the side of the first primary side 2210 closer to the power amplifier chip 21. The two first connecting portions 22102 are respectively connected to the two ends of the first coil body 22101. The first secondary side 2211 includes a second coil body 22111 and two second connecting portions 22112. The second coil body 22111 is a single-turn structure with a second opening, located on the side of the first primary side 2210 away from the power amplifier chip 21. The two second connecting portions 22112 are respectively connected to the two ends of the second coil body 22111.

[0074] Correspondingly, the second secondary side 2222 is disposed outside the magnetic core region, and the second primary side 2220 is disposed outside the second secondary side 2222. The second primary side 2220 includes a third coil body 22201 and two third connecting parts 22202. The third coil body 22201 is a single-turn structure with a third opening. The third opening is located on the side of the second primary side 2220 closer to the power amplifier chip 21. The two third connecting parts 22202 are respectively connected to the two ends of the third coil body 22201. The second secondary side 2222 includes a fourth coil body 22221 and two fourth connecting parts 22222. The fourth coil body 22221 is a single-turn structure with a fourth opening. The fourth opening is close to the side of the second primary side 2220 away from the power amplifier chip 21. The two fourth connecting parts 22222 are respectively connected to the two ends of the fourth coil body 22221.

[0075] In this embodiment, the two first connection portions of the first primary side are respectively connected to the first output terminal and the second output terminal of the first power amplifier branch. The two first connection portions of the first primary side are positioned close to the power amplifier chip, which helps to shorten the trace distance between the first balun and the power amplifier chip. Similarly, the two third connection portions of the second primary side are respectively connected to the third output terminal and the fourth output terminal of the second power amplifier branch. The two third connection portions of the second primary side are positioned close to the power amplifier chip, which helps to shorten the trace distance between the second balun and the power amplifier chip. Simultaneously, the two second connection portions of the first secondary side are respectively used to connect to the signal output terminal and ground of the output circuit. The two second connection portions of the first secondary side are positioned far from the power amplifier chip, which helps to shorten the trace distance between the first balun and the signal output terminal. Likewise, the two fourth connection portions of the second secondary side are respectively used to connect to the signal output terminal and ground of the output circuit. The two fourth connection portions of the second secondary side are positioned far from the power amplifier chip, which helps to shorten the trace distance between the second balun and the signal output terminal.

[0076] In some embodiments, the first capacitor C1 and the second capacitor C2 are surface-mount capacitors disposed on the surface of the substrate 10. In this embodiment, by using surface-mount capacitors, the capacitor manufacturing process is simplified, and circuit debugging is easier.

[0077] In some implementations, please refer to Figure 8 As shown, the first power amplifier branch 211 further includes a first power amplifier module 2111, a third balun 2112, and a second power amplifier module 2113 connected in sequence; the second power amplifier module 2113 is a differential power amplifier module, and its two output terminals are the first output terminal 211a and the second output terminal 211b of the first power amplifier branch 211, respectively. The second power amplifier branch 212 further includes a third power amplifier module 2121, a fourth balun 2122, and a fourth power amplifier module 2123 connected in sequence; the fourth power amplifier module 2123 is a differential power amplifier module, and its two output terminals are the third output terminal 212a and the fourth output terminal 212b of the second power amplifier branch 212, respectively.

[0078] In this embodiment, the last stage of the first power amplification branch and the second power amplification branch adopts a differential amplification structure to ensure high output power.

[0079] In some implementations, please refer to Figure 8 As shown, the third balun 2112 includes a third primary side 211c and a third secondary side 211d that are coupled to each other. One end of the third primary side 211c is connected to the output terminal of the first power amplifier module 2111, and the other end of the third primary side 211c is grounded. The two ends of the third secondary side 211d are respectively connected to the two input terminals of the second power amplifier module 2113.

[0080] Among them, the third balun 2112 adopts a single-ended to differential architecture, which can convert one radio frequency signal output from the output terminal of the first power amplifier module 2111 into a pair of differential signals. The pair of differential signals is amplified by the second power amplifier module 2113 to form the first pair of differential power amplified signals.

[0081] Accordingly, the fourth balun 2122 includes a fourth primary side 212c and a fourth secondary side 212d coupled to each other. One end of the fourth primary side 212c is connected to the output terminal of the third power amplifier module 2121, and the other end of the fourth primary side 212c is grounded. The two ends of the fourth secondary side 212d are respectively connected to the two input terminals of the fourth power amplifier module 2123.

[0082] Among them, the fourth balun 2122 adopts a single-ended to differential architecture, which can convert one radio frequency signal output from the output terminal of the third power amplifier module 2121 into a pair of differential signals. The pair of differential signals is amplified by the fourth power amplifier module 2123 to form a second pair of differential power amplified signals.

[0083] In some embodiments, the power amplifier circuit 21a further includes a third capacitor C3 and a fourth capacitor C4. The third capacitor C3 is connected to the third balun 2112, the first end of the third capacitor C3 is connected to the midpoint of the third secondary side 211d, and the second end of the third capacitor C3 is grounded. The fourth capacitor C4 is connected to the fourth balun 2122, the first end of the fourth capacitor C4 is connected to the midpoint of the fourth secondary side 212d, and the second end of the fourth capacitor C4 is grounded.

[0084] The third secondary side 211d may include a fifth coil segment and a sixth coil segment connected in series, and the midpoint of the third secondary side 211d is the connection point of the fifth coil segment and the sixth coil segment; the fourth secondary side 212d may include a seventh coil segment and an eighth coil segment connected in series, and the midpoint of the fourth secondary side 212d is the connection point of the seventh coil segment and the eighth coil segment.

[0085] In this embodiment, the third capacitor is positioned between the midpoint of the third secondary side and the ground terminal. The midpoint of the third secondary side acts as a short circuit for differential-mode signals and an open circuit for common-mode signals. The third capacitor, connected in parallel to ground at the midpoint of the third secondary side, provides a path for grounding the common-mode signal, thus improving the common-mode signal rejection level. Similarly, the fourth capacitor is positioned between the midpoint of the fourth secondary side and the ground terminal. The midpoint of the fourth secondary side acts as a short circuit for differential-mode signals and an open circuit for common-mode signals. The fourth capacitor, connected in parallel to ground at the midpoint of the fourth secondary side, provides a path for grounding the common-mode signal, further improving the common-mode signal rejection level. Therefore, the placement of the third and fourth capacitors helps improve the balance of the power amplifier.

[0086] In some embodiments, the third capacitor C3 and the fourth capacitor C4 are surface-mount capacitors disposed on the surface of the substrate 10. In this embodiment, by using surface-mount capacitors, the capacitor manufacturing process is simplified, and circuit debugging is easier.

[0087] In some embodiments, the first power amplifier module 2111 includes a first power amplifier unit 2101 and a second power amplifier unit 2102. The input terminal of the first power amplifier unit 2101 is connected to the input terminal of the power amplifier 20. The first power amplifier unit 2101 and the second power amplifier unit 2102 are single-ended power amplifier units, and the output terminal of the second power amplifier unit 2102 is the output terminal of the first power amplifier module 2111.

[0088] The third power amplifier module 2121 includes a third power amplifier unit 2103 and a fourth power amplifier unit 2104. The input terminal of the third power amplifier unit 2103 is connected to the input terminal of the power amplifier 20. The third power amplifier unit 2103 and the fourth power amplifier unit 2104 are both single-ended power amplifier units. The output terminal of the fourth power amplifier unit 2104 is the output terminal of the third power amplifier module 2121.

[0089] In this embodiment, the first power amplifier module and the third power amplifier module each have a two-stage power amplifier structure, which is beneficial to improving the output power.

[0090] For example, please refer to Figure 8 As shown, the first power amplifier unit 2101 may include a first transistor Q1, the second power amplifier unit 2102 may include a second transistor Q2, the third power amplifier unit 2103 may include a third transistor Q3, and the fourth power amplifier unit 2104 may include a fourth transistor Q4. The second power amplifier module 2113 may include a fifth transistor Q5 and a sixth transistor Q6, wherein the control terminal of the fifth transistor Q5 is connected to the first terminal of the third secondary side 211d, and the control terminal of the sixth transistor Q6 is connected to the second terminal of the third secondary side 211d. The fourth power amplifier module 2123 may include a seventh transistor Q7 and an eighth transistor Q8, wherein the control terminal of the seventh transistor Q7 is connected to the first terminal of the fourth secondary side 212d, and the control terminal of the eighth transistor Q8 is connected to the second terminal of the fourth secondary side 212d.

[0091] In some implementations, please refer to Figure 8 As shown, the RF front-end module 100 also includes a first power supply terminal 11 and a second power supply terminal 12 disposed on the substrate 10. The first power amplification unit 2101 and the second power amplification unit 2102 are respectively connected to the first power supply terminal 11. The second power amplification module 2113 is connected to the second power supply terminal 12 through the first balun 221. The third power amplification unit 2103 and the fourth power amplification unit 2104 are respectively connected to the first power supply terminal 11. The fourth power amplification module 2123 is connected to the second power supply terminal 12 through the second balun 222.

[0092] In this embodiment, the first two power amplification structures in the first power amplification branch and the second power amplification branch are connected to the same power supply terminal, and the last power amplification structure in the first power amplification branch and the second power amplification branch is connected to another power supply terminal through a corresponding balun, so as to avoid overlapping of traces and mutual interference of traces and improve the stability of the RF front-end module.

[0093] In some implementations, please refer to Figure 8As shown, the output terminal 210a of the first power amplifier unit 2101 and the output terminal 210b of the second power amplifier unit 2102 are respectively connected to the first power supply terminal 11, the output terminal 210c of the third power amplifier unit 2103 and the output terminal 210d of the fourth power amplifier unit 2104 are respectively connected to the first power supply terminal 11, the second power supply terminal 12 is connected to the midpoint 221a of the first primary side 2210, and the second power supply terminal 12 is also connected to the midpoint 222a of the second primary side 2220.

[0094] In this embodiment, the first, second, third, and fourth power amplification units are each connected to the first power supply terminal through their respective output terminals, thus multiplexing the output terminals as power supply terminals and achieving signal port multiplexing, simplifying the circuit structure. Simultaneously, the first and second baluns are each connected to the second power supply terminal through the midpoint of their respective primary sides, multiplexing the connection terminals with the first or second capacitor as power supply terminals, achieving signal port multiplexing and simplifying the circuit structure.

[0095] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a also includes a choke unit 213. The first end of one choke unit 213 is connected to the output terminal (power supply terminal) 210a of the first power amplifier unit 2101. The second end of the choke unit 213 and the output terminal (power supply terminal) 210b of the second power amplifier unit 2102 are respectively connected to the first power supply terminal 11. The first end of another choke unit 213 is connected to the output terminal (power supply terminal) 210c of the third power amplifier unit 2103. The second end of the choke unit 213 and the output terminal (power supply terminal) 210d of the fourth power amplifier unit 2104 are respectively connected to the first power supply terminal 11.

[0096] The choke unit 213 is used to prevent the radio frequency signals at the first power amplifier unit 2101 and the third power amplifier unit 2103 from leaking to the first power supply terminal 11, thereby ensuring the normal operation of the power amplifier 20. In addition, the choke unit 213 can also prevent the AC component of the first supply voltage VCC1 output from the first power supply terminal 11, which is an interference signal, from entering the first power amplifier unit 2101 and the third power amplifier unit 2103.

[0097] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a further includes a stabilizing unit 214, which is connected in parallel with the choke unit 213. The first end of the stabilizing unit 214 is connected to the first end of the choke unit 213, and the second end of the stabilizing unit 214 is connected to the second end of the choke unit 213. For example, the choke unit 213 may include an inductor.

[0098] One stabilizing unit 214 is used to suppress a portion of the out-of-band low-frequency signals in the radio frequency signals coupled to the first power amplifier unit 2101 by the second power amplifier unit 2102 and the subsequent unit, and the other stabilizing unit 214 is used to suppress a portion of the out-of-band low-frequency signals in the radio frequency signals coupled to the third power amplifier unit 2103 by the fourth power amplifier unit 2104 and the subsequent unit, thereby reducing the out-of-band low-frequency gain of the aforementioned radio frequency signals and improving the stability of the power amplifier 20 during operation. For example, the stabilizing unit 214 may include at least one resistor.

[0099] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a may further include a signal input terminal 20a, a first DC blocking capacitor 215, and a second DC blocking capacitor 216. One of the first DC blocking capacitors 215 is connected between the signal input terminal 20a and the control terminal of the first transistor Q1, preventing the DC bias signal applied to the control terminal of the first transistor Q1 from flowing to the signal input terminal 20a, thus ensuring the smooth operation of the first transistor Q1. The other first DC blocking capacitor 215 is connected between the signal input terminal 20a and the control terminal of the third transistor Q3, preventing the DC bias signal applied to the control terminal of the third transistor Q3 from flowing to the signal input terminal 20a, thus ensuring the smooth operation of the third transistor Q3. One of the second DC blocking capacitors 216 is connected between the first terminal of the first transistor Q1 and the control terminal of the second transistor Q2. It is used to prevent the DC bias signal applied at the control terminal of the second transistor Q2 from flowing to the first transistor Q1, so as to ensure that the second transistor Q2 can work smoothly. The other second DC blocking capacitor 216 is connected between the first terminal of the third transistor Q3 and the control terminal of the fourth transistor Q4. It is used to prevent the DC bias signal applied at the control terminal of the fourth transistor Q4 from flowing to the third transistor Q3, so as to ensure that the fourth transistor Q4 can work smoothly.

[0100] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a may also include a first isolation unit 2171 and a second isolation unit 2172.

[0101] In the first power amplifier branch 211, the first end of the first isolation unit 2171 is connected to the second end of the choke unit 213, and the second end of the first isolation unit 2171 is connected to the first power supply terminal 11. The first end of the second isolation unit 2172 is connected to the output terminal of the second power amplifier unit 2102, and the second end of the second isolation unit 2172 is connected to the first power supply terminal 11. The first isolation unit 2171 and the second isolation unit 2172 are used to isolate the radio frequency signal between the first power amplifier unit 2101 and the second power amplifier unit 2102 to improve the operating stability of the power amplifier 20.

[0102] In the second power amplifier branch 212, the first end of the first isolation unit 2171 is connected to the second end of the choke unit 213, and the second end of the first isolation unit 2171 is connected to the first power supply terminal 11. The first end of the second isolation unit 2172 is connected to the output terminal of the fourth power amplifier unit 2104, and the second end of the second isolation unit 2172 is connected to the first power supply terminal 11. The first isolation unit 2171 and the second isolation unit 2172 are used to isolate the radio frequency signals between the third power amplifier unit 2103 and the fourth power amplifier unit 2104 to improve the operating stability of the power amplifier 20.

[0103] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a may also include a first decoupling unit 2181 and a second decoupling unit 2182.

[0104] In the first power amplifier branch 211, one end of the first decoupling unit 2181 is connected to the first end of the first isolation unit 2171, and the other end is grounded. One end of the second decoupling unit 2182 is connected to the first end of the second isolation unit 2172, and the other end is grounded. By setting the first decoupling unit 2181 and the second decoupling unit 2182, most of the output signals coupled to the first power amplifier unit 2101 can be filtered out. The signals that are not filtered out will reach the branch where the choke unit 213 and the stabilizing unit 214 are located, and then the choke unit 213 and the stabilizing unit 214 will suppress the above signals to avoid the power amplifier 20 from oscillating, thereby improving the operating stability of the power amplifier 20.

[0105] In the second power amplifier branch 212, one end of the first decoupling unit 2181 is connected to the first end of the first isolation unit 2171, and the other end is grounded. One end of the second decoupling unit 2182 is connected to the first end of the second isolation unit 2172, and the other end is grounded. By setting the first decoupling unit 2181 and the second decoupling unit 2182, most of the output signals coupled to the third power amplifier unit 2103 can be filtered out. The unfiltered signals will reach the branch where the choke unit 213 and the stabilizing unit 214 are located, and then the choke unit 213 and the stabilizing unit 214 will suppress the above signals to avoid the power amplifier 20 from oscillating, thereby improving the operating stability of the power amplifier 20.

[0106] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a may also include a third DC blocking capacitor 2191 and a fourth DC blocking capacitor 2192.

[0107] In the first power amplifier branch 211, one end of the third secondary side 211d is connected to the control terminal of the fifth transistor Q5 via a third DC blocking capacitor 2191. The third DC blocking capacitor 2191 prevents the DC bias signal applied to the control terminal of the fifth transistor Q5 from flowing to the third secondary side 211d, thus ensuring the smooth operation of the fifth transistor Q5. The other end of the third secondary side 211d is connected to the control terminal of the sixth transistor Q6 via a fourth DC blocking capacitor 2192. The fourth DC blocking capacitor 2192 prevents the DC bias signal applied to the control terminal of the sixth transistor Q6 from flowing to the third secondary side 211d, thus ensuring the smooth operation of the sixth transistor Q6. Furthermore, the third DC blocking capacitor 2191 and the fourth DC blocking capacitor 2192, together with the third balun 2112, can participate in impedance matching to improve the transmission efficiency of the radio frequency signal.

[0108] In the second power amplifier branch 212, one end of the fourth secondary side 212d is connected to the control terminal of the seventh transistor Q7 via the third DC blocking capacitor 2191. The third DC blocking capacitor 2191 prevents the DC bias signal applied to the control terminal of the seventh transistor Q7 from flowing to the fourth secondary side 212d, thus ensuring the smooth operation of the seventh transistor Q7. The other end of the fourth secondary side 212d is connected to the control terminal of the eighth transistor Q8 via the fourth DC blocking capacitor 2192. The fourth DC blocking capacitor 2192 prevents the DC bias signal applied to the control terminal of the eighth transistor Q8 from flowing to the fourth secondary side 212d, thus ensuring the smooth operation of the eighth transistor Q8. In addition, the third DC blocking capacitor 2191 and the fourth DC blocking capacitor 2192, together with the fourth balun 2122, can participate in impedance matching to improve the transmission efficiency of the radio frequency signal.

[0109] In some implementations, please refer to Figure 8 As shown, the power amplifier circuit 21a may also include a fifth DC blocking capacitor 2193.

[0110] In the first power amplification branch 211, one end of the fifth DC blocking capacitor 2193 is connected to the second end of the third primary side 211c, and the other end is grounded. Since the first supply voltage VCC1 output from the first power supply terminal 11 flows through the third primary side 211c to the first end of the second transistor Q2 to supply power to the second transistor Q2, in order to prevent the first supply voltage VCC1 from short-circuiting to ground at the second end of the third primary side 211c, the fifth DC blocking capacitor 2193 is set between the second end of the third primary side 211c and the ground terminal to block DC and ensure the smooth operation of the second transistor Q2.

[0111] In the second power amplifier branch 212, one end of the fifth DC blocking capacitor 2193 is connected to the second terminal of the fourth primary side 212c, and the other end is grounded. Since the first supply voltage VCC1 output from the first power supply terminal 11 flows through the fourth primary side 212c to the first terminal of the fourth transistor Q4 to supply power to the fourth transistor Q4, in order to prevent the first supply voltage VCC1 from short-circuiting to ground at the second terminal of the fourth primary side 212c, the fifth DC blocking capacitor 2193 is set between the second terminal of the fourth primary side 212c and the ground terminal to block DC and ensure the smooth operation of the fourth transistor Q4.

[0112] One embodiment of this application provides a radio frequency front-end module 100'. Please refer to [link / reference needed]. Figure 10 As shown, the RF front-end module 100' includes: a substrate 10, a power amplifier 20, a switching chip 30, and a control chip 40.

[0113] The power amplifier 20 includes a power amplifier chip 21 and an output circuit 22, which are respectively disposed on the substrate 10. The power amplifier chip 21 is located in the disposal area A1 on the substrate 10. The power amplifier chip 21 integrates a power amplifier circuit 21a, and the output circuit 22 includes a first balun 221 and a second balun 222, which are respectively connected to the power amplifier circuit 21a. The power amplifier circuit 21a can amplify a pair of differential radio frequency signals, outputting the amplified signal formed by one of the differential radio frequency signals to the first balun 221, and outputting the amplified signal formed by the other differential radio frequency signal to the second balun 222.

[0114] The setting area A1 of the power amplifier chip 21 has a first central axis S1, in Figure 1 In the top-down view shown, the first central axis S1 is also the central axis of the power amplifier chip 21, and the first balun 221 and the second balun 222 are located on both sides of the first central axis S1.

[0115] Please refer to Figure 11 As shown, a switch chip 30 is disposed on a substrate 10, and a power amplifier 20 is used to amplify the power of radio frequency signals in multiple frequency bands. The switch chip 30 includes multiple switch units 31, each switch unit 31 being used to select and input at least one frequency band radio frequency signal to the power amplifier chip 21. The power amplifier circuit 21a integrated in the power amplifier chip 21 amplifies the radio frequency signal of that frequency band. Each switch unit 31 corresponds to at least one frequency band radio frequency signal. When a specific frequency band radio frequency signal is output, the switch unit 31 corresponding to that specific frequency band is turned on, and the other switch units 31 are turned off. In this way, it is possible to be compatible with the output of radio frequency signals in different frequency bands.

[0116] The control chip 40 is disposed on the substrate and is electrically connected to the power amplifier chip 21. Exemplarily, the control chip 40 can be used to output control signals. These control signals can be a first control signal used to control the switching units in the switching chip 30 to be turned on or off; or a second control signal used to turn on the output switch of the bias signal in the power amplifier chip 21. Exemplarily, the control chip 40 can be a CMOS (Complementary Metal-Oxide-Semiconductor) chip, fabricated using CMOS technology.

[0117] Please continue reading. Figure 10 As shown, the first balun 221 and the second balun 222 are located on the first side of the power amplifier chip 21 along the first direction L1, and the switch chip 30 is located on the second side of the power amplifier chip 21 along the first direction L1.

[0118] In this embodiment, since the first balun and the second balun are respectively located on both sides of the central axis of the power amplifier chip, overlapping of the first trace between the power amplifier circuit and the first balun, and the second trace between the power amplifier circuit and the second balun, can be avoided. This also reduces interference between the first and second traces, which is beneficial for improving the stability of the power amplifier during operation, and thus improving the stability of the RF front-end module. Furthermore, in this embodiment, the first and second baluns used to process the output signal of the power amplifier chip are located on the first side of the first direction, and the traces at the output end of the power amplifier chip are also located on the first side of the first direction. The switching chip used to select the input signal of the power amplifier chip and the control chip used to send control signals are both located on the second side of the first direction, and the traces at the input end of the power amplifier chip are also located on the second side of the first direction. The input and output traces of the power amplifier chip are far apart, preventing overlap and mutual interference, which further improves the stability of the RF front-end module.

[0119] As one possible implementation method, please refer to [link / reference]. Figure 10 As shown, the first balun 221 and the second balun 222 are symmetrically arranged with respect to the first central axis S1 of the power amplifier chip 21. The setting area A1 of the power amplifier chip 21 is divided into a first chip area A11 and a second chip area A12 by the first central axis S1. The first balun 221 is symmetrically arranged with respect to the second central axis S11 of the first chip area A11, and the second balun 222 is symmetrically arranged with respect to the third central axis S12 of the second chip area A12. The first central axis S1, the second central axis S11, and the third central axis S12 are parallel to each other.

[0120] In this embodiment, by symmetrically arranging the first balun and the second balun, the symmetry of the first trace between the power amplifier circuit and the first balun and the second trace between the power amplifier circuit and the second balun can be further improved, the interference between the first trace and the second trace can be further reduced, and the stability of the RF front-end module can be improved.

[0121] In some implementations, please refer to Figure 11 As shown, the first balun 221 includes a first primary side 2210 and a first secondary side 2211 coupled together. The two ends of the first primary side 2210 are respectively connected to the power amplifier circuit 21a. One end of the first secondary side 2211 is connected to the signal output terminal 223 of the output circuit 22, and the other end of the first secondary side 2211 is grounded. The second balun 222 includes a second primary side 2220 and a second secondary side 2222 coupled together. The two ends of the second primary side 2220 are respectively connected to the power amplifier circuit 21a. One end of the second secondary side 2222 is connected to the signal output terminal 223 of the output circuit 22, and the other end of the second secondary side 2222 is grounded.

[0122] In some implementations, please refer to Figure 9 and Figure 10 As shown, the output circuit 22 also includes a first capacitor C1 and a second capacitor C2 disposed on the substrate 10. The first capacitor C1 is connected to the first balun 221, and the second capacitor C2 is connected to the second balun 222. The first capacitor C1 is disposed in the magnetic core region of the first balun 221, and the first end of the first capacitor C1 is connected to the midpoint 221a of the first primary side 2210, and the second end of the first capacitor C1 is grounded. The second capacitor C2 is disposed in the magnetic core region of the second balun 222, and the first end of the second capacitor C2 is connected to the midpoint 222a of the second primary side 2220, and the second end of the second capacitor C2 is grounded.

[0123] The above description is merely an embodiment of this application. It should be noted that those skilled in the art can make improvements without departing from the inventive concept of this application, but these improvements all fall within the protection scope of this application.

Claims

1. A radio frequency front-end module, characterized in that, include: substrate; A power amplifier, the power amplifier including a power amplifier chip and an output circuit respectively disposed on the substrate; The power amplifier chip integrates a power amplifier circuit. The output circuit includes a first balun and a second balun connected to the power amplifier circuit. The first balun and the second balun are located on either side of the first central axis of the setting area of ​​the power amplifier chip.

2. The radio frequency front-end module according to claim 1, characterized in that, The third distance between the center point of the magnetic core region of the first balun and the first central axis is equal to the fourth distance between the center point of the magnetic core region of the second balun and the first central axis.

3. The radio frequency front-end module according to claim 1, characterized in that, The first balun and the second balun are arranged symmetrically with respect to the first central axis of the power amplifier chip.

4. The radio frequency front-end module according to claim 1, characterized in that, The power amplifier is used to amplify the power of radio frequency signals in multiple frequency bands. The radio frequency front-end module also includes a switching chip disposed on the substrate. The switching chip includes multiple switching units, each of which is used to select and input the radio frequency signal of at least one frequency band to the power amplifier chip. The first balun and the second balun are located on the first side of the power amplifier chip along the first direction, and the switching chip is located on the second side of the power amplifier chip along the first direction.

5. The radio frequency front-end module according to claim 4, characterized in that, The radio frequency front-end module also includes: A control chip is disposed on the substrate, and the control chip is electrically connected to the power amplifier chip; the control chip is located on the second side of the power amplifier chip along the first direction.

6. The radio frequency front-end module according to claim 5, characterized in that, The first direction is parallel to the first central axis of the power amplifier chip; the control chip and the switch chip are arranged side by side along the second direction, which is perpendicular to the first direction.

7. The radio frequency front-end module according to claim 1, characterized in that, The setting area of ​​the power amplifier chip is divided into a first chip area and a second chip area by the first central axis. The projection of the setting area of ​​the first balun along the extension direction of the first central axis is located within the edge of the first chip area near the first balun. The projection of the setting area of ​​the second balun along the extension direction of the first central axis is located within the edge of the second chip area near the second balun.

8. The radio frequency front-end module according to claim 7, characterized in that, The center point of the magnetic core region of the first balun is located on the second central axis of the first chip region, and the center point of the magnetic core region of the second balun is located on the third central axis of the second chip region.

9. The radio frequency front-end module according to claim 7, characterized in that, The first balun is symmetrically arranged with respect to the second central axis of the first chip region, and the second balun is symmetrically arranged with respect to the third central axis of the second chip region. The first central axis, the second central axis, and the third central axis are parallel to each other.

10. The radio frequency front-end module according to claim 1, characterized in that, The power amplifier circuit includes a first power amplifier branch and a second power amplifier branch. The first power amplifier branch includes a first output terminal and a second output terminal, and the second power amplifier branch includes a third output terminal and a fourth output terminal. The first balun includes a coupled first primary side and a coupled first secondary side. The two ends of the first primary side are respectively connected to the first output terminal and the second output terminal of the first power amplifier branch. One end of the first secondary side is connected to the signal output terminal of the output circuit, and the other end of the first secondary side is grounded. The second balun includes a coupled second primary side and a coupled second secondary side. The two ends of the second primary side are respectively connected to the third output terminal and the fourth output terminal of the corresponding second power amplifier branch. One end of the second secondary side is connected to the signal output terminal of the output circuit, and the other end of the second secondary side is grounded.

11. The radio frequency front-end module according to claim 10, characterized in that, The output circuit also includes a first capacitor and a second capacitor disposed on the substrate; The first capacitor is connected to the first balun; the first capacitor is located in the core region of the first balun, the first end of the first capacitor is connected to the midpoint of the first primary side, and the second end of the first capacitor is grounded; the second capacitor is connected to the second balun; the second capacitor is located in the core region of the second balun, the first end of the second capacitor is connected to the midpoint of the second primary side, and the second end of the second capacitor is grounded.

12. The radio frequency front-end module according to claim 11, characterized in that, The first secondary edge is disposed outside the magnetic core region, and the first primary edge is disposed outside the first secondary edge; the first primary edge includes a first coil body and two first connecting parts, the first coil body is a single-turn structure with a first opening, the first opening is located on the side of the first primary edge closer to the power amplifier chip, and the two first connecting parts are respectively connected to the two ends of the first coil body; the first secondary edge includes a second coil body and two second connecting parts, the second coil body is a single-turn structure with a second opening, the second opening is close to the side of the first primary edge away from the power amplifier chip, and the two second connecting parts are respectively connected to the two ends of the second coil body; The second secondary edge is disposed outside the magnetic core region, and the second primary edge is disposed outside the second secondary edge; the second primary edge includes a third coil body and two third connecting parts, the third coil body is a single-turn structure with a third opening, the third opening is located on the side of the second primary edge closer to the power amplifier chip, and the two third connecting parts are respectively connected to the two ends of the third coil body; the second secondary edge includes a fourth coil body and two fourth connecting parts, the fourth coil body is a single-turn structure with a fourth opening, the fourth opening is close to the side of the second primary edge away from the power amplifier chip, and the two fourth connecting parts are respectively connected to the two ends of the fourth coil body.

13. The radio frequency front-end module according to claim 11, characterized in that, The first capacitor and the second capacitor are surface-mount capacitors disposed on the surface of the substrate.

14. The radio frequency front-end module according to claim 10, characterized in that, The first power amplification branch further includes a first power amplification module, a third balun, and a second power amplification module connected in sequence; the second power amplification module is a differential power amplification module, and the two output terminals of the second power amplification module are the first output terminal and the second output terminal of the first power amplification branch, respectively; The second power amplification branch further includes a third power amplification module, a fourth balun, and a fourth power amplification module connected in sequence; the fourth power amplification module is a differential power amplification module, and the two output terminals of the fourth power amplification module are the third output terminal and the fourth output terminal of the second power amplification branch, respectively.

15. The radio frequency front-end module according to claim 14, characterized in that, The third balun includes a third primary side and a third secondary side that are coupled to each other. One end of the third primary side is connected to the output terminal of the first power amplifier module, and the other end of the third primary side is grounded. The two ends of the third secondary side are respectively connected to the two input terminals of the second power amplifier module. The fourth balun includes a fourth primary side and a fourth secondary side that are coupled to each other. One end of the fourth primary side is connected to the output terminal of the third power amplifier module, and the other end of the fourth primary side is grounded. The two ends of the fourth secondary side are respectively connected to the two input terminals of the fourth power amplifier module.

16. The radio frequency front-end module according to claim 15, characterized in that, The power amplifier circuit further includes a third capacitor and a fourth capacitor. The third capacitor is connected to the third balun. The first terminal of the third capacitor is connected to the midpoint of the third secondary side, and the second terminal of the third capacitor is grounded. The fourth capacitor is connected to the fourth balun, the first end of the fourth capacitor is connected to the midpoint of the fourth secondary side, and the second end of the fourth capacitor is grounded.

17. The radio frequency front-end module according to claim 16, characterized in that, The third capacitor and the fourth capacitor are surface-mount capacitors disposed on the surface of the power amplifier chip.

18. The radio frequency front-end module according to claim 14, characterized in that, The first power amplifier module includes a first power amplifier unit and a second power amplifier unit. The input terminal of the first power amplifier unit is connected to the input terminal of the power amplifier. The second power amplifier unit is a single-ended power amplifier unit. The output terminal of the second power amplifier unit is the output terminal of the first power amplifier module. The third power amplifier module includes a third power amplifier unit and a fourth power amplifier unit. The input terminal of the third power amplifier unit is connected to the input terminal of the power amplifier. The fourth power amplifier unit is a single-ended power amplifier unit, and the output terminal of the fourth power amplifier unit is the output terminal of the third power amplifier module.

19. The radio frequency front-end module according to claim 18, characterized in that, The radio frequency front-end module further includes a first power supply terminal and a second power supply terminal disposed on the substrate. The first power amplification unit and the second power amplification unit are respectively connected to the first power supply terminal. The second power amplification module is connected to the second power supply terminal through the first balun. The third power amplification unit and the fourth power amplification unit are respectively connected to the first power supply terminal. The fourth power amplification module is connected to the second power supply terminal through the second balun.

20. The radio frequency front-end module according to claim 19, characterized in that, The output terminals of the first power amplifier unit and the second power amplifier unit are respectively connected to the first power supply terminal, and the second power supply terminal is connected to the midpoint of the first primary side; The output terminals of the third power amplifier unit and the fourth power amplifier unit are respectively connected to the first power supply terminal, and the second power supply terminal is connected to the midpoint of the second primary side.

21. A radio frequency front-end module, characterized in that, include: substrate; A power amplifier is used to amplify the power of radio frequency signals in multiple frequency bands. The power amplifier includes a power amplifier chip and an output circuit respectively disposed on the substrate. The power amplifier chip integrates a power amplifier circuit. The output circuit includes a first balun and a second balun connected to the power amplifier circuit. A switching chip disposed on the substrate, the switching chip comprising a plurality of switching units, the switching units being used to selectively input the radio frequency signal of at least one frequency band to the power amplifier chip; And a control chip disposed on the substrate, the control chip being electrically connected to the power amplifier chip; The first balun and the second balun are located on opposite sides of the first central axis of the power amplifier chip's mounting area. The first balun and the second balun are located on the first side of the power amplifier chip along the first direction. The switch chip and the control chip are located on the second side of the power amplifier chip along the first direction.

22. The radio frequency front-end module according to claim 21, characterized in that, The area where the power amplifier chip is located is divided into a first chip area and a second chip area by the first central axis. The first balun and the second balun are arranged symmetrically with respect to the first central axis of the power amplifier chip. The first balun is arranged symmetrically with respect to the second central axis of the first chip area. The second balun is arranged symmetrically with respect to the third central axis of the second chip area. The first central axis, the second central axis, and the third central axis are parallel to each other.

23. The radio frequency front-end module according to claim 22, characterized in that, The first balun includes a first primary side and a first secondary side coupled together. The two ends of the first primary side are respectively connected to the power amplifier circuit. One end of the first secondary side is connected to the signal output terminal of the output circuit, and the other end of the first secondary side is grounded. The second balun includes a second primary side and a second secondary side coupled together. The two ends of the second primary side are respectively connected to the power amplifier circuit. One end of the second secondary side is connected to the signal output terminal of the output circuit, and the other end of the second secondary side is grounded.

24. The radio frequency front-end module according to claim 23, characterized in that, The output circuit also includes a first capacitor and a second capacitor disposed on the substrate; The first capacitor is connected to the first balun; the first capacitor is located in the magnetic core region of the first balun, the first end of the first capacitor is connected to the midpoint of the first primary side, and the second end of the first capacitor is grounded; The second capacitor is connected to the second balun; the second capacitor is located in the magnetic core region of the second balun, the first end of the second capacitor is connected to the midpoint of the second primary side, and the second end of the second capacitor is grounded.

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