Package structure
By employing a multi-block design in SiPh applications and setting a conformal metal layer on the outside of the optical waveguide layer to isolate optical signals, the problems of limited packaging space and signal interference are solved, achieving higher density optical I/O and better signal transmission performance.
Patent Information
- Application Number
- CN202422613395.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-29
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2034-10-29
AI Technical Summary
In SiPh applications, the optoelectronic partitioning design results in limited package space configuration and a smaller number of I/Os, while miniaturization makes signal interference difficult to avoid.
A multi-block design is adopted, which involves arranging electrical and optical pads on the substrate and setting a conformal metal layer on the outside of the optical waveguide layer to isolate optical signals and avoid interference.
It improves package space utilization, increases the number of I/Os, and provides higher density optical signal transmission performance, thereby improving optical signal transmission speed and reducing power consumption.
Smart Images
Figure CN223501856U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor packaging technology, specifically to a packaging structure. Background Technology
[0002] In current silicon photonics (SiPh) applications, due to the different conduction methods of electrons and photons and the different pads used for receiving them, most applications currently employ a design that separates the optical path and electrical path into blocks. (Reference) Figure 1 In the illustrated packaging structure, the electrical pads 01 and optical pads 02 are designed in different blocks. For example, multiple electrical pads 01 are concentrated in the first block 04 on the left side of the substrate 03, and multiple optical pads 02 are concentrated in the second block 05 on the right side of the substrate 03. However, this type of partitioned design is limited in terms of spatial arrangement of the packaging structure. Moreover, with the trend of miniaturization, the number of I / O (input / output) that the optoelectronic partitioned design can provide is also relatively small.
[0003] To address the aforementioned issues, a multi-block design is considered for both the optical and electrical paths. (Reference) Figure 2 As shown, multiple electrical pads 01 are arranged in different blocks, and multiple optical pads 02 are arranged in different blocks. The electrical pads 01 and optical pads 02 are mixed together on the substrate 03. This multi-block design can improve the utilization of package space and increase the number of I / Os. However, this multi-block design must also consider that the signals do not interfere with each other, because miniaturization makes the spacing between the pads smaller, which may be difficult to achieve using conventional optical guide technology alone. Utility Model Content
[0004] This application proposes a packaging structure to help solve the technical problem of signal interference in SiPh applications.
[0005] This application discloses a packaging structure comprising: a substrate, including an upper surface and an optical pad disposed on the upper surface; a dielectric layer covering the upper surface of the substrate and the optical pad, and having vias exposing the optical pad; a first optical waveguide layer, comprising: a first portion disposed within the vias, a second portion extending from the upper surface of the dielectric layer, and a transition portion connecting the first portion and the second portion, wherein the outer side of the transition portion is curved; and a first metal layer disposed outside the first optical waveguide layer and conformally thereto.
[0006] In some alternative implementations, the outer side of the bend is rounded.
[0007] In some optional embodiments, the packaging structure further includes a first seed layer disposed between the first optical waveguide layer and the dielectric layer.
[0008] In some alternative embodiments, the first seed layer extends to the upper surface of the dielectric layer, and in a top view, the edge of the first seed layer is exposed above the first metal layer.
[0009] In some optional embodiments, the packaging structure further includes a second seed layer disposed between the first optical waveguide layer and the first metal layer.
[0010] In some alternative implementations, the first metal layer extends into the via.
[0011] In some alternative embodiments, the cross-section of the guide hole is wider at the top and narrower at the bottom.
[0012] In some alternative implementations, the maximum width of the guide hole is smaller than the width of the optical pad.
[0013] In some alternative implementations, the packaging structure further includes a second optical waveguide layer disposed outside the first metal layer.
[0014] In some optional embodiments, the packaging structure further includes a second metal layer disposed outside the second optical waveguide layer and conformally thereto.
[0015] In some alternative implementations, the second optical waveguide layer covers the first optical waveguide layer in a top-down view.
[0016] In some alternative embodiments, the packaging structure further includes a second pad disposed on the upper surface of the substrate and connected to the optical pad via the first optical waveguide layer.
[0017] In some alternative embodiments, the packaging structure further includes a protective layer covering the first optical waveguide layer and the first metal layer.
[0018] In some alternative implementations, the first optical waveguide layer includes two waveguide paths that overlap each other.
[0019] In some alternative embodiments, the cross-sectional shape of the first optical waveguide layer is semi-circular with a radius between 0.5 μm and 5 μm.
[0020] In some alternative embodiments, the first optical waveguide layer includes multiple waveguide lines, wherein the spacing between parallel waveguide lines is between 2 μm and 50 μm.
[0021] In some alternative embodiments, the thickness of the first metal layer is between 0.1 μm and 2 μm.
[0022] In some alternative embodiments, the width of the first seed layer exposed above the first metal layer is between 1 μm and 10 μm.
[0023] To address the technical problem of signal interference in multi-block design in SiPh applications, this application proposes a packaging structure. After forming an optical waveguide layer on the substrate insulating layer, a conformal metal layer is formed on the optical waveguide layer. The optical waveguide layer is then covered by the metal layer, thereby creating optical lines that are isolated by the metal layer and do not interfere with each other, and have a small spacing, thus solving the technical problem of signal interference in SiPh applications.
[0024] This application addresses the problem of optical signal interference, enabling SiPh applications to offer more optical I / O, finer-pitch, and higher-density waveguide circuits, and thus better optical signal transmission performance. Since optical signal transmission speeds are much faster than electrical signal transmission speeds, and the power consumption (heat dissipation) of optical transmission products is much lower than that of metal components transmitting electrical signals, providing more optical I / O and waveguide circuits to achieve better optical signal transmission performance is more beneficial for improving the performance of the final product. Attached Figure Description
[0025] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:
[0026] Figure 1 This is a top view of an existing encapsulation structure that uses a partitioned design.
[0027] Figure 2 This is a top view of an existing packaging structure that uses a multi-block design.
[0028] Figure 3 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 3a of the packaging structure according to this application;
[0029] Figure 4 It is based on Figure 3 A partially enlarged schematic diagram of the packaging structure shown;
[0030] Figure 5 It is based on Figure 3 A top view of the packaging structure shown;
[0031] Figure 6 It is based on Figure 3 The diagram shows the dimensions of the packaging structure.
[0032] Figure 7 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 7a of the packaging structure according to this application;
[0033] Figure 8 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 8a of the packaging structure according to this application;
[0034] Figure 9 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 9a of the packaging structure according to this application;
[0035] Figure 10 This is a schematic diagram of a longitudinal cross-sectional structure of an embodiment 10a of the packaging structure according to this application;
[0036] Figure 11 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 11a of the packaging structure according to this application;
[0037] Figure 12 This is a schematic diagram of a longitudinal cross-sectional structure of an embodiment 12a of the packaging structure according to this application;
[0038] Figure 13-15 This is a schematic diagram of the manufacturing steps according to an embodiment of the packaging structure of this application.
[0039] Explanation of reference numerals / symbols in the attached diagram:
[0040] 01-Electrical pad; 02-Optical pad; 03-Substrate; 04-First block; 05-Second block; 10-Substrate; 11-Optical pad; 12-Dielectric layer; 13-via; 14-First optical waveguide layer; 141-First part; 142-Second part; 143-Turnover part; 140-Waveguide circuit; 15-First metal layer; 16-First seed layer; 17-Second seed layer; 18-Protective layer; 19-Second optical waveguide layer; 20-Second metal layer; 21-Photoresist; 22-Printing template; 23-Extrusion fixture. Detailed Implementation
[0041] The specific embodiments of this application will be described below with reference to the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by this application and the resulting technical effects through the content described herein. It is understood that the specific embodiments described herein are merely illustrative of the relevant invention and are not intended to limit the invention. Furthermore, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.
[0042] It should be readily understood that the meanings of “on,” “above,” and “on top of” in this application should be interpreted in the broadest sense, such that “on” means not only “directly on something,” but also “on something” including intermediate components or layers existing between the two.
[0043] Furthermore, for ease of description, spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” may be used herein to describe the relationship of one element or component to another element or component shown in the accompanying drawings. In addition to the orientations described in the figures, spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90° or otherwise), and the spatial relative descriptive terms used herein may be interpreted accordingly.
[0044] As used herein, the term "layer" refers to a portion of material comprising a region of a certain thickness. A layer may extend over the entirety of an underlying or upper layer structure, or may have a extent smaller than that of the underlying or upper layer structure. Furthermore, a layer may be a region of a homogeneous or heterogeneous continuous structure, with a thickness less than that of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically, and / or along a tapered surface. A substrate may be a single layer, which may include one or more layers, and / or may have one or more layers on, above, and / or below it. A single layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.
[0045] As used herein, the term "substrate" refers to the material on which subsequent material layers are added. The substrate itself may be patterned. The material added on top of the substrate may be patterned or may remain unpatterned. Furthermore, the substrate may comprise a wide variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate may be made of a non-conductive material, such as glass, plastic, or sapphire wafers. Further alternatively, the substrate may have semiconductor devices or circuits formed therein.
[0046] It should be noted that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and to facilitate understanding and reading of the contents described in the specification. They are not intended to limit the scope of this application and therefore have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to the size, without affecting the effects and objectives of this application, should still fall within the scope of the technical content disclosed in this application. Furthermore, terms such as "above," "first," "second," and "a" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.
[0047] It should also be noted that the longitudinal section corresponding to the embodiment of this application can be the section corresponding to the front view direction, the transverse section can be the section corresponding to the right view direction, and the horizontal section can be the section corresponding to the top view direction.
[0048] Furthermore, where there is no conflict, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.
[0049] refer to Figure 3-5 , Figure 3 This is a longitudinal cross-sectional structural diagram of an embodiment 3a of the packaging structure according to this application. Figure 4 It is based on Figure 3 The diagram shows a partially enlarged view of the dashed box area of the packaging structure 3a shown. Figure 5 It is based on Figure 3 The diagram shows a top view of the packaging structure 3a. Figure 3 That is Figure 5 A schematic diagram of the longitudinal cross-section structure in the AA' direction.
[0050] like Figure 3-5 As shown, the packaging structure 3a of this application includes:
[0051] The substrate 10 includes an upper surface and an optical pad 11 disposed on the upper surface;
[0052] The dielectric layer 12 covers the upper surface of the substrate 10 and the optical pad 11, and has vias 13 to expose the optical pad 11.
[0053] The first optical waveguide layer 14 includes: a first part 141 disposed in the guide hole 13, a second part 142 extending and disposed on the upper surface of the dielectric layer 12, and a transition part 143 connecting the first part 141 and the second part 142, wherein the outer side of the transition part 143 is curved.
[0054] The first metal layer 15 is disposed outside the first optical waveguide layer 14 and conforms to the first optical waveguide layer 14.
[0055] Here, the substrate 10 can be a wafer, a panel, a chip, or other structure. The substrate 10 can take different shapes such as square or circular.
[0056] Here, the dielectric layer 12 may be composed of a dielectric material. The dielectric material may be an organic photosensitive or / and non-photosensitive liquid or / and dry film material type dielectric material. For example, the dielectric layer 12 may be polyimide (PI), epoxy resin, ABF (Ajinomoto film), PP (prepreg), or / and acrylic, etc.
[0057] Here, the first optical waveguide layer 14 can be composed of a waveguide material. The waveguide material can be an organic, photosensitive, or / and non-photosensitive liquid, or / and dry film material type waveguide material. For example, the first optical waveguide layer 14 can be polyimide (PI), epoxy resin, ABF (Ajinomoto laminate), PP (prepreg), or / and acrylic, etc. Figure 5 As shown in the top view, the first optical waveguide layer 14 may include multiple waveguide paths 140, which may be parallel, perpendicular, or form other angles with each other. The outer side of the bend 143 of the first optical waveguide layer 14 is curved. Figure 4 The shape shown in the cross-sectional view is a curve, such as a regular curve, to facilitate light transmission and reflection. The first optical waveguide layer 14 achieves a curved surface bend through the turning part 143, bending from the horizontal extension of the second part 142 to the vertical extension of the first part 141.
[0058] Here, the first metal layer 15 is disposed on the outer side of the first optical waveguide layer 14, i.e., on the upper and side surfaces, and conforms to the first optical waveguide layer 14. Its function is to cover and isolate the first optical waveguide layer 14, avoiding optical signal interference, so as to facilitate the formation of waveguide paths 140 with smaller spacing in the optical waveguide layer 14, which are used as optical signal transmission lines. The first metal layer 15 also serves as a reflective layer above the first optical waveguide layer 14, ensuring the transmission of optical signals within the first optical waveguide layer 14. The material of the first metal layer 15 can be selected from Cu (copper), Au (gold), Ag (silver), Al (aluminum), Pd (palladium), Pt (platinum), and Ni (nickel) or alloys thereof. The fabrication process of the first metal layer 15 can be selected from one or a combination of two or more processes such as PVD (physical vapor deposition), electroplating, electroless plating, printing, and metal potting.
[0059] In some alternative embodiments, the outer side of the bend 143 is rounded. Figure 4 The cross-sectional shape shown is an arc. Thus, the turning portion 143 can convert the vertical light signal in the first portion 141 into a horizontal direction through reflection before entering the second portion 142, or it can convert the horizontal light signal in the first portion 141 into a vertical direction through reflection before entering the second portion 142 and transmitting it to the optical pad 11. This avoids loss and attenuation of the light signal during transmission.
[0060] In some optional embodiments, the packaging structure 3a of this application further includes a first seed layer 16 disposed between the first optical waveguide layer 14 and the dielectric layer 12. The material of the first seed layer 16 can be selected from Cu (copper), Au (gold), Ag (silver), Al (aluminum), Pd (palladium), Pt (platinum), and Ni (nickel) or alloys thereof. The fabrication process of the first seed layer 16 can be selected from one or more of the following processes: PVD (physical vapor deposition), electroplating, electroless plating, printing, and metal potting. Here, the first seed layer 16 serves as a carrier layer for the first optical waveguide layer 14 and as a reflective layer below the first optical waveguide layer 14, ensuring the transmission of optical signals within the first optical waveguide layer 14. Here, the first seed layer 16 and the first metal layer 15 can completely cover the first optical waveguide layer 14 from below, above, and sides, achieving better isolation and stronger anti-interference capability.
[0061] In some alternative embodiments, the first seed layer 16 may include a portion located on the inner wall of the via 13 and a portion extending to the upper surface of the dielectric layer. Furthermore, as... Figure 5 As shown, in a top view, the edge of the first seed layer 16 is exposed outside the first metal layer 15. That is, the projection of the first seed layer 16 on the upper surface of the dielectric layer 12 is wider than the projection of the first metal layer 15 on the upper surface of the dielectric layer 12. In other words, the projection of the first metal layer 15 on the upper surface of the dielectric layer 12 falls within the projection of the first seed layer 16 on the upper surface of the dielectric layer 12.
[0062] In some alternative implementations, such as Figure 4 As shown, the first metal layer 15 extends into the via 13, that is, a portion of the first metal layer 15 extends downward into the via 13 and can be connected to the first seed layer 16.
[0063] In some alternative embodiments, both the first metal layer 15 and the first seed layer 16 cover the via 13 in a top view, such as... Figure 5 As shown. In other words, in a top-down view, the projections of both the first metal layer 15 and the first seed layer 16 extend beyond the via 13.
[0064] In some alternative implementations, such as Figure 4 As shown, the cross-section of the via 13 is wider at the top and narrower at the bottom. In terms of manufacturing process, the via 13 can be formed by processes such as photolithography and electroplating / sputtering, which easily creates a via 13 with a cross-sectional shape that is wider at the top and narrower at the bottom.
[0065] In some alternative embodiments, the maximum width of the guide hole 13 is smaller than the width of the optical pad 11, that is, the projection of the guide hole 13 onto the optical pad 11 falls within the range of the optical pad 11, so as to ensure a good connection between the guide hole 13 and the optical pad 11.
[0066] In some optional embodiments, the packaging structure 3a of this application further includes: a second pad (not shown in the figure), disposed on the upper surface of the substrate 10, and connected to the optical pad 11 through the first optical waveguide layer 14.
[0067] In some optional embodiments, the encapsulation structure 3a of this application further includes a protective layer 18 disposed above the dielectric layer 12, covering the first optical waveguide layer 14 and the first metal layer 15. The protective layer 18 may be formed of a dielectric material, and its material composition may be the same as or different from that of the dielectric layer 12. For example, the protective layer 18 may be polyimide (PI), epoxy resin, ABF (Ajinomoto film), PP (prepreg), or / and acrylic acid, etc.
[0068] Next reference Figure 6 , Figure 6 It is based on Figure 3 The dimensions of the packaging structure 3a shown are illustrated in the diagram. Figure 6 As shown:
[0069] The first optical waveguide layer 14 includes multiple waveguide paths 140, wherein the width GBW and height GBH and GCT of the waveguide path 140 can be between 1μm and 20μm.
[0070] The spacing PWB of the parallel waveguide lines 140 can be between 2 μm and 50 μm.
[0071] The cross-sectional shape of the first optical waveguide layer 14 (or the cross-sectional shape of one of the waveguide paths 140) can be semi-circular, and the radius R can be between 0.5μm and 5μm.
[0072] The thickness TRT of the first metal layer 15 and the thickness BRT of the first seed layer 16 can both be between 0.1μm and 2μm.
[0073] The width DRL of the first seed layer 16 exposed above the first metal layer 15 can be between 1 μm and 10 μm;
[0074] The thickness of dielectric layer 12 can be between 1μm and 10μm.
[0075] refer to Figure 7 , Figure 7 This is a longitudinal cross-sectional structural diagram of an embodiment 7a of the packaging structure according to this application. Figure 7 The package structure 7a shown is similar to Figure 3 The packaging structure 3a shown differs in that:
[0076] The packaging structure 7a further includes a second seed layer 17 disposed between the first optical waveguide layer 14 and the first metal layer 15. The second seed layer 17 and the first seed layer 16 can be made of the same material or different materials. For example, the material of the second seed layer 17 can be selected from Cu (copper), Au (gold), Ag (silver), Al (aluminum), Ti (titanium), W (tungsten), Pd (palladium), Pt (platinum), and Ni (nickel) or alloys thereof. The fabrication process of the second seed layer 17 can be selected from one or more of the following processes: PVD (physical vapor deposition), electroplating, electroless plating, printing, and metal potting.
[0077] Here, by first forming a seed layer as a second seed layer 17 on the first optical waveguide layer 14 using processes such as sputtering, and then setting the first metal layer 15, the bonding force between the first metal layer 15 and the first optical waveguide layer 14 can be improved, and the thickness of the optical signal isolation structure formed by the first metal layer 15 and the first optical waveguide layer 14 can be increased to enhance the isolation effect.
[0078] refer to Figure 8 , Figure 8 This is a longitudinal cross-sectional structural diagram of an embodiment 7a of the packaging structure according to this application. Figure 8 The package structure 8a shown is similar to Figure 3 The packaging structure 3a shown differs in that:
[0079] In the encapsulation structure 8a, the cross-sectional shape of the first optical waveguide layer 14 is triangular.
[0080] In practical applications, it can also be adopted as needed. Figure 3 The semi-circular first optical waveguide layer 14 in the encapsulation structure 3a shown has different cross-sectional shapes.
[0081] refer to Figure 9 , Figure 9 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 9a of the packaging structure according to this application. Figure 9 The package structure 9a shown is similar to Figure 3 The packaging structure 3a shown differs in that:
[0082] The cross-sectional shape of the first optical waveguide layer 14 in the packaging structure 9a is square.
[0083] In practical applications, it can also be adopted as needed. Figure 3 The semi-circular first optical waveguide layer 14 in the encapsulation structure 3a shown has different cross-sectional shapes.
[0084] refer to Figure 10 , Figure 10 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 10a of the packaging structure according to this application. Figure 10 The package structure 10a shown is similar to Figure 3 The packaging structure 3a shown differs in that:
[0085] In the packaging structure 10a, the cross-sectional shape of the first optical waveguide layer 14 is irregular, and / or, the outer surface (including the upper surface) of the first optical waveguide layer 14 is non-flat. Figure 3 In the encapsulation structure 3a shown, the first optical waveguide layer 14 has a regular semi-circular cross-sectional shape and a flat outer surface.
[0086] refer to Figure 11 , Figure 11 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 11a of the packaging structure according to this application. Figure 11 The packaging structure 11a shown is similar to Figure 3 The packaging structure 3a shown differs in that:
[0087] The packaging structure 11a further includes a second optical waveguide layer 19, which is disposed outside the first metal layer 15, or in other words, overlapped above the first optical waveguide layer 14 and the first metal layer 15.
[0088] Furthermore, the packaging structure 11a may also include: a second metal layer 20 disposed outside the second optical waveguide layer 19 and conformally thereto.
[0089] In some alternative implementations, the second optical waveguide layer 19 may completely cover the first optical waveguide layer 14 in a top-down view.
[0090] In this embodiment, the second optical waveguide layer 19 and the first optical waveguide layer 14 achieve dual-layer signal transmission. The optical signals transmitted by the two layers can be in the same direction or in opposite directions. This overlapping arrangement improves space utilization and helps to miniaturize the packaging structure.
[0091] In this embodiment, the second metal layer 20 can play a dual role: firstly, it serves as an isolation layer between the first optical waveguide layer 14 and the second optical waveguide layer 19 to prevent optical signals from interfering with each other; secondly, it serves as a reflection layer between the first optical waveguide layer 14 above and the second optical waveguide layer 19 below.
[0092] refer to Figure 12 , Figure 12 This is a longitudinal cross-sectional structural schematic diagram of an embodiment 12a of the packaging structure according to this application. Figure 12 The package structure 12a shown is similar to Figure 3 The packaging structure 3a shown differs in that:
[0093] In the packaging structure 12a, the first optical waveguide layer 14 includes two overlapping waveguide paths 140, which are closely adjacent to each other and partially overlap. This increases the wiring density.
[0094] refer to Figure 13-15 , Figure 13-15 This is a schematic diagram illustrating the manufacturing steps of one embodiment of the packaging structure according to this application. The packaging structure of this application can be implemented using wafer-level or panel-level manufacturing processes at a lower cost. Exemplarily, the manufacturing process of the packaging structure of this application may include the following steps:
[0095] S1. A substrate 10 with an optical pad 11 is provided, wherein the substrate 10 is, but is not limited to, a wafer, a panel or other electronic components.
[0096] S2. A dielectric material covering the optical pad 11 is formed as a dielectric layer 12 on the upper surface of the substrate 10 by lamination or coating, and the dielectric layer 12 is photolithographically shaped according to a set pattern.
[0097] S3. The dielectric layer 12 is patterned by the developing process to obtain a guide hole 13 that extends from the upper surface of the dielectric layer 12 to the optical pad 11. The guide hole 13 can be a shape that is wider at the top and narrower at the bottom.
[0098] S4. A photoresist layer 21 is placed above the dielectric layer 12, and photolithography is performed.
[0099] S5. The pattern of photoresist 21 is formed by developing the photoresist.
[0100] S6. Based on the pattern defined by photoresist 21, a seed layer is formed above dielectric layer 12, for example, using physical vapor deposition (PVD), as a first seed layer 16. The first seed layer 16 covers the sidewall of via 13.
[0101] S7. Remove photoresist 21.
[0102] S8. Place a printing template 22 on top of the structure obtained in steps S1-S7. The printing template 22 has multiple openings / slots.
[0103] S9. Using the extrusion fixture 23, waveguide material (e.g., waveguide material in paste form) is printed onto the first seed layer 16 and into the guide hole 13 through the opening / groove on the printing template 22 to form the first optical waveguide layer 14.
[0104] S10 shows a first optical waveguide layer 14 that has been formed, the cross-section of which may be, for example, semi-circular.
[0105] S11. A photoresist 21 is disposed above the first optical waveguide layer 14 and the dielectric layer 12, and photolithography is performed.
[0106] S12. The photoresist 21 is patterned by a developing process, exposing the first optical waveguide layer 14 while covering other areas. Based on the pattern defined by the photoresist 21, a first metal layer 15 is formed on the first optical waveguide layer 14, for example, by a physical vapor deposition (PVD) process.
[0107] S13, Remove photoresist 21.
[0108] S14. A dielectric material layer is disposed above the dielectric layer 12 as a protective layer 18, and the protective layer 18 covers the first optical waveguide layer 14 and the first metal layer 15.
[0109] Thus, the packaging structure of this application embodiment is obtained.
[0110] Although this application has been described and illustrated with reference to specific embodiments thereof, such description and illustration are not limiting of this application. It will be readily understood by those skilled in the art that various changes can be made and equivalent elements can be substituted within embodiments without departing from the true spirit and scope of this application as defined by the appended claims. Illustrations may not be drawn to scale. Differences may exist between the technical representation in this application and actual implementation due to variables in the manufacturing process, etc. Other embodiments of this application may exist that are not specifically described. The description and illustrations should be considered illustrative rather than restrictive. Modifications can be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this application. All such modifications fall within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations can be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this application. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit this application.
Claims
1. A packaging structure, characterized in that, include: A substrate, including an upper surface and an optical pad disposed on the upper surface; A dielectric layer covers the upper surface of the substrate and the optical pad, and has vias to expose the optical pad; The first optical waveguide layer includes: a first part disposed within the via, a second part extending from the upper surface of the dielectric layer, and a transition portion connecting the first part and the second part, wherein the outer side of the transition portion is curved. A first metal layer is disposed outside the first optical waveguide layer and conforms to the first optical waveguide layer.
2. The packaging structure according to claim 1, characterized in that, The outer side of the turning point is rounded.
3. The packaging structure according to claim 1, characterized in that, Also includes: The first seed layer is disposed between the first optical waveguide layer and the dielectric layer.
4. The packaging structure according to claim 3, characterized in that, The first seed layer extends to the upper surface of the dielectric layer, and in a top view, the edge of the first seed layer is exposed above the first metal layer.
5. The packaging structure according to claim 1, characterized in that, Also includes: The second seed layer is disposed between the first optical waveguide layer and the first metal layer.
6. The packaging structure according to claim 1, characterized in that, The first metal layer extends into the via.
7. The packaging structure according to claim 1, characterized in that, The maximum width of the guide hole is less than the width of the optical pad.
8. The packaging structure according to claim 1, characterized in that, Also includes: The second optical waveguide layer is disposed on the outside of the first metal layer.
9. The packaging structure according to claim 8, characterized in that, Also includes: The second metal layer is disposed outside the second optical waveguide layer and conforms to the second optical waveguide layer.
10. The packaging structure according to claim 1, characterized in that, Also includes: The second pad is disposed on the upper surface of the substrate and is connected to the optical pad through the first optical waveguide layer.