Polarity protection circuit for polar capacitor
The polarity protection circuit using a combination of MOSFETs and resistors solves the polarity protection problem of electrolytic capacitors in high-power products, achieving low power consumption and temperature rise control, and is suitable for high-power automotive and consumer products.
Patent Information
- Application Number
- CN202422913983.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2034-11-27
AI Technical Summary
In the existing technology, the polarity protection circuit of electrolytic capacitors in high-power products has problems such as high on-resistance, high power consumption, and serious heat generation. In addition, the surge current caused by large-capacity capacitors puts high demands on the polarity protection devices of electrolytic capacitors.
A combination circuit using MOSFETs Q1 and Q2, resistors R1-R5, and polarized capacitor C1 is employed. Through resistor voltage division and MOSFET control, polarity protection of the polarized capacitor is achieved. Zener diodes Z1 and Z2 are used to protect the gate-source voltage of the MOSFETs, preventing damage when the capacitor polarity is reversed.
It achieves effective protection for polarized capacitors, avoids component temperature rise caused by the addition of polarity protection circuit, reduces circuit power consumption and heat, and is suitable for high-power products.
Smart Images
Figure CN223502567U_ABST
Abstract
Description
[Technical Field]
[0001] This utility model relates to the field of circuit design technology, and in particular to a polarity protection circuit for polarized capacitors. [Background Technology]
[0002] Because electrolytic capacitors are polarized devices, reversing the polarity can lead to explosions and burnout. For low-power products, polarity protection for electrolytic capacitors is mostly achieved using reverse-biased diodes and MOSFETs. The unidirectional conductivity of the diodes and MOSFETs protects the electrolytic capacitor from polarity issues.
[0003] For high-power products, capacitor values are typically large, with electrolytic capacitors being the most common type. Since electrolytic capacitors are polarized, polarity protection is essential. Current electrolytic capacitor polarity protection circuits generally employ reverse-biased diodes and MOSFETs. However, high-power products have very high input currents, resulting in high on-resistance for diodes and MOSFETs, leading to high power consumption and significant heat generation. This limits the availability of suitable diodes and MOSFETs. Furthermore, the presence of large-capacity capacitors in the circuit results in significant inrush current during power-on, placing even higher demands on the polarity protection devices for electrolytic capacitors.
[0004] Therefore, it is necessary to propose a new technical solution to address the above problems. [Utility Model Content]
[0005] One of the objectives of this invention is to provide a polarity protection circuit for polarized capacitors, which can protect the polarity of polarized capacitors without causing significant temperature rise to other components of the product due to the addition of the polarity protection circuit.
[0006] According to one aspect of this utility model, a polarity protection circuit for a polarized capacitor is provided, comprising MOSFET Q1, MOSFET Q2, resistors R1, R2, R3, R4, and R5, a polarized capacitor C1, a first power input terminal Vin_1, and a second power input terminal Vin_2. One end of resistor R1 is connected to the first power input terminal Vin_1, and the other end is connected to node A; one end of resistor R2 is connected to node A, and the other end is connected to the second power input terminal Vin_2; one end of resistor R4 is connected to the first power input terminal Vin_1, and the other end is connected to node A. B is connected; one end of resistor R5 is connected to node B, and the other end is connected to the second power input terminal Vin_2; the first connection terminal of MOSFET Q1 is connected to the first power input terminal Vin_1, its second connection terminal is grounded through resistor R3, and its control terminal is connected to node A; the first connection terminal of MOSFET Q2 is connected to the second power input terminal Vin_2, its second connection terminal is connected to the second connection terminal of MOSFET Q1, and its control terminal is connected to node B; the positive terminal of polarized capacitor C1 is connected to the first power input terminal Vin_1, and its negative terminal is connected to the second connection terminal of MOSFET Q2.
[0007] Furthermore, when the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, the MOSFET Q1 is turned off and the MOSFET Q2 is turned on; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, the MOSFET Q1 is turned on and the MOSFET Q2 is turned off.
[0008] Furthermore, the resistance values of resistors R1 and R2 are selected to satisfy the following conditions: when the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q1 is less than its turn-on voltage threshold Vgs_th, so that the MOSFET Q1 is in the off state; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q1 is greater than its turn-on voltage threshold Vgs_th, so that the MOSFET Q1 is in the on state. The resistance values of resistors R4 and R5 are selected to satisfy the following conditions: when the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q2 is greater than its turn-on voltage threshold Vgs_th, so that the MOSFET Q2 is in the on state; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q2 is less than its turn-on voltage threshold Vgs_th, so that the MOSFET Q2 is in the off state.
[0009] Furthermore, the MOS transistor Q1 is an NMOS transistor, and the first connection terminal, the second connection terminal, and the control terminal of the MOS transistor Q1 are the drain, source, and gate of the NMOS transistor, respectively; the MOS transistor Q2 is an NMOS transistor, and the first connection terminal, the second connection terminal, and the control terminal of the MOS transistor Q2 are the drain, source, and gate of the NMOS transistor, respectively.
[0010] Furthermore, the polarity protection circuit for polarized capacitors also includes Zener diodes Z1 and Z2. The positive terminal of Zener diode Z1 is connected to the second connection terminal of MOSFET Q1, and its negative terminal is connected to the control terminal of MOSFET Q1. The positive terminal of Zener diode Z2 is connected to the second connection terminal of MOSFET Q2, and its negative terminal is connected to the control terminal of MOSFET Q2.
[0011] Furthermore, the operating voltage of the Zener diode Z1 is greater than the turn-on voltage threshold of the MOSFET Q1 and less than the maximum rated voltage between the gate and source of the MOSFET Q1; the turn-on voltage threshold of the MOSFET Q1 is less than the maximum rated voltage between the gate and source of the MOSFET Q1; the operating voltage of the Zener diode Z2 is greater than the turn-on voltage threshold of the MOSFET Q2 and less than the maximum rated voltage between the gate and source of the MOSFET Q2; the turn-on voltage threshold of the MOSFET Q2 is less than the maximum rated voltage between the gate and source of the MOSFET Q2.
[0012] Furthermore, a load is connected between the first power input terminal Vin_1 and the second power input terminal Vin_2; the polarized capacitor is an electrolytic capacitor.
[0013] Compared with the prior art, this utility model can achieve polarity protection for polarized capacitors without causing significant temperature rise to other components of the product due to the addition of polarity protection circuit. [Attached Image Description]
[0014] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Among them:
[0015] Figure 1 This is a circuit diagram of a polarity protection circuit for polarized capacitors in one embodiment of the present invention.
Detailed Implementation Methods
[0016] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0017] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that excludes other embodiments. Unless otherwise specified, the terms coupling, connection, linking, and interconnection used herein to indicate electrical connection mean direct or indirect connection. For example, A being connected to B includes both a direct electrical connection between A and B and a connection between A and B via electrical components or circuits.
[0018] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "back", "positive", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0019] Please refer to Figure 1 As shown, it is a circuit diagram of a polarity protection circuit for polarized capacitors in one embodiment of the present invention. Figure 1 The polarity protection circuit shown for polarized capacitors includes MOSFET Q1, MOSFET Q2, resistors R1, R2, R3, R4, R5, polarized capacitor C1, first power input terminal Vin_1, and second power input terminal Vin_2.
[0020] Among them, one end of resistor R1 is connected to the first power input terminal Vin_1, and the other end is connected to node A; one end of resistor R2 is connected to node A, and the other end is connected to the second power input terminal Vin_2; one end of resistor R4 is connected to the first power input terminal Vin_1, and the other end is connected to node B; one end of resistor R5 is connected to node B, and the other end is connected to the second power input terminal Vin_2; the first connection terminal of MOSFET Q1 is connected to the first power input terminal Vin_1, its second connection terminal is grounded through resistor R3, and its control terminal is connected to node A; the first connection terminal of MOSFET Q2 is connected to the second power input terminal Vin_2, its second connection terminal is connected to the second connection terminal of MOSFET Q1, and its control terminal is connected to node B; the positive terminal of polarized capacitor C1 is connected to the first power input terminal Vin_1, and its negative terminal is connected to the second connection terminal of MOSFET Q2.
[0021] When the positive terminal of the power supply (not shown) is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, MOSFET Q1 is turned off and MOSFET Q2 is turned on; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, MOSFET Q1 is turned on and MOSFET Q2 is turned off, thereby achieving polarity protection for polarized capacitor C1.
[0022] exist Figure 1 In the specific embodiment shown, a load R_load is connected between the first power input terminal Vin_1 and the second power input terminal Vin_2; the polarized capacitor C1 is an electrolytic capacitor.
[0023] exist Figure 1 In the specific embodiment shown, MOS transistor Q1 is an NMOS transistor (N-Metal-Oxide-Semiconductor), and the first connection terminal, the second connection terminal, and the control terminal of MOS transistor Q1 are the drain, source, and gate of the NMOS transistor, respectively; MOS transistor Q2 is an NMOS transistor, and the first connection terminal, the second connection terminal, and the control terminal of MOS transistor Q2 are the drain, source, and gate of the NMOS transistor, respectively.
[0024] Figure 1The polarity protection circuit for polarized capacitors shown also includes Zener diodes Z1 and Z2. The positive terminal of Zener diode Z1 is connected to the second terminal of MOSFET Q1, and its negative terminal is connected to the control terminal of MOSFET Q1. The positive terminal of Zener diode Z2 is connected to the second terminal of MOSFET Q2, and its negative terminal is connected to the control terminal of MOSFET Q2.
[0025] Zener diode Z1 protects MOSFET Q1 by preventing the gate-source voltage of MOSFET Q1 from exceeding its rated voltage (or exceeding the gate-source withstand voltage of the MOSFET). In other words, the operating voltage of Zener diode Z1 is greater than the turn-on threshold voltage of MOSFET Q1 but less than the maximum rated gate-source voltage of MOSFET Q1, where the turn-on threshold voltage of MOSFET Q1 is less than the maximum rated gate-source voltage of MOSFET Q1.
[0026] Similarly, Zener diode Z2 protects MOSFET Q2 by preventing the gate-source voltage of MOSFET Q2 from exceeding its rated voltage (or exceeding the gate-source withstand voltage of the MOSFET). In other words, the operating voltage of Zener diode Z2 is greater than the turn-on threshold voltage of MOSFET Q2 but less than the maximum rated gate-source voltage of MOSFET Q2, where the turn-on threshold voltage of MOSFET Q2 is less than the maximum rated gate-source voltage of MOSFET Q2.
[0027] In other words, Zener diodes Z1 and Z2 are used to stabilize the gate-source voltage Vgs of MOSFETs Q1 and Q2 under input voltage fluctuations, so that MOSFETs Q1 and Q2 will not be damaged.
[0028] Resistors R1 and R2 act as a voltage divider. The values of resistors R1 and R2 are chosen to satisfy the following conditions: When the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2 (i.e., under normal power-on conditions), the voltage division by resistors R1 and R2 makes the gate-source voltage Vgs of MOSFET Q1 less than the turn-on voltage threshold Vgs_th of MOSFET Q1, thus putting MOSFET Q1 in the off state; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2 (i.e., under abnormal power-on conditions), the voltage division by resistors R1 and R2 makes the gate-source voltage Vgs of MOSFET Q1 greater than the turn-on voltage threshold Vgs_th of MOSFET Q1, thus putting MOSFET Q1 in the on state.
[0029] Resistors R4 and R5 act as a voltage divider. The values of resistors R4 and R5 are chosen to satisfy the following conditions: When the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2 (i.e., under normal power-on conditions), the voltage division by resistors R4 and R5 makes the gate-source voltage Vgs of MOSFET Q2 greater than the turn-on voltage threshold Vgs_th of MOSFET Q2, thus putting MOSFET Q2 in the on state; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2 (i.e., under abnormal power-on conditions), the voltage division by resistors R4 and R5 makes the gate-source voltage Vgs of MOSFET Q2 less than the turn-on voltage threshold Vgs_th of MOSFET Q2, thus putting MOSFET Q2 in the off state.
[0030] The following is a detailed introduction Figure 1 The diagram illustrates the working principle of a polarity protection circuit for polarized capacitors.
[0031] When the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal is connected to the second power input terminal Vin_2 (i.e., under normal power-on conditions), the voltage divider between resistors R1 and R2 causes the gate-source voltage Vgs of MOSFET Q1 to be less than (or not reach) the turn-on voltage threshold Vgs_th of MOSFET Q1, so MOSFET Q1 is turned off. Conversely, the voltage divider between resistors R4 and R5 causes the gate-source voltage Vgs of MOSFET Q2 to be greater than (or reach) the turn-on voltage threshold Vgs_th of MOSFET Q2, so MOSFET Q2 is turned on, forming a circuit with polarized capacitor C1. At this time, polarized capacitor C1 can achieve normal charging and discharging.
[0032] When the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2 (i.e., under abnormal power-on conditions), the voltage divider between resistors R1 and R2 causes the gate-source voltage Vgs of MOSFET Q1 to be greater than (or reach) the turn-on voltage threshold Vgs_th of MOSFET Q1. Therefore, MOSFET Q1 turns on. After MOSFET Q1 turns on, the source voltage of MOSFET Q1 is close to 0V, so the negative voltage of polarized capacitor C1 is also close to 0V. At this time, the positive voltage of polarized capacitor C1 is 0V, so the voltage difference across polarized capacitor C1 is basically 0V, and there will be no problems such as polarized capacitor C1 breaking down and exploding. Meanwhile, due to the voltage division of resistors R4 and R5, the gate-source voltage Vgs of MOSFET Q2 is less than (or does not reach) the turn-on voltage threshold Vgs_th of MOSFET Q2. Therefore, MOSFET Q2 is turned off, that is, polarized capacitor C1 will not form a circuit, so the negative terminal voltage of polarized capacitor C1 is maintained at around 0V.
[0033] In summary, the innovative features and corresponding beneficial effects of the polarity protection circuit for polarized capacitors provided by this utility model are as follows:
[0034] 1) Under normal power-on conditions, the ratio of resistors R4 and R5 enables MOSFET Q2 to conduct, allowing polarized capacitor C1 to charge and discharge normally. Under abnormal power-on conditions, the ratio of resistors R1 and R2 enables MOSFET Q1 to conduct, keeping the negative potential of polarized capacitor C1 at around 0V, thus preventing polarized capacitor C1 from breaking down and being damaged.
[0035] 2) Since the loop current of the polarity protection circuit of the polarity capacitor is very small, the power of MOSFETs Q1, Q2 and resistors R1-R5 is small during normal operation, and they will not generate a lot of heat, so they have no effect on the temperature rise of the product.
[0036] The polarity protection circuit for polarized capacitors provided by this invention can be applied to protect polarized capacitors in high-power automotive and consumer products. In the absence of other polarity protection circuits, the polarity protection circuit provided by this invention can achieve polarity protection for polarized capacitors without causing significant temperature rise to other components of the product due to the addition of a polarity protection circuit.
[0037] It should be noted that any modifications made by those skilled in the art to the specific embodiments of this utility model do not depart from the scope of the claims of this utility model. Accordingly, the scope of the claims of this utility model is not limited to the foregoing specific embodiments.
Claims
1. A polarity protection circuit for polarized capacitors, characterized in that, It includes MOSFET Q1, MOSFET Q2, resistors R1, R2, R3, R4, and R5, polarized capacitor C1, first power input terminal Vin_1, and second power input terminal Vin_2. One end of resistor R1 is connected to the first power input terminal Vin_1, and the other end is connected to node A; one end of resistor R2 is connected to node A, and the other end is connected to the second power input terminal Vin_2; one end of resistor R4 is connected to the first power input terminal Vin_1, and the other end is connected to node B; one end of resistor R5 is connected to node B, and the other end is connected to the second power input terminal Vin_2; the first connection terminal of MOSFET Q1 is connected to the first power input terminal Vin_1, its second connection terminal is grounded through resistor R3, and its control terminal is connected to node A; the first connection terminal of MOSFET Q2 is connected to the second power input terminal Vin_2, its second connection terminal is connected to the second connection terminal of MOSFET Q1, and its control terminal is connected to node B; the positive terminal of polarized capacitor C1 is connected to the first power input terminal Vin_1, and its negative terminal is connected to the second connection terminal of MOSFET Q2.
2. The polarity protection circuit for polarized capacitors according to claim 1, characterized in that, When the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, the MOS transistor Q1 is turned off and the MOS transistor Q2 is turned on. When the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, the MOS transistor Q1 is turned on and the MOS transistor Q2 is turned off.
3. The polarity protection circuit for polarized capacitors according to claim 2, characterized in that, The resistance values of resistors R1 and R2 are selected to satisfy the following conditions: when the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q1 is less than its turn-on voltage threshold Vgs_th, so that the MOSFET Q1 is in the off state; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q1 is greater than its turn-on voltage threshold Vgs_th, so that the MOSFET Q1 is in the on state. The resistance values of resistors R4 and R5 are selected to satisfy the following conditions: when the positive terminal of the power supply is connected to the first power input terminal Vin_1 and the negative terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q2 is greater than its turn-on voltage threshold Vgs_th, so that the MOSFET Q2 is in the on state; when the negative terminal of the power supply is connected to the first power input terminal Vin_1 and the positive terminal of the power supply is connected to the second power input terminal Vin_2, the gate-source voltage Vgs of the MOSFET Q2 is less than its turn-on voltage threshold Vgs_th, so that the MOSFET Q2 is in the off state.
4. The polarity protection circuit for polarized capacitors according to claim 2, characterized in that, The MOS transistor Q1 is an NMOS transistor, and the first connection terminal, the second connection terminal, and the control terminal of the MOS transistor Q1 are the drain, source, and gate of the NMOS transistor, respectively. The MOS transistor Q2 is an NMOS transistor, and the first connection terminal, the second connection terminal, and the control terminal of the MOS transistor Q2 are the drain, source, and gate of the NMOS transistor, respectively.
5. The polarity protection circuit for polarized capacitors according to claim 4, characterized in that, It also includes Zener diodes Z1 and Z2. The positive terminal of the Zener diode Z1 is connected to the second connection terminal of the MOSFET Q1, and its negative terminal is connected to the control terminal of the MOSFET Q1. The positive terminal of the Zener diode Z2 is connected to the second connection terminal of the MOSFET Q2, and its negative terminal is connected to the control terminal of the MOSFET Q2.
6. The polarity protection circuit for polarized capacitors according to claim 5, characterized in that, The operating voltage of the Zener diode Z1 is greater than the turn-on voltage threshold of the MOSFET Q1 and less than the maximum rated voltage between the gate and source of the MOSFET Q1; the turn-on voltage threshold of the MOSFET Q1 is less than the maximum rated voltage between the gate and source of the MOSFET Q1. The operating voltage of the Zener diode Z2 is greater than the turn-on voltage threshold of the MOSFET Q2 and less than the maximum rated voltage between the gate and source of the MOSFET Q2; the turn-on voltage threshold of the MOSFET Q2 is less than the maximum rated voltage between the gate and source of the MOSFET Q2.
7. The polarity protection circuit for polarized capacitors according to any one of claims 1-6, characterized in that, A load is connected between the first power input terminal Vin_1 and the second power input terminal Vin_2; The polarized capacitor is an electrolytic capacitor.