S-band radar broadband radio frequency transceiver

Abstract

The utility model provides an S-band radar broadband radio frequency transceiver, which belongs to the technical field of radars and adopts the technical scheme that the S-band radar broadband radio frequency transceiver comprises a broadband transceiver unit, a power supply module and a transceiver control module, the signal transmitting end is electrically connected with the output end of the broadband transceiving unit; the signal receiving end is electrically connected with the input end of the broadband transceiving unit; the reference output end, the first clock output end, the second clock output end and the intermediate frequency output end are electrically connected with the output end of the broadband transceiving unit; the broadband transmit-receive unit comprises a synthesis module. According to the device, channel local oscillation and transmitting signals are synthesized based on the broadband phase locking technology and quadrature modulation, the receiving and transmitting antennas are gated by using the low-loss multi-channel radio frequency switches in turn, and the device has the advantages of ultra wide band, dense frequency hopping, large dynamic, multiple channels, low weight and low cost.

Description

TECHNICAL FIELD

[0001] The utility model belongs to radar technical field, more specifically, especially, it is related to a kind of S wave band radar wideband radio frequency transceiver device. BACKGROUND

[0002] S wave band radar is with the advantages of detecting distance far, anti-interference ability strong, little by weather condition influence, etc., in meteorological monitoring, air defense early warning, ship navigation, aviation control and other fields plays irreplaceable role, for example, in meteorological field, S wave band radar can be carried out accurate scanning to the cloud rain system in hundreds of kilometers range, provides key data for the early warning of rainstorm, typhoon and other disastrous weather;In air defense system, it can effectively detect high-altitude flying target, support combat command decision-making;In civil aviation field, S wave band air traffic control radar is the core equipment for ensuring flight take-off and landing safety and realizing airspace efficient management.With the rapid development of information technology, the bandwidth demand of various application scenarios for radar system is increasing, and wideband characteristics can realize higher range resolution and target recognition accuracy, which puts forward more stringent requirements for the core component of radar, radio frequency transceiver device.

[0003] Therefore, the utility model provides a kind of radar transceiver device based on wideband phase-locked loop technology and quadrature modulation synthesis channel local oscillator and transmitting signal, utilizes low-loss multi-path radio frequency switch to rotate in turn and selects the radar transceiver device of receiving and transmitting antenna. UTILITY MODEL CONTENT

[0004] To solve the above technical problems, the utility model provides a kind of S wave band radar wideband radio frequency transceiver device, the purpose and function of the utility model a kind of S wave band radar wideband radio frequency transceiver device are achieved by the following specific technical means:

[0005] A kind of S wave band radar wideband radio frequency transceiver device, comprising:

[0006] Wideband transceiver unit, power module, transceiver control module;

[0007] Signal transmitting end electrically connected with the output end of the wideband transceiver unit;

[0008] Signal receiving end electrically connected with the input end of the wideband transceiver unit;

[0009] Reference output end, first clock output end, second clock output end and intermediate frequency output end electrically connected with the output end of the wideband transceiver unit;

[0010] The synthesis module is included in the wideband transceiver unit.

[0011] As the further scheme of the utility model, the synthesis module includes ultra-wideband phase-locked loop source unit, three groups of wideband compensation units, clock synthesizer unit and two groups of wideband amplification units;

[0012] The output end of the ultra-wideband phase-locked source unit is connected with the input end of one set of wideband compensation units, the output end of one set of the wideband compensation units is connected with the input end of one set of power division units, and the output end of the power division units is respectively connected with the input end of two sets of wideband amplification units;

[0013] The output end of one set of the wideband amplification units is connected with the input end of a quadrature modulation unit, the output end of the quadrature modulation unit is connected with the input end of another set of power division units, and the output end of another set of power division units is respectively connected with the input end of another two sets of wideband compensation units;

[0014] The output end of one set of the wideband compensation units is connected with the output end of an attenuation unit, and the output end of another set of the wideband compensation units is connected with a power amplifier unit.

[0015] As a further scheme of the utility model, the output end of the clock synthesizer unit is respectively connected with a quadrature power division unit and the input end of the ultra-wideband phase-locked source unit, and the input end of the clock synthesizer unit is connected with a 100MHz constant-temperature crystal oscillator.

[0016] As a further scheme of the utility model, the output end of the clock synthesizer unit is respectively connected with a reference output end, a first clock output end and a second clock output end, and the output end of one set of the wideband amplification units, the attenuation unit and the power amplifier unit is all connected with the intermediate frequency output end.

[0017] As a further scheme of the utility model, the output end of one set of the wideband amplification units outputs 500M-4G local oscillator output signals.

[0018] The attenuation unit outputs 500M-4G calibration output signals.

[0019] The power amplifier unit outputs 500M-4G radio frequency output signals.

[0020] The reference output end outputs 10MH reference output signals.

[0021] The first clock output end outputs 20MH first clock signals.

[0022] The second clock output end outputs 10MH second clock signals.

[0023] As a further scheme of the utility model, the synthesis module further includes a logic control module.

[0024] An external control end connected with the input end of the logic control module.

[0025] A state output end connected with the output end of the logic control module.

[0026] As a further scheme of the present application, the signal receiving end comprises a pre-selection filtering unit, a pre-attenuation unit and a post-attenuation unit.

[0027] The output end of the pre-selection filtering unit is connected with the input end of a wideband low-noise amplification unit, the output end of the wideband low-noise amplification unit is connected with the input end of a frequency down-conversion unit, the output end of the frequency down-conversion unit is connected with the input end of a wideband pass unit, and the output end of the wideband pass unit is connected with the input end of a first intermediate frequency amplification unit.

[0028] The output end of the first intermediate frequency amplification unit is connected with the input end of the pre-attenuation unit, the output end of the pre-attenuation unit is connected with the input end of a second intermediate frequency amplification unit, the output end of the second intermediate frequency amplification unit is connected with the input end of the post-attenuation unit, the output end of the post-attenuation unit is connected with the input end of a third intermediate frequency amplification unit, and the output end of the third intermediate frequency amplification unit is connected with the input end of a narrowband pass unit.

[0029] As a further scheme of the present application, the signal receiving end further comprises a channel attenuation distribution management unit.

[0030] The output end of the attenuation distribution management unit is connected with the input end of the pre-attenuation unit and the post-attenuation unit respectively, and the input end of the attenuation distribution management unit is a gain control signal.

[0031] As a further scheme of the present application, the input of the pre-selection filtering unit is a 500M-4G+15M echo input signal.

[0032] The input of the frequency down-conversion unit is a 500M-4G local oscillator input signal.

[0033] The output of the narrowband pass unit is a 15MHz intermediate frequency output signal.

[0034] As a further scheme of the present application, the power module is electrically connected with the wideband transceiving unit, a secondary voltage stabilizing power module is arranged in the power module, the secondary voltage stabilizing power module is electrically connected with the synthesizing module and the signal receiving end respectively, and the output end of the transceiving control module is electrically connected with the input end of the wideband transceiving unit.

[0035] Compared with the prior art, the present application has the following beneficial effects:

[0036] The present application is based on a wideband phase-locked technology and a quadrature modulation synthesis channel local oscillator and a transmitting signal, a low-loss multi-path radio frequency switch is used to rotate and select a receiving and transmitting antenna, and the present application has the advantages of super wideband, dense frequency hopping, large dynamic, multi-channel, low weight and low cost. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 It is a principle block diagram of the S-band radar wideband radio frequency transceiving device.

[0038] Figure 2 The utility model relates to a kind of S wave band radar wideband radio frequency transceiver device in synthesis module principle diagram.

[0039] Figure 3 The utility model relates to a kind of S wave band radar wideband radio frequency transceiver device in signal receiving end principle diagram.

[0040] In the drawing, the corresponding relationship of component name and figure number is as follows:

[0041] 10, wideband transceiver unit;11, transceiver control module;12, signal transmitting end;13, signal receiving end;14, reference output end;15, first clock output end;16, second clock output end;17, intermediate frequency output end;18, power module;180, secondary voltage stabilizing power module;100, ultra-wideband phase-locked source unit;101, wideband compensation unit;102, power division unit;1021, quadrature power division unit;103, wideband amplification unit;104, quadrature modulation unit;105, attenuation unit;106, power amplifier unit;107, clock synthesizer unit;108, 100MHz constant-temperature crystal oscillator;109, logic control module;1091, external control end;1092, state output end;110, preselection filter unit;111, wideband low-noise amplifier unit;112, frequency down-conversion unit;113, wideband pass unit;114, first intermediate amplifier unit;115, pre-attenuation unit;116, second intermediate amplifier unit;117, post-attenuation unit;118, third intermediate amplifier unit;119, narrowband pass unit;120, attenuation distribution management unit. DETAILED DESCRIPTION

[0042] The embodiments of the utility model will be further described in detail below in combination with the drawings and examples. The following examples are used to illustrate the utility model, but cannot be used to limit the scope of the utility model.

[0043] Example: as shown in the accompanying Figure 1 to the accompanying Figure 3 :

[0044] A kind of S wave band radar wideband radio frequency transceiver device, characterized in that, it includes:

[0045] wideband transceiver unit 10, power module 18, transceiver control module 11;With the signal transmitting end 12 of the output end of the wideband transceiver unit 10 electricity is connected;With the signal receiving end 13 of the input end of the wideband transceiver unit 10 electricity is connected;With the reference output end 14, first clock output end 15, second clock output end 16 and intermediate frequency output end 17 of the output end of the wideband transceiver unit 10 electricity is connected;The wideband transceiver unit 10 includes synthesis module in it.

[0046] Further, the power module 18 is electrically connected with the wideband transceiver unit 10, and a secondary voltage stabilizing power module 180 is arranged in the power module 18, the secondary voltage stabilizing power module 180 is electrically connected with the synthesizing module and the signal receiving end 13 respectively, and the output end of the transceiver control module 11 is electrically connected with the input end of the wideband transceiver unit 10.

[0047] It can be understood that the ultra-wideband, dense frequency hopping, large dynamic, multi-channel, low weight and cost are the main performance characteristics of the wideband step frequency transceiver system. In comprehensive consideration, the scheme will be based on the wideband phase-locked technology and the quadrature modulation to synthesize the local oscillator and the transmitting signal of the channel, and the low-loss multi-path radio frequency switch is used to select the transceiver antenna in turn. The basic working principle is shown in the attached Figure 1 As shown in the attached, in order to meet the design requirement of miniaturization, the wideband step synthesizer and the receiving channel are designed integrally, and the composition of the system is simplified into two parts of the wideband transceiver unit and the antenna array switch, and the cable is used to connect between the two parts.

[0048] In the embodiment, the synthesizing module includes an ultra-wideband phase-locked source unit 100, three groups of wideband compensation units 101, a clock synthesizer unit 107 and two groups of wideband amplification units 103;

[0049] The output end of the ultra-wideband phase-locked source unit 100 is connected with the input end of one group of wideband compensation units 101, the output end of one group of wideband compensation units 101 is connected with the input end of one group of power division units 102, and the output end of the power division unit 102 is connected with the input end of two groups of wideband amplification units 103 respectively;

[0050] The output end of one group of wideband amplification units 103 is connected with the input end of a quadrature modulation unit 104, the output end of the quadrature modulation unit 104 is connected with the input end of another group of power division units 102, and the output end of another group of power division units 102 is connected with the input end of another two groups of wideband compensation units 101 respectively;

[0051] The output end of one group of wideband compensation units 101 is connected with the output end of an attenuation unit 105, and the output end of another group of wideband compensation units 101 is connected with a power amplifier unit 106.

[0052] Further, the output end of the clock synthesizer unit 107 is connected with the input end of the ultra-wideband phase-locked source unit 100 and a quadrature power division unit 1021 respectively, and the input end of the clock synthesizer unit 107 is connected with a 100MHz constant temperature crystal oscillator 108.

[0053] Further, the clock synthesizer unit 107 outputs are connected to the reference output end 14, the first clock output end 15, and the second clock output end 16, respectively, wherein a group of the wideband amplification unit 103, the attenuation unit 105, and the power amplifier unit 106 output ends are connected to the intermediate frequency output end 17.

[0054] Further, a group of the wideband amplification unit 103 outputs 500M-4G local oscillator output signals; the attenuation unit 105 outputs 500M-4G calibration output signals; the power amplifier unit 106 outputs 500M-4G radio frequency output signals; the reference output end 14 outputs 10MH reference output signals; the first clock output end 15 outputs 20MH first clock signals; and the second clock output end 16 outputs 10MH second clock signals.

[0055] Further, the synthesis module further includes a logic control module 109; an external control end 1091 connected to the logic control module 109 input end; and a state output end 1092 connected to the logic control module 109 output end.

[0056] In this embodiment, the synthesis module is represented as an ultra-wideband stepped frequency synthesizer.

[0057] Specifically, for the stepped frequency local oscillator synthesis method, the ultra-wideband stepped frequency synthesizer is the core of the system, and the synthesis method determines the main technical indicators of the system. There are three main implementation approaches for the synthesizer: direct synthesis, phase-locked synthesis, and digital direct synthesis (DDS). Direct synthesis has good phase noise indicators and fast frequency hopping speed, but the equipment cost required for the implementation of a wideband and dense frequency synthesizer is too high, so it is not suitable for the system which seeks simplicity. The implementation of DDS is flexible, but the clock of the mature products of the mainstream manufacturers does not exceed 1GHz, and the working frequency does not exceed 400MHz. Therefore, a relatively complex frequency shifting circuit must be added to expand the frequency to a bandwidth range of 3.5GHz. Moreover, the spurs of the DDS output signal are difficult to control, and the spur level is about -50dBc in general wideband applications. The dynamic range of the receiving channel of the system reaches 80dB, so the spurs of the local oscillator signal are required to be very high. Therefore, DDS synthesis is also excluded. The phase-locked synthesis device has small size and high spectral purity, but the output frequency generally does not exceed one octave, and the frequency hopping time is relatively long, generally in the order of tens of us. For the former, the output frequency range can be expanded by a frequency divider. For the latter, since the system has a tolerance of not more than 50us for the phase stability time, the implementation of this indicator can be guaranteed through fine design. The specific implementation block diagram is shown in the accompanying Figure 2

[0058] ​Specifically, for the reference source and clock generation, the reference source uses a high-stability 100MHz oven-controlled crystal oscillator from PFC, Canada, to ensure the phase stability of the system within the coherent processing time, and a low-noise frequency divider is used to generate 10MHz and 20MHz clocks required by the digital processor, and the relative phase relationship between the reference source and the two clocks is ensured to be stable in design.

[0059] Specifically, for the stepped frequency radio frequency synthesis method, in order to simplify the system equipment, a quadrature modulator is used to single sideband modulate a 15MHz signal to the ultra-wideband phase-locked source to generate another wideband signal, i.e. a radio frequency signal, but a large carrier leakage and image spurs will be introduced. At present, the working frequency of the quadrature modulator of the mainstream device manufacturers such as Analog and Hittite can meet the system requirements, but the wideband spur index is generally: -40dBc typical value (f=500MHz~2.5GHz), -30dBc typical value (f=2.5GHz~4GHz). Therefore, the wideband signal generated by the quadrature modulation cannot be used as the local oscillator of the receiving channel, otherwise the (f-15MHz) carrier leakage spur will fall into the channel receiving band through the self-mixing effect of the mixer, which will strongly interfere with the receiving channel. However, it can be used as a transmitting signal, for two reasons: first, the level of the spur signal in the receiving channel is at least 30dB lower than the useful signal, which has little effect on the signal quality in terms of power; second, the carrier leakage and image spurs are distributed in the sidebands ±15MHz of the main signal, so after mixing with the local oscillator signal, the spur frequency is at DC or 30MHz, which will be filtered out by the intermediate frequency filter of the receiving channel, so the interference with the channel is smaller in terms of frequency.

[0060] Specifically, for the wideband amplitude fluctuation, another difficulty in wideband application is the implementation of wideband flatness. There are two general implementation methods. One is to design an equalizer in the frequency domain, which is simple in circuit but has poor adjustment flexibility, and is generally suitable for equalizing relatively linear amplitude fluctuations. The other is to design a "gain-time" truth table for the channel in the time domain through a digital attenuator, determine the table data through testing and store them in a high-speed memory, and call the table at high speed during work to realize the equalization of the channel. Although this method is more complex, it has good flexibility and low design risk. The latter is used in the system to realize the wideband frequency equalization of the output signal, and a digital attenuator with a dynamic range of more than 20dB and an adjustment step of 0.5dB is used to ensure the flatness index requirement of ±1dB in the full band.

[0061] In the embodiment, the signal receiving end 13 includes a pre-selection filtering unit 110, a pre-attenuation unit 115, and a post-attenuation unit 117.

[0062] The output end of the pre-selection filter unit 110 is connected with the input end of a wideband low-noise amplifier unit 111, the output end of the wideband low-noise amplifier unit 111 is connected with the input end of a down-conversion unit 112, the output end of the down-conversion unit 112 is connected with the input end of a wideband pass unit 113, and the output end of the wideband pass unit 113 is connected with the input end of a first intermediate amplifier unit;

[0063] The output end of the first intermediate amplifier unit 114 is connected with the input end of a pre-attenuation unit 115, the output end of the pre-attenuation unit 115 is connected with the input end of a second intermediate amplifier unit 116, the output end of the second intermediate amplifier unit 116 is connected with the input end of a post-attenuation unit 117, the output end of the post-attenuation unit 117 is connected with the input end of a third intermediate amplifier unit 118, and the output end of the third intermediate amplifier unit 118 is connected with the input end of a narrowband pass unit 119.

[0064] Further, the signal receiving end 13 further comprises a channel attenuation distribution management unit 120, the output end of the attenuation distribution management unit 120 is connected with the input end of the pre-attenuation unit 115 and the post-attenuation unit 117 respectively, and the input end of the attenuation distribution management unit 120 is a gain control signal.

[0065] Further, the input of the pre-selection filter unit 110 is a 500M-4G+15M echo input signal, the input of the down-conversion unit 112 is a 500M-4G local oscillator input signal, and the output of the narrowband pass unit 119 is a 15MHz intermediate frequency output signal.

[0066] Specifically, the receiving channel of the system has the characteristics of wide frequency band and high dynamic, and therefore requires low noise and wide frequency response of the receiving front end, low intermodulation spurs in the channel, in order to solve the contradiction between high dynamic and gain, improve the detection ability of small signals, and design the gain of the receiving channel to be adjustable. The gain of the channel is adjusted by a digital processor, and a specific implementation block diagram is shown in the accompanying Figure 3

[0067] In this embodiment, for the noise figure part, the noise figure reflects the noise performance of the receiver, and the system requires the minimum detection signal to be as low as -100dBm, and therefore has a relatively high requirement on the noise figure of the receiving channel. According to the noise figure cascade formula: F=Fn+(F1-1) / Gn;

[0068] In the formula, Fn is the noise figure of the front stage of the receiver, Gn is the low-noise amplifier power gain of the receiver, and F1 is the equivalent noise figure of the stage after the low-noise amplifier.

[0069] The total noise figure of the receiving channel is NF(channel)=6.7dB;

[0070] According to the channel bandwidth BW=3MHz of the receiver, the equivalent received input port noise power is:-100dBm+6.7dB+10lg(3 / 5000000)= -100.7dBm

[0071] P(noise) = -114dBm + NF + 10 log(BW) = -102.5dBm;

[0072] In the formula, the constant -114dBm is the white noise power of the standard resistor at room temperature and converted to 1MHz bandwidth.

[0073] Therefore, it can be seen that the receiving channel can still output a signal with positive signal-to-noise ratio when the minimum input signal is -100dBm, meeting the requirement of system sensitivity.

[0074] In this embodiment, the feature of the frequency selective design part of the system is that the front end of the channel is ultra-wideband and the rear end of the channel is narrowband. Therefore, the flatness of the in-band amplitude-frequency characteristic is mainly considered in the design of the front end, and there is a certain suppression outside the band. The P-band civilian frequency modulation broadcast and communication signals in the free space are filtered to avoid their interference or even block the receiving channel. In addition, the front-stage antenna switch needs to be frequently switched in operation, which will introduce a certain degree of video interference. These spectrums are mainly concentrated in the low frequency end. Therefore, a low-loss bandpass filter is designed in the front stage of the low-noise amplifier as a frequency preselector.

[0075] The in-band flatness of the preselector can be ±0.4dB, the flatness of the low-noise amplifier is ±1dB, and the flatness of the rear-stage mixer is ±1dB. According to the root mean square value estimation, the total flatness of these wideband components connected in series is about: For the 3.5GHz ultra-wideband channel, this index is excellent in similar devices.

[0076] The rear end of the channel is a narrowband channel with a center frequency of 15MHz and a bandwidth of 3MHz. In order to effectively filter out the noise outside the band and also have the function of anti-aliasing before AD sampling, the filter is designed at the end of the channel. A wideband intermediate frequency filter is designed after the front-stage mixer, which aims to filter out the local oscillator and radio frequency signals at the high end of the spectrum to prevent the local oscillator leakage signal from blocking the rear-stage high-gain intermediate frequency channel.

[0077] In this embodiment, for the gain design part, the dynamic range of the received signal of the system is -100dBm to -20dBm, and the rated output intermediate frequency power is +4dBm. In order to meet the linear reception of large signals, the minimum gain of the channel is +24dB. For detecting small signals, the gain is too low. Therefore, the channel is designed as a variable gain with a variation range of 60dB. The receiving channel can provide a maximum gain of 84dB. In actual operation, the gain of the receiver is set by the signal processing machine according to the actual received signal size.

[0078] In engineering, in order to prevent the instability hidden trouble caused by too concentrated gain of receiving channel, 60dB gain adjustment is divided into two 30dB pre-number control attenuator and post-number control attenuator to realize. Considering the negative influence of noise coefficient is minimized, when receiving signal power gradually increases, attenuate the post attenuator first, when its attenuation dynamic is used up, attenuate the pre attenuator. A channel attenuation distribution management circuit is specially designed in the channel to reasonably distribute the attenuation order.

[0079] In the embodiment, for channel spurious part, the main sources of spurious in channel band are: mixer high order intermodulation, power ripple parasitic modulation, external space electromagnetic interference, etc. For large dynamic receiver, especially should pay attention to the suppression of spurious level. The system adopts once frequency conversion mode, the distance between radio frequency, local oscillator and intermediate frequency is far. The intermodulation order falling into the band is far higher than 10 order, so this kind of spurious can be ignored. The electromagnetic interference from power ripple and external space can be effectively suppressed through secondary voltage stabilization, strengthening filtering and shielding measures. The spurious suppression less than-70dBc can be realized in engineering.

[0080] Embodiments of the present application are given for the purpose of example and description, and are not exhaustive or limiting of the present application. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments are chosen and described in order to best explain the principles of the present application, and to enable others skilled in the art to understand the present application for various embodiments with various modifications as are suited to the particular use contemplated.

Claims

1. A S-band radar wideband radio frequency transceiver device, characterized by, It includes: Broadband transceiver unit (10), power module (18), transceiver control module (11); Signal transmitting end (12) electrically connected with the output end of the broadband transceiver unit (10); Signal receiving end (13) electrically connected with the input end of the broadband transceiver unit (10); Reference output end (14), first clock output end (15), second clock output end (16) and intermediate frequency output end (17) electrically connected with the output end of the broadband transceiver unit (10); The broadband transceiver unit (10) includes a synthesis module.

2. The S-band radar broadband radio frequency transceiver device of claim 1, wherein: The synthesis module includes an ultra-wideband phase-locked source unit (100), three sets of broadband compensation units (101), a clock synthesizer unit (107), and two sets of broadband amplification units (103); The output end of the ultra-wideband phase-locked source unit (100) is connected with the input end of one of the broadband compensation units (101), the output end of one of the broadband compensation units (101) is connected with the input end of one of the power division units (102), and the output ends of the power division units (102) are respectively connected with the input ends of the two sets of broadband amplification units (103); The output end of one of the broadband amplification units (103) is connected with the input end of the quadrature modulation unit (104), the output end of the quadrature modulation unit (104) is connected with the input end of the other power division unit (102), and the output ends of the other power division units (102) are respectively connected with the input ends of the other two sets of broadband compensation units (101); The output end of one of the broadband compensation units (101) is connected with the output end of the attenuation unit (105), and the output end of the other broadband compensation unit (101) is connected with the power amplifier unit (106).

3. The S-band radar broadband radio frequency transceiver device of claim 2, wherein: The output end of the clock synthesizer unit (107) is respectively connected with the input end of the ultra-wideband phase-locked source unit (100) and the quadrature power division unit (1021), and the input end of the clock synthesizer unit (107) is connected with the 100MHz constant temperature crystal oscillator (108).

4. The S-band radar broadband radio frequency transceiver device of claim 2, wherein: The output end of the clock synthesizer unit (107) is respectively connected with the reference output end (14), the first clock output end (15), and the second clock output end (16), and the output ends of one of the broadband amplification units (103), the attenuation unit (105), and the power amplifier unit (106) are all connected with the intermediate frequency output end (17).

5. The S-band radar broadband radio frequency transceiver device of claim 4, wherein: One of the broadband amplification units (103) outputs a 500M-4G local oscillator output signal; The attenuation unit (105) outputs a 500M-4G calibration output signal; The power amplifier unit (106) outputs a 500M-4G radio frequency output signal; The reference output end (14) outputs a 10MH reference output signal; The first clock output end (15) outputs 20MH first clock signal; The second clock output end (16) outputs 10MH second clock signal.

6. The S-band radar wideband radio frequency transceiver device of claim 2, wherein: The synthesis module further comprises a logic control module (109); An external control end (1091) is connected to the input end of the logic control module (109); A state output end (1092) is connected to the output end of the logic control module (109).

7. The S-band radar wideband radio frequency transceiver device of claim 1, wherein: The signal receiving end (13) comprises a pre-selection filter unit (110), a pre-attenuation unit (115) and a post-attenuation unit (117); The output end of the pre-selection filter unit (110) is connected to the input end of a wideband low-noise amplifier unit (111), the output end of the wideband low-noise amplifier unit (111) is connected to the input end of a down-conversion unit (112), the output end of the down-conversion unit (112) is connected to the input end of a wideband pass unit (113), and the output end of the wideband pass unit (113) is connected to the input end of a first intermediate frequency amplifier unit; The output end of the first intermediate frequency amplifier unit (114) is connected to the input end of the pre-attenuation unit (115), the output end of the pre-attenuation unit (115) is connected to the input end of a second intermediate frequency amplifier unit (116), the output end of the second intermediate frequency amplifier unit (116) is connected to the input end of the post-attenuation unit (117), the output end of the post-attenuation unit (117) is connected to the input end of a third intermediate frequency amplifier unit (118), and the output end of the third intermediate frequency amplifier unit (118) is connected to the input end of a narrowband pass unit (119).

8. The S-band radar wideband radio frequency transceiver device of claim 7, wherein: The signal receiving end (13) further comprises a channel attenuation distribution management unit (120); The output end of the attenuation distribution management unit (120) is connected to the input end of the pre-attenuation unit (115) and the post-attenuation unit (117), respectively, and the input end of the attenuation distribution management unit (120) is a gain control signal.

9. The S-band radar wideband radio frequency transceiver device of claim 7, wherein: The input of the pre-selection filter unit (110) is a 500M-4G+15M echo input signal; The input of the down-conversion unit (112) is a 500M-4G local oscillator input signal; The output of the narrowband pass unit (119) is a 15MHz intermediate frequency output signal.

10. The S-band radar wideband radio frequency transceiver device of claim 1, wherein: The power module (18) is electrically connected to the wideband transceiver unit (10), and a secondary voltage stabilizing power module (180) is arranged in the power module (18), the secondary voltage stabilizing power module (180) is electrically connected to the synthesis module, the signal receiving end (13), and the transceiver control module (11) is electrically connected to the input end of the wideband transceiver unit (10).

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