Power failure detection circuit

By designing a circuit structure that includes voltage regulation and filtering, voltage division, square wave output, MCU and RTC, the shortcomings of existing power failure detection circuits in terms of accuracy and response speed are solved, achieving millisecond-level detection and data storage, meeting the high requirements of industrial fields.

CN223538918UActive Publication Date: 2025-11-11NANJING SCIYON AUTOMATION GRP
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Patent Information

Application Number
CN202422843152.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-21
Publication Date
2025-11-11
Estimated Expiration
2034-11-21

AI Technical Summary

Technical Problem

Existing power failure detection circuits have shortcomings in detection accuracy and response speed, especially in industrial fields where it is difficult to achieve millisecond-level rapid detection, and they cannot effectively utilize remaining power to save data when power fails.

Method used

A power-down detection circuit was designed, including a voltage regulator and filter circuit, a voltage divider circuit, a square wave output circuit, an MCU circuit, an RTC circuit, and a memory. The threshold of the square wave circuit is set by the voltage divider circuit, the MCU is used to capture the frequency signal in real time, and the RTC unit reads the voltage abnormality time and stores it in the memory to achieve millisecond-level detection and data saving.

Benefits of technology

It achieves millisecond-level rapid power failure detection, can predict power supply anomalies in a timely manner, and uses the remaining power of the internal energy storage capacitor to save data, thereby improving detection accuracy and data storage reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a power failure detection circuit which comprises a voltage stabilization filter circuit, a voltage division circuit, a square output circuit, an MCU circuit, an RTC circuit, a memory and a DCDC power supply circuit. An external input voltage signal passes through the voltage stabilization filter circuit and the voltage division circuit in sequence and then is input into the square output circuit. The MCU unit is respectively connected with the square wave output circuit, the memory and the RTC unit; and the DCDC power supply circuit is connected with the square wave output circuit, the MCU unit and the memory. According to the utility model, ms-level detection can be carried out on equipment power failure, and data storage can be carried out by using the residual electric quantity of an energy storage capacitor in a product.
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Description

Technical Field

[0001] This utility model relates to the field of electronic communications, and more specifically, to the application of a power failure detection circuit with a settable detection threshold. Background Technology

[0002] With the development of technology, the requirements for recording operational information of electronic products in both consumer and industrial sectors are constantly increasing. Equipment needs to not only record operational logs during normal operation but also during abnormal situations such as power outages, including recording logs or other important information. This requires the equipment to promptly detect external power supply anomalies and utilize remaining power to save data during the outage. Currently, the main power outage detection circuits are: 1. Resistor voltage divider detection: The external input voltage is divided and read by an ADC. This method is prone to misjudgment if the input voltage fluctuates. 2. Level-based voltage detection: The detection circuit outputs a high value when power is available and a low value when power is unavailable. This method has a lag in detecting power outages and is not suitable for demanding industrial applications. Summary of the Invention

[0003] The purpose of this invention is to address the deficiencies in the existing technology by providing a circuit structure that can detect device power failure at the millisecond level and can save data using the remaining charge of the internal energy storage capacitor.

[0004] To achieve the above objectives, the technical solution provided by this utility model is as follows:

[0005] A power-down detection circuit includes a voltage regulator and filter circuit, a voltage divider circuit, a square output circuit, an MCU circuit, an RTC circuit, a memory, and a DC-DC power supply circuit. An external input voltage signal is sequentially input to the square wave output circuit after passing through the voltage regulator and filter circuit and the voltage divider circuit. The MCU unit is connected to the square wave output circuit, the memory, and the RTC unit respectively. The DC-DC power supply circuit is connected to the square wave output circuit, the MCU unit, and the memory.

[0006] This invention sets the operating threshold of the square wave circuit through a voltage divider circuit, captures the square wave frequency signal in real time through the MCU unit, thereby performing power failure detection, and reads the time data of voltage anomalies through the RTC unit and stores it in the memory.

[0007] Furthermore, the voltage divider circuit includes voltage divider resistors, operational amplifier circuits, and Zener diodes.

[0008] The voltage divider resistors are used to set the threshold of the subsequent square wave output circuit. The operational amplifier circuit is designed as a non-inverting voltage follower to match the input and output impedances of the preceding and following stages. The Zener diode is used to protect the subsequent circuit by regulating the input voltage at the Zener diode's set value to prevent damage to components due to excessively high input voltage.

[0009] Furthermore, the square wave output circuit has a frequency of 100kHz and a duty cycle of 50%.

[0010] Furthermore, the voltage regulation and filtering circuit includes a π-type filter circuit and a Zener diode; the π-type filter circuit consists of capacitors C1 and C2 and resistor R0, and by adjusting the resistance and capacitance values, it filters out high-frequency components and transient interference in the input voltage.

[0011] Furthermore, the square wave output circuit is mainly composed of a 555 timer, which transmits the input voltage after the previous stage voltage divider to R3 and connects to the TRIG and THR pins of the 555 timer.

[0012] Furthermore, the internal design of the MCU unit includes timer capture, cycle diagnostic functions, RTC read / write functions, and memory read / write functions. The internal timer is set to capture mode and configured with an interrupt triggering method. It counts the input square wave signal, periodically comparing the current value with the previous value. If the compared value does not change within a certain time, an external input voltage anomaly is detected. The current time data from the RTC unit is immediately read and written to memory.

[0013] This invention has the following advantages over the prior art:

[0014] This invention utilizes the fact that when the power supply to the device drops below a set threshold voltage for generating a square wave signal, the MCU performs millisecond-level detection, enabling rapid prediction of the device's power supply status. It also utilizes the remaining charge in the product's internal energy storage capacitor to save data and achieve energy utilization. Attached Figure Description

[0015] Figure 1 This is a structural block diagram of the power-off detection circuit of this utility model;

[0016] Figure 2 for Figure 1 Schematic diagram of a medium-voltage stabilizing filter circuit;

[0017] Figure 3 for Figure 1 Schematic diagram of a voltage divider circuit;

[0018] Figure 4 for Figure 1 Schematic diagram of the medium wave output circuit;

[0019] Figure 5This is a schematic diagram showing the correspondence between the power-off voltage and the power-off time when the device loses power in an embodiment of this utility model. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the described embodiments of this utility model without creative effort are within the scope of protection of this utility model. Unless otherwise defined, the technical or scientific terms used herein should have the ordinary meaning understood by those skilled in the art to which this utility model pertains.

[0021] The terms "first," "second," and similar words used in this utility model patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, unless the context clearly indicates otherwise, the singular forms of "an," "a," or "the," etc., do not indicate a quantity limitation, but rather indicate the presence of at least one. Terms such as "comprising" or "including" indicate that the element or object preceding "comprising" encompasses the features, integrals, steps, operations, elements, and / or components listed following "comprising" or "including," and do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0022] This utility model provides a power-down detection circuit with a settable detection threshold. To make the purpose, technical solution, and effects of this utility model clearer and more explicit, the following describes this utility model in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this utility model and are not intended to limit this utility model.

[0023] like Figure 1The diagram shows the overall structure of a power-down detection circuit with a settable detection threshold, according to an embodiment of this utility model. This circuit enables millisecond-level detection of device power failure and rapid data storage. The power-down detection circuit includes a voltage regulator and filter circuit, a voltage divider circuit, a square wave output circuit, an MCU unit, a memory unit, an RTC unit, and a DC-DC power supply circuit. An external power supply outputs an external input voltage signal, which passes through the voltage regulator and filter circuit and the voltage divider circuit before being input to the square wave output circuit. The square wave output circuit is connected to the subsequent MCU unit; the MCU unit is connected to the memory; the MCU unit is connected to the RTC unit; and the DC-DC power supply circuit is connected to the square wave output circuit, the MCU unit, and the memory unit, providing them with power.

[0024] like Figure 2 As shown, the voltage regulator and filter circuit includes a π-type filter circuit and a Zener diode. The π-type filter circuit, composed of C1, C2, and R0, filters out high-frequency components and transient interference in the input voltage by adjusting the resistance and capacitance values. The Zener diode protects the downstream circuitry by regulating the input voltage to its set value to prevent damage to components caused by excessively high input voltage.

[0025] like Figure 3 As shown, the voltage divider circuit includes voltage divider resistors, an operational amplifier circuit, and a Zener diode. The voltage divider resistors are used to set the threshold of the subsequent square wave output circuit. The operational amplifier circuit is designed as a non-inverting voltage follower to match the input and output impedances of the preceding and following stages. The Zener diode, as above, is used to protect the subsequent circuit.

[0026] like Figure 4 As shown, the square wave output circuit is mainly composed of a 555 timer. The input voltage after the pre-stage voltage divider is transmitted to R3 and connected to the TRIG and THR pins of the 555 timer. When the voltage is lower than 1 / 3Vcc and higher than 2 / 3Vcc, a periodically changing square wave signal is generated through the internal comparator. Once the input voltage is lower than 2 / 3Vcc, the square wave output stops.

[0027] When performing power failure detection, according to formula 1: Formula 2: The frequency of the square wave output circuit is set to 100KHz, and the duty cycle is set to 50%.

[0028] Set the detection threshold and set the voltage divider value of the voltage divider circuit as the input value of the square wave output circuit. The voltage signal after voltage division is Vcc, which is equal to the power supply voltage of the square wave output circuit.

[0029] Square wave generation principle: The voltage signal after voltage division is connected to the TRIG and THR pins of the 555 timer. When the voltage is lower than 1 / 3Vcc and higher than 2 / 3Vcc, a periodically changing square wave signal is generated through the internal comparator. Once the input voltage is lower than 2 / 3Vcc, the square wave output stops.

[0030] Power-down detection principle: The MCU unit's internal design includes timer capture, periodic diagnostic functions, RTC read / write functions, and memory read / write functions. The internal timer is set to capture mode, configured with an interrupt triggering method, and counts the input square wave signal. The current value is periodically compared with the previous value. If the compared value does not change within a certain time, the external input voltage is abnormal. The current RTC time is immediately read and written to the memory.

[0031] like Figure 5 The diagram shows the relationship between power-down voltage and power-down time when the device loses power. When the power loss begins at time t0, and the square wave signal is no longer output after time t1, the MCU immediately detects the abnormal external voltage. During the time interval t1 to t2, the device uses the residual charge of the energy storage capacitor to complete log recording or data saving.

[0032] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the scope of the invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the claims.

Claims

1. A power-down detection circuit, characterized in that, The power-down detection circuit includes a voltage regulator and filter circuit, a voltage divider circuit, a square output circuit, an MCU unit, an RTC unit, a memory, and a DC-DC power supply circuit. The external input voltage signal is input to the square wave output circuit after passing through the voltage regulator and filter circuit and the voltage divider circuit in sequence. The MCU unit is connected to the square wave output circuit, the memory, and the RTC unit respectively. The DC-DC power supply circuit is connected to the square wave output circuit, the MCU unit, and the memory.

2. The power failure detection circuit according to claim 1, characterized in that, The voltage divider circuit includes an operational amplifier circuit, a Zener diode, and a voltage divider resistor for setting the detection threshold of the square wave output circuit; the frequency of the square wave output circuit is 100KHz and the duty cycle is 50%.

3. The power failure detection circuit according to claim 2, characterized in that, The operational amplifier circuit uses a positive voltage follower.

4. The power failure detection circuit according to claim 3, characterized in that, The voltage stabilizing filter circuit includes a π-type filter circuit and a Zener diode; the π-type filter circuit is composed of capacitors C1 and C2 and resistor R0.

5. The power failure detection circuit according to claim 4, characterized in that, The square wave output circuit uses a 555 timer.