Circuit for solving frequency multiplication interference of power meter

Abstract

The utility model relates to a circuit for solving frequency multiplication interference of a power meter. The circuit comprises a signal source, a frequency multiplication processing board and a mother board, the signal source forms two paths of input signals; the frequency doubling processing board is provided with a first input signal interface, a VCXO input signal interface, a first output signal interface and an MCU main chip; an ADC chip, a VCXO crystal oscillator and a second input signal interface are arranged on the mother board, the MCU main chip is used for calculating the frequency multiplication relation between the first output signal interface and the VCXO input signal interface, and the result calculated by the MCU main chip outputs voltage through the first output signal interface to control the VCXO crystal oscillator. The utility model relates to a circuit for solving frequency multiplication interference of a power meter, in particular to a circuit for solving frequency multiplication interference of a power meter, which is characterized in that when the frequency of an input signal and the output frequency of a VCXO have frequency multiplication, an MCU outputs a control voltage to adjust the frequency output of the VCXO, so that the frequency of the input signal and the output frequency of the VCXO have no frequency multiplication relationship.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and in particular to a circuit for solving the frequency multiplication interference of a power meter. Background Technology

[0002] A power meter is an instrument for measuring electrical power. Generally, it refers to a power meter used in DC and low-frequency technologies to measure power; it is also called a wattmeter. A power meter consists of two parts: a power sensor and a power indicator. The power sensor, also called a power meter probe, converts high-frequency electrical signals into directly detectable electrical signals.

[0003] After the power meter is assembled, it needs to be tested. During the functional test, it was found that when the frequency of the input signal and the output frequency of the VCXO are in a multiple relationship, the measured power value will fluctuate and the correct power value cannot be read.

[0004] The current practice is to disassemble the machine and readjust the VCXO voltage so that the output frequency is not a multiple of the input signal frequency. However, when the input signal frequency changes again, it may become a multiple of the adjusted output frequency, requiring readjustment again. This back-and-forth disassembly and reassembly wastes manpower and can damage the machine. Utility Model Content

[0005] Therefore, the technical problem to be solved by this utility model is to overcome the problem that in the process of testing power meters in the prior art, it is necessary to disassemble the machine to adjust the VCXO voltage, and adjust the output frequency and input signal frequency, which makes the operation cumbersome, wastes time and is prone to damage to the machine.

[0006] To solve the above-mentioned technical problems, this utility model provides a circuit for solving frequency multiplication interference in power meters, comprising: a signal source, a frequency multiplication processing board, and a motherboard; the signal source generates two input signals; the frequency multiplication processing board is provided with a first input signal interface, a VCXO input signal interface, a first output signal interface, and an MCU main chip, wherein the first input signal of the signal source is connected to the first input signal interface; the motherboard is provided with an ADC chip, a VCXO crystal oscillator, and a second input signal interface, wherein the second input signal of the signal source is connected to the second input signal interface, the VCXO crystal oscillator generates two output signals, the first output signal of the VCXO crystal oscillator is connected to the VCXO input signal interface, the second output signal of the VCXO crystal oscillator is connected to the ADC chip, and the MCU main chip is used to calculate the frequency multiplication relationship between the first output signal interface and the VCXO input signal interface, and the result calculated by the MCU main chip is used to output voltage through the first output signal interface to control the VCXO crystal oscillator. This utility model relates to a circuit for solving frequency multiplication interference in power meters. Specifically, when the frequency of the input signal and the output frequency of the VCXO have a frequency multiplication relationship, the MCU will output a control voltage to adjust the frequency output of the VCXO so that the frequency of the input signal and the output frequency of the VCXO have no frequency multiplication relationship.

[0007] In one embodiment of this utility model, the output voltage of the first output signal interface is used to change the output frequency of the VCXO crystal oscillator.

[0008] In one embodiment of this utility model, the frequency multiplier board is provided with a power interface, which is connected to a power circuit.

[0009] In one embodiment of this utility model, the power supply circuit includes a voltage regulator U1, a first capacitor C1, a second capacitor C2, a three-electrode capacitor C3, and a fourth capacitor C4. The input pin of the voltage regulator U1 is connected to a 5V power supply. The first end of the first capacitor C1 is connected to the input pin of the voltage regulator U1. The first end of the second capacitor C2 is connected to the input pin of the voltage regulator U1. The output voltage of the voltage regulator U1 is used to power the MCU main chip. The first end of the three-electrode capacitor C3 is connected to the output pin of the voltage regulator U1. The first end of the fourth capacitor C4 is connected to the output pin of the voltage regulator U1.

[0010] In one embodiment of this utility model, the voltage regulator U1 is model LT1764AEQ-3.3.

[0011] In one embodiment of this utility model, a filter circuit is connected to the MCU main chip, and the filter circuit includes a fifth capacitor C5, a sixth capacitor C6 and a seventh capacitor C7.

[0012] In one embodiment of this utility model, a second filter circuit is connected to the MCU main chip, and the second filter circuit includes an eighth capacitor C8, a ninth capacitor C9 and a first inductor L1.

[0013] In one embodiment of this utility model, an indicator light is connected to the MCU main chip.

[0014] In one embodiment of this utility model, a resistor is provided between the pins of the MCU main chip and the indicator light.

[0015] In one embodiment of this utility model, the MCU main chip is model ATXMEGA32A4U-MHR.

[0016] Compared with the prior art, the above-mentioned technical solution of this utility model has the following beneficial effects:

[0017] The circuit described in this invention for solving frequency multiplication interference in power meters only requires inputting both the input signal frequency and the VCXO output frequency into the MCU chip. When the input signal frequency and the VCXO output frequency have a frequency multiplication relationship, the MCU calculates and outputs a Vout voltage to control the VCXO, changing the VCXO output frequency so that the input signal frequency and the VCXO output frequency have no frequency multiplication relationship, thus preventing the power meter's displayed power value from fluctuating. Attached Figure Description

[0018] To make the content of this utility model easier to understand, the present utility model will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0019] Figure 1 This is a layout diagram of the circuit for resolving frequency doubling interference in a preferred embodiment of the present invention;

[0020] Figure 2 The circuit diagram of the circuit for solving the frequency doubling interference of the power meter in the preferred embodiment of this utility model;

[0021] Figure 3 This is a circuit diagram of the power supply circuit in a preferred embodiment of the present invention.

[0022] Explanation of reference numerals in the accompanying drawings: Signal source 100, frequency multiplier processing board 200, first input signal interface 201, VCXO input signal interface 202, first output signal interface 203, MCU main chip 204, motherboard 300, ADC chip 301, VCXO crystal oscillator 302, second input signal interface 303, power supply circuit 400. Detailed Implementation

[0023] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments are not intended to limit the present invention.

[0024] Reference Figure 1 , 2 As shown, the circuit for solving frequency multiplication interference in a power meter according to this utility model includes: a signal source 100, a frequency multiplication processing board 200, and a motherboard 300; the signal source 100 generates two input signals; the frequency multiplication processing board 200 is provided with a first input signal interface 201, a VCXO input signal interface 202, a first output signal interface 203, and an MCU main chip 204, and the first input signal of the signal source 100 is connected to the first input signal interface 201; the motherboard 300 is provided with an ADC chip 301, a VCXO crystal oscillator 302, and a second input signal interface 303, and the signal source 100 generates two input signals; the frequency multiplication processing board 200 is provided with a first input signal interface 201, a VCXO crystal oscillator 302, and a second input signal interface 303, and the signal source 100 generates two input signals; the frequency multiplication processing board 200 is provided with a first input signal interface 201, a VCXO crystal oscillator 202, and a second input signal interface 303, and the frequency multiplication processing board 2 ...2, a VCXO crystal oscillator 202, and a second input signal interface 303, and the frequency The second input signal of the motherboard 300 is connected to the second input signal interface 303. The VCXO crystal oscillator 302 generates two output signals. The first output signal of the VCXO crystal oscillator 302 is connected to the VCXO input signal interface 202, and the second output signal of the VCXO crystal oscillator 302 is connected to the ADC chip 301. The MCU main chip 204 is used to calculate the frequency multiplication relationship between the first output signal interface 203 and the VCXO input signal interface 202. The result calculated by the MCU main chip 204 is output through the first output signal interface 203 to control the VCXO crystal oscillator 302. The signal output of the motherboard 300 is sent to the measurement board connected later. The data signal of the measurement board is connected to the motherboard, and the signal output of the motherboard is sent to the display.

[0025] When the frequency of the input signal of signal source 100 and the output frequency of VCXO crystal oscillator 302 do not have a frequency multiplication relationship, the input signal of signal source 100 is input to ADC chip 301 through the connector. ADC chip 301 converts the input analog signal into a digital signal and outputs it to the measurement board. The measurement board processes the data and outputs it to the main board. After further data processing by the main board, the power value is displayed on the monitor. By adding a frequency multiplication processing circuit, the input signal frequency of signal source 100 and the output frequency of VCXO crystal oscillator 302 are simultaneously input to MCU main chip 204. When the frequency of the input signal of signal source 100 and the output frequency of VCXO crystal oscillator 302 have a frequency multiplication relationship, after calculation by MCU main chip 204, the output voltage Vout of MCU main chip 204 controls VCXO crystal oscillator 302, changing the output frequency of VCXO crystal oscillator 302 so that the frequency of the input signal of signal source 100 and the output frequency of VCXO crystal oscillator 302 do not have a frequency multiplication relationship, thus preventing the power meter's displayed power value from fluctuating.

[0026] Specifically, the output voltage of the first output signal interface 203 is used to change the output frequency of the VCXO crystal oscillator 302.

[0027] Specifically, the voltage regulator U1 is model LT1764AEQ-3.3. The MCU main chip 204 is model ATXMEGA32A4U-MHR.

[0028] Reference Figure 3 As shown, the frequency multiplier board 200 is equipped with a power interface 205, which is connected to a power circuit 400. The power circuit 400 includes a voltage regulator U1, a first capacitor C1, a second capacitor C2, a triple capacitor C3, and a fourth capacitor C4. The input pin of the voltage regulator U1 is connected to a 5V power supply. The first terminal of the first capacitor C1 is connected to the input pin of the voltage regulator U1, and the second terminal of the first capacitor C1 is connected to ground. The first terminal of the second capacitor C2 is connected to the input pin of the voltage regulator U1, and the second terminal of the second capacitor C2 is connected to ground. The output voltage of the voltage regulator U1 is used to power the MCU main chip 204. The first terminal of the triple capacitor C3 is connected to the output pin of the voltage regulator U1, and the second terminal of the triple capacitor C3 is connected to ground. The first terminal of the fourth capacitor C4 is connected to the output pin of the voltage regulator U1, and the second terminal of the fourth capacitor C4 is connected to ground. The output of the voltage regulator U1 is used to output a 3.3V voltage.

[0029] Figure 3 J1 is the USB 5V power input interface. The voltage regulator U1 converts the input 5V to 3.3V to power the MCU main chip 204.

[0030] A filter circuit is connected to the aforementioned MCU main chip 204. This filter circuit includes a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7. The first terminal of the fifth capacitor C5 is connected to the VCC pin of the MCU main chip 204, and the second terminal of the fifth capacitor C5 is grounded. The first terminal of the sixth capacitor C6 is connected to the VCC pin of the MCU main chip 204, and the second terminal of the sixth capacitor C6 is grounded. The first terminal of the seventh capacitor C7 is connected to the VCC pin of the MCU main chip 204, and the second terminal of the seventh capacitor C7 is grounded. All three capacitors are 100nF.

[0031] A second filter circuit is connected to the aforementioned MCU main chip 204. This second filter circuit includes an eighth capacitor C8, a ninth capacitor C9, and a first inductor L1. The first inductor L1 is connected in series between the 3.3V output voltage of the voltage regulator U1 and the AVCC pin of the MCU main chip 204, and the first inductor L1 has a capacitance of 3.3uH. The first terminal of the eighth capacitor C8 is connected to the AVCC pin of the MCU main chip 204, and the second terminal of the eighth capacitor C8 is grounded. The first terminal of the ninth capacitor C9 is connected to the AVCC pin of the MCU main chip 204, and the second terminal of the ninth capacitor C9 is grounded. The eighth capacitor C8 has a capacitance of 100NF. The ninth capacitor C9 has a capacitance of UF.

[0032] An indicator light 204 is connected to the aforementioned MCU main chip 204, and the indicator light 204 is preferably green. A resistor is provided between the pin of the MCU main chip 204 and the indicator light 204.

[0033] The working principle of the circuit for solving the frequency multiplication interference of the power meter in this utility model is as follows:

[0034] The output signals of signal source 100 are input to the first input signal interface 201 and the second input signal interface 303 respectively. The output signals of VCXO crystal oscillator 302 on motherboard 300 are input to ADC chip 301 and VCXO input signal interface 202 on motherboard 300 respectively. When the frequency of the input signal of signal source 100 and the output frequency of VCXO crystal oscillator 302 have a multiplier relationship, after calculation by MCU main chip 204, the first output signal interface 203 outputs Vout voltage to control VCXO crystal oscillator 302, changing the output frequency of VCXO crystal oscillator 302 so that the frequency of the input signal and the output frequency of VCXO crystal oscillator 302 have no multiplier relationship, so that the power value displayed by the power meter does not fluctuate.

[0035] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the protection scope of this invention.

Claims

1. A circuit for solving frequency doubling interference in a power meter, characterized in that, include: Signal source, frequency multiplier board, and motherboard; The signal source generates two input signals; A frequency multiplier board is provided with a first input signal interface, a VCXO input signal interface, a first output signal interface and an MCU main chip, and the first input signal of the signal source is connected to the first input signal interface; The motherboard has an ADC chip, a VCXO crystal oscillator, and a second input signal interface. The second input signal of the signal source is connected to the second input signal interface. The VCXO crystal oscillator generates two output signals. The first output signal of the VCXO crystal oscillator is connected to the VCXO input signal interface, and the second output signal of the VCXO crystal oscillator is connected to the ADC chip. The MCU main chip is used to calculate the frequency multiplication relationship between the first output signal interface and the VCXO input signal interface. The result calculated by the MCU main chip is used to control the VCXO crystal oscillator by outputting a voltage through the first output signal interface.

2. The circuit for solving the frequency doubling interference of the power meter according to claim 1, characterized in that: The output voltage of the first output signal interface is used to change the output frequency of the VCXO crystal oscillator.

3. The circuit for solving the frequency doubling interference of the power meter according to claim 1, characterized in that: The frequency multiplier board is equipped with a power interface, which is connected to the power circuit.

4. The circuit for solving the power meter frequency doubling interference according to claim 3, characterized in that: The power supply circuit includes a voltage regulator U1, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. The input pin of the voltage regulator U1 is connected to a 5V power supply. The first end of the first capacitor C1 is connected to the input pin of the voltage regulator U1. The first end of the second capacitor C2 is connected to the input pin of the voltage regulator U1. The output voltage of the voltage regulator U1 is used to power the MCU main chip. The first end of the third capacitor C3 is connected to the output pin of the voltage regulator U1. The first end of the fourth capacitor C4 is connected to the output pin of the voltage regulator U1.

5. The circuit for solving the frequency doubling interference of the power meter according to claim 4, characterized in that: The voltage regulator U1 is model LT1764AEQ-3.

3.

6. The circuit for solving the frequency doubling interference of the power meter according to claim 1, characterized in that: The MCU main chip is connected to a filter circuit, which includes a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7.

7. The circuit for solving the frequency doubling interference of the power meter according to claim 1, characterized in that: The MCU main chip is connected to a second filter circuit, which includes an eighth capacitor C8, a ninth capacitor C9, and a first inductor L1.

8. The circuit for solving the frequency doubling interference of the power meter according to claim 1, characterized in that: An indicator light is connected to the MCU main chip.

9. The circuit for solving the power meter frequency doubling interference according to claim 8, characterized in that: A resistor is provided between the pins of the MCU main chip and the indicator light.

10. The circuit for solving the frequency doubling interference of the power meter according to claim 1, characterized in that: The model of the MCU main chip is ATXMEGA32A4U-MHR.

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