Circuit for automatically detecting access of LVDS (Low Voltage Differential Signaling) screen and electronic equipment thereof
By introducing a monitoring circuit between the LVDS pins and the eDP to LVDS control chip, the problem that the external chip cannot automatically detect the LVDS screen connection is solved, realizing plug-and-play functionality and resource saving for the LVDS screen.
Patent Information
- Application Number
- CN202422642153.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2034-10-30
AI Technical Summary
In existing technologies, external eDP to LVDS chips cannot automatically detect whether an LVDS screen is connected, which may cause the system to incorrectly switch to a non-existent LVDS controller, resulting in a black screen.
By introducing a monitoring circuit between the LVDS pins and the eDP to LVDS control chip, the eDP to LVDS control chip can be enabled or disabled by using the state changes of the LVDS pins, thereby achieving automatic detection of the connection and disconnection of the LVDS screen.
It enables plug-and-play functionality for LVDS screens, avoiding monitor black screen issues, saving system resources, and preventing display conflicts.
Smart Images

Figure CN223540009U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronics and power, and in particular to a circuit and electronic device for automatically detecting LVDS screen access. Background Technology
[0002] In existing technologies, a typical dual-channel 24-bit screen requires at least 20 signal pins. With the development of computer processor chip integration, such functional solutions are no longer integrated into the main chip solution, but instead use external functional chip solutions. In the actual design of the main control board, the most commonly used chip solution is the eDP to LVDS converter. If there is no LVDS panel insertion automatic detection circuit, the system will think that there is always an LVDS controller in the system after the motherboard is powered on.
[0003] However, in actual use or product control, an LVDS screen may not be connected, but other types of display interfaces may be used. The operating system may default to prioritizing the display on the existing LVDS controller, which will cause other monitors to go black, causing a lot of confusion and inconvenience in actual use.
[0004] In view of the above, this application is hereby submitted. Utility Model Content
[0005] This invention provides a circuit and electronic device for automatically detecting LVDS screen connection, aiming to solve the problem that using an external eDP to LVDS chip cannot automatically detect whether an LVDS screen is connected.
[0006] The first embodiment of this utility model provides a circuit for automatically detecting LVDS screen access, including: a motherboard, LVDS pins configured on the motherboard, an eDP to LVDS control chip, and a monitoring circuit;
[0007] The LVDS pin is used to connect to the LVDS screen. The output terminal of the LVDS pin is electrically connected to the control terminal of the monitoring circuit. The output terminal of the monitoring circuit is electrically connected to the reset terminal of the eDP to LVDS control chip.
[0008] The monitoring circuit is configured to enable the eDP to LVDS control chip when the LVDS screen is connected to the LVDS pin, and to disable the eDP to LVDS control chip when the LVDS screen is removed from the LVDS pin.
[0009] Preferably, the LVDS connector is configured with a first pin and a second pin that are not grounded, wherein the first pin and the second pin are grounded when the LVDS screen is connected to the LVDS connector.
[0010] Preferably, the monitoring circuit includes: a first resistor, a second resistor, a third resistor, and a MOSFET;
[0011] The output terminal of the LVDS connector is electrically connected to the gate (G) of the MOSFET through the first resistor, the source (S) of the MOSFET is grounded, the drain (D) of the MOSFET is electrically connected to the reset terminal of the eDP-to-LVDS control chip through the third resistor, and the power supply is electrically connected to the gate (G) of the MOSFET through the second resistor.
[0012] Preferably, the monitoring circuit further includes an anti-static diode, wherein the first end of the anti-static diode is electrically connected between the first resistor and the output end of the LVDS pin, and the second end of the anti-static diode is grounded.
[0013] Preferably, the MOS transistor is an N-channel MOSFET.
[0014] The first embodiment of this utility model provides an electronic device, including an LVDS screen and a circuit for automatically detecting the connection of the LVDS screen as described in any of the above. The LVDS screen can enable the eDP to LVDS control chip when it is connected to the LVDS pin, and can disable the eDP to LVDS control chip when the LVDS screen is removed from the LVDS pin.
[0015] This invention provides an automatic detection circuit and electronic device for LVDS screen connection. The circuit is electrically connected to the control terminal of the monitoring circuit via an LVDS connector. When the LVDS screen is connected to the LVDS connector, the reset terminal of the eDP-to-LVDS control chip is pulled low to enable the chip. When the LVDS screen is removed from the LVDS connector, the reset terminal of the eDP-to-LVDS control chip is pulled high to disable it. This invention aims to solve the problem that using an external eDP-to-LVDS chip cannot automatically detect whether an LVDS screen is connected. Attached Figure Description
[0016] Figure 1 This is a circuit diagram for automatically detecting LVDS screen access provided in an embodiment of this utility model.
[0017] Figure 2 This is a circuit diagram of the LVDS connector provided in an embodiment of the present invention. Detailed Implementation
[0018] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model. Therefore, the following detailed description of the embodiments of this utility model provided in the accompanying drawings is not intended to limit the scope of the claimed utility model, but merely represents selected embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model.
[0019] The specific embodiments of this utility model are described in detail below with reference to the accompanying drawings.
[0020] This invention provides a circuit and electronic device for automatically detecting LVDS screen connection, aiming to solve the problem that using an external eDP to LVDS chip cannot automatically detect whether an LVDS screen is connected.
[0021] Please see Figure 1 The first embodiment of this utility model provides a circuit for automatically detecting LVDS screen access, including: a motherboard, an LVDS pin 1 configured on the motherboard, an eDP to LVDS control chip 3, and a monitoring circuit 2;
[0022] The LVDS pin 1 is used to connect to the LVDS screen. The output terminal of the LVDS pin 1 is electrically connected to the control terminal of the monitoring circuit 2. The output terminal of the monitoring circuit 2 is electrically connected to the reset terminal of the eDP to LVDS control chip 3.
[0023] The monitoring circuit 2 is configured to enable the eDP to LVDS control chip 3 when the LVDS screen is connected to the LVDS pin 1, and to disable the eDP to LVDS control chip 3 when the LVDS screen is removed from the LVDS pin 1.
[0024] It should be noted that the inventors discovered that LVDS (Low Voltage Differential) screens typically require a large number of signal pins. Currently, main control chips usually do not integrate LVDS controllers, but instead use external eDP-to-LVDS chips. The system will assume that the LVDS controller is always present, even if no LVDS screen is actually connected. When no LVDS screen is connected, the system may prioritize switching to the LVDS controller, causing other displays to go black.
[0025] In this embodiment, based on the configuration of the monitoring circuit 2, when the LVDS screen is connected to the LVDS connector 1, the monitoring circuit 2 can detect this state change and immediately send a signal to enable the eDP to LVDS control chip 3. This achieves plug-and-play functionality without user intervention. Conversely, when the LVDS screen is removed from the LVDS connector 1, the monitoring circuit 2 can also sense this change and quickly send a signal to disable the eDP to LVDS control chip 3.
[0026] The eDP to LVDS control chip 3 is responsible for converting eDP (Embedded Display Port) signals to LVDS signals, enabling modern main control chips to support LVDS displays. Through the control of monitoring circuit 2, the eDP to LVDS control chip 3 can be enabled or disabled as needed, saving system resources and avoiding potential display conflicts.
[0027] The LVDS connector 1 includes multiple pins for transmitting clock signals, data signals, etc. In this embodiment, certain specific pins of the LVDS connector 1 are used as transmission channels for detection signals, forming an electrical connection with the monitoring circuit 2. This does not affect the normal transmission of LVDS signals, while adding an automatic detection function, making full use of existing hardware resources.
[0028] Please see Figure 2 In one possible embodiment of the present invention, the LVDS pin 1 is configured with a first pin and a second pin that are not grounded, wherein the first pin and the second pin are grounded when the LVDS screen is connected to the LVDS pin 1.
[0029] In this embodiment, PI N4 / PI N6 (i.e., the first and second pins) are used to connect the LVDS pin 1 on the motherboard without grounding, serving as the LVDS_DETECT- function pin. PI N4 / PI N6 is grounded at the LVDS screen end (this can be achieved using the matching cable). When the LVDS screen is plugged into the motherboard, the LVDS_DETECT- pin becomes a grounded pin (low level), thus setting the LVDS_DETECT- signal to 0 (0V low level) when plugged into the motherboard. Conversely, the LVDS_DETECT- signal is pulled up by the second resistor R2 on the motherboard, which means it is set to 1 by default (i.e., 3.3V high level).
[0030] Please see Figure 1 In one possible embodiment of the present invention, the monitoring circuit 2 includes: a first resistor R1, a second resistor R2, a third resistor R3, and a MOSFET Q1;
[0031] The output terminal of the LVDS connector 1 is electrically connected to the gate (G) of the MOSFET Q1 through the first resistor R1. The source (S) of the MOSFET Q1 is grounded. The drain (D) of the MOSFET Q1 is electrically connected to the reset terminal of the eDP to LVDS control chip 3 through the third resistor R3. The power supply is electrically connected to the gate (G) of the MOSFET Q1 through the second resistor R2.
[0032] It should be noted that the first resistor R1 is a current-limiting resistor with a resistance of 100 ohms, the second resistor R2 is a pull-up resistor with a resistance of 10K ohms, and the third resistor R3 is a series signal resistor with a resistance of 33 ohms.
[0033] When the LVDS screen is not plugged into the motherboard, LVDS_DETECT- is pulled up to 3.3V through the second resistor R2, MOSFET Q1 is turned on, and the RESET- chip reset signal is pulled low. This turns off the onboard eDP to LVDS control chip 3.
[0034] When the LVDS screen is plugged into the motherboard, the LVDS_DETECT- signal is grounded at the screen end, which is low level (0V). The MOSFET Q1 is turned on and cut off, and the RESET- chip reset signal is released. Other reset signals on the motherboard are effectively high level, realizing the chip's effective reset function. The chip then starts to work normally.
[0035] Please continue reading. Figure 1 It should be noted that in this embodiment, an HPDET signal terminal is also configured. This terminal can also be used to monitor the hot-plugging of the LVDS screen by connecting the drain of the MOS transistor Q1 to the HPDET signal terminal. Its effect is the same as that of the RESET terminal. The solution can be selected based on the actual situation.
[0036] In one possible embodiment of the present invention, the monitoring circuit 2 further includes an anti-static diode D1, wherein the first end of the anti-static diode D1 is electrically connected between the first resistor R1 and the output end of the LVDS pin 1, and the second end of the anti-static diode D1 is grounded.
[0037] It should be noted that the purpose of the anti-static diode D1 is to ensure that when the LVDS pin 1 experiences electrostatic discharge, excessive voltage will be quickly conducted to ground through the anti-static diode D1, thereby preventing damage to subsequent sensitive electronic components. Furthermore, the presence of the anti-static diode D1 does not affect the normal function of the monitoring circuit 2. In the absence of electrostatic interference, due to the unidirectional conductivity of the diode, it will not affect the normal signal transmission between the LVDS pin 1 and the monitoring circuit 2.
[0038] In one possible embodiment of this utility model, the MOS transistor Q1 can be an N-channel MOSFET.
[0039] It should be noted that in other embodiments, the MOSFET Q1 can also be a P-channel MOSFET, and its circuit structure will change accordingly. For example, the P-channel MOSFET can be turned on by a low level, thereby pulling down or pulling up the reset terminal of the eDP to LVDS control chip 3. These solutions can be selected according to the actual situation, and no specific limitation is made here, but these solutions are all within the protection scope of this utility model.
[0040] The first embodiment of this utility model provides an electronic device, including an LVDS screen and a circuit for automatically detecting the connection of the LVDS screen as described in any of the above. The LVDS screen can enable the eDP to LVDS control chip 3 when it is connected to the LVDS pin 1, and can disable the eDP to LVDS control chip 3 when the LVDS screen is removed from the LVDS pin 1.
[0041] This invention provides an automatic detection circuit and electronic device for LVDS screen connection. The circuit is electrically connected to the control terminal of the monitoring circuit 2 via an LVDS pin 1. When the LVDS screen is connected to the LVDS pin 1, the reset terminal of the eDP-to-LVDS control chip 3 is pulled low to enable the eDP-to-LVDS control chip 3. When the LVDS screen is removed from the LVDS pin 1, the reset terminal of the eDP-to-LVDS control chip 3 is pulled high to disable the eDP-to-LVDS control chip 3. This invention aims to solve the problem that using an external eDP-to-LVDS chip cannot automatically detect whether an LVDS screen is connected.
[0042] The above are merely preferred embodiments of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions that fall within the scope of this utility model's concept are protected by this utility model.
Claims
1. A circuit for automatically detecting LVDS screen connection, characterized in that, include: The motherboard, the LVDS headers configured on the motherboard, the eDP to LVDS control chip, and the monitoring circuitry; The LVDS pin is used to connect to the LVDS screen. The output terminal of the LVDS pin is electrically connected to the control terminal of the monitoring circuit. The output terminal of the monitoring circuit is electrically connected to the reset terminal of the eDP to LVDS control chip. The monitoring circuit is configured to enable the eDP to LVDS control chip when the LVDS screen is connected to the LVDS pin, and to disable the eDP to LVDS control chip when the LVDS screen is removed from the LVDS pin.
2. The circuit for automatically detecting LVDS screen access according to claim 1, characterized in that, The LVDS connector is configured with a first pin and a second pin that are not grounded, wherein the first pin and the second pin are grounded when the LVDS screen is connected to the LVDS connector.
3. The circuit for automatically detecting LVDS screen access according to claim 1, characterized in that, The monitoring circuit includes: a first resistor, a second resistor, a third resistor, and a MOSFET; The output terminal of the LVDS connector is electrically connected to the gate (G) of the MOSFET through the first resistor, the source (S) of the MOSFET is grounded, the drain (D) of the MOSFET is electrically connected to the reset terminal of the eDP-to-LVDS control chip through the third resistor, and the power supply is electrically connected to the gate (G) of the MOSFET through the second resistor.
4. The circuit for automatically detecting LVDS screen access according to claim 3, characterized in that, The monitoring circuit also includes an anti-static diode, wherein the first end of the anti-static diode is electrically connected between the first resistor and the output end of the LVDS pin, and the second end of the anti-static diode is grounded.
5. The circuit for automatically detecting LVDS screen access according to claim 3, characterized in that, The MOS transistor is an N-channel MOSFET.
6. An electronic device, characterized in that, The device includes an LVDS screen and a circuit for automatically detecting LVDS screen access as described in any one of claims 1 to 5, wherein the LVDS screen can enable the eDP to LVDS control chip when it is connected to the LVDS pin, and can disable the eDP to LVDS control chip when the LVDS screen is removed from the LVDS pin.
Citation Information
Cited By
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