High-efficiency half-bridge hard switch charger circuit based on PFC chip
By using a half-bridge hard-switching charger circuit based on a PFC chip, the problems of complexity and instability in existing hard-switching charger circuits are solved, and a charger circuit design with high efficiency and low harmonic content is achieved.
Patent Information
- Application Number
- CN202423009221.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2034-12-06
AI Technical Summary
Existing hard-switching charger circuits use a full-bridge topology, which has problems such as circuit complexity, driving complexity, and instability.
A high-efficiency half-bridge hard-switching charger circuit based on a PFC chip is adopted, including a control board and a power board. By combining a PFC circuit module, a half-bridge topology circuit module and a full-wave rectifier circuit module, a half-bridge topology structure is formed using an NCP1654 PFC chip and an IGBT transistor, which simplifies the driving process and improves stability.
It improves the power factor, reduces harmonic content, simplifies the driving process, and enhances the stability and efficiency of the circuit.
Smart Images
Figure CN223540298U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of charger circuit technology, and in particular to a high-efficiency half-bridge hard-switching charger circuit based on a PFC chip. Background Technology
[0002] Hard-switching technology refers to the use of switching devices in circuits to achieve efficient power conversion. In hard-switching circuits, the switching devices absorb and release energy in the circuit, and their turn-on time, turn-off time, and switching frequency have a significant impact on the circuit's efficiency and performance. Hard-switching circuits have advantages such as efficient energy conversion, reduced component losses and heat generation, and improved circuit conversion efficiency and power density, and are therefore widely used in many power conversion devices and systems.
[0003] Current hard-switching charger circuits use a full-bridge topology, which has problems such as circuit complexity, driving complexity, and instability. Utility Model Content
[0004] This disclosure provides a high-efficiency half-bridge hard-switching charger circuit based on a PFC chip to solve one of the technical problems recognized by the inventors.
[0005] This disclosure provides a high-efficiency half-bridge hard-switching charger circuit based on a PFC chip, including a control board and a power supply board. The input terminal of the power supply board is connected to a PFC circuit module, which is connected to the control board. The control board is connected to one end of a drive transformer LAB, and the other end of the drive transformer LAB is connected to a half-bridge topology circuit module. The half-bridge topology circuit module is connected to one end of a transformer T1, and the other end of the transformer T1 is connected to a full-wave rectifier circuit module. The full-wave rectifier circuit module is connected to a relay FJH, which is used to control the charger's output.
[0006] Preferably, the PFC circuit module includes a chip JP3, a voltage regulator circuit unit, and a rectifier filter circuit unit. The chip JP3 is an NCP1654 small board. The eighth pin of the chip JP3 is connected to the voltage regulator circuit unit, and the first, seventh, ninth, eleventh, and fourteenth pins of the chip JP3 are connected to the rectifier filter circuit unit.
[0007] Preferably, the voltage regulator circuit unit includes an input terminal M1, a capacitor C011 connected in parallel across the two ends of the input terminal M1, a collector of a transistor Q9 connected to one end of the input terminal M1, an output terminal of the input terminal M1 connected to the collector of the transistor Q9, a diode VZ101 disposed between the output terminal of the input terminal M1 and the collector of the transistor Q9, an emitter of the transistor Q9 connected to the eighth pin of the chip JP3, a resistor R014 connected between the base and collector of the transistor Q9, a diode D14 connected between the collector and emitter of the transistor Q9, and a capacitor C012 connected between the base and emitter of the transistor Q9.
[0008] Preferably, the rectifier filter circuit unit includes a MOSFET Q101A and a transistor QB. The gate (G) of the MOSFET Q101A is connected to the emitter and base of the transistor QB, respectively. A resistor R107 is provided between the gate of the MOSFET Q101A and the emitter of the transistor QB. A resistor R105, a diode VZ102, and a resistor R106 are connected in series between the gate of the MOSFET Q101A and the base of the transistor QB. The source (S) of the MOSFET Q101A is connected to the collector of the transistor QB. The drain (D) of the MOSFET Q101A is connected to the second pin of a boost inductor L03. The second pin of the boost inductor L03 is connected to a diode D07. One end of the diode D07 is connected to the first pin of the chip JP3.
[0009] Preferably, it also includes sampling resistors Rs2 and Rs3, which are connected in parallel, and the two ends of the sampling resistors Rs2 and Rs3 are respectively connected to the first pin and the second pin of the boost inductor L03.
[0010] Preferably, the half-bridge topology circuit module includes IGBT GTB and IGBT GTD. The first and second pins of the drive transformer LAB are connected to the control board. The third and fourth pins of the drive transformer LAB are respectively connected to the first and third pins of the IGBT GTB. The fifth and sixth pins of the drive transformer LAB are respectively connected to the first and third pins of the IGBT GTD. The third pin of the IGBT GTB and the second pin of the IGBT GTD are connected and connected to the second pin of the transformer T1. The first and second pins of the transformer T1 are connected to the transformer T3. The end of the transformer T3 away from the transformer T1 is connected to the control board.
[0011] Preferably, the second pin of the IGBT transistor GTB is connected to capacitors C6 and C5, which are connected in series. Capacitors C1 and C2 are connected in parallel across the two ends of capacitors C6 and C5. The first pin of the transformer T3 is connected between capacitors C6 and C5.
[0012] Preferably, the full-wave rectifier circuit module includes diodes DB601, DB602, DB603, and DB604. One end of diodes DB601 and DB602 is connected to the third pin of transformer T1, and one end of diodes DB603 and DB604 is connected to the fourth pin of transformer T1. The ends of diodes DB601, DB602, DB603, and DB604 away from transformer T1 are connected to inductor L2. The fifth pin of transformer T1 is connected to inductor L3, and one end of inductor L3 is connected to the negative terminal. Capacitors C11, C12, C13, C14, and C15 are connected between inductors L2 and L3. The relay FJH is connected to the positive terminal.
[0013] Preferably, the circuit also includes a low-pass filter module connected to the power supply board. The low-pass filter module includes a rectifier bridge BG1, a common-mode inductor L1A, a differential-mode inductor L1B, and capacitors C1A, C1B, and C4. The two ends of capacitor C1A are connected to the third and fourth pins of the common-mode inductor L1A, respectively. The first and second pins of the common-mode inductor L1A are connected to the third and fourth pins of the differential-mode inductor L1B, respectively. Capacitor C1B is connected between the common-mode inductor L1A and the differential-mode inductor L1B. The two ends of capacitor C4 are connected to the first and third pins of the rectifier bridge BG1, respectively. The second pin of the rectifier bridge BG1 is connected to the PFC circuit module.
[0014] The main advantages of this disclosure are: the primary component of this utility model uses a high-efficiency half-bridge hard switch with an NCP1654 PFC chip, which improves the power factor and reduces harmonic content. Furthermore, the half-bridge topology makes the drive simple and stable.
[0015] It should be understood that both the foregoing general description and the following detailed description are for illustrative purposes and do not necessarily limit the scope of this disclosure. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate the subject matter of this disclosure. Furthermore, the specification and drawings serve to explain the principles of this disclosure. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0017] Figure 1 This is a circuit diagram of the PFC circuit module according to an embodiment of the present disclosure;
[0018] Figure 2 This is a circuit diagram of the half-bridge topology circuit module and the full-wave rectifier circuit module according to an embodiment of the present disclosure;
[0019] Figure 3 This is a circuit diagram of the power supply board according to an embodiment of the present disclosure;
[0020] Figure 4 This is a circuit diagram of the control board according to an embodiment of the present disclosure;
[0021] Figure 5 This is a circuit diagram of a low-pass filter circuit module according to an embodiment of the present disclosure;
[0022] Icons: 100 - PFC circuit module; 200 - Half-bridge topology circuit module; 300 - Full-wave rectifier circuit module; 400 - Low-pass filter circuit module. Detailed Implementation
[0023] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments.
[0024] Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this disclosure.
[0025] In the description of this disclosure, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0026] In the description of this disclosure, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linkage" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure based on the specific circumstances.
[0027] Example
[0028] like Figure 1-5 As shown, this embodiment provides a high-efficiency half-bridge hard-switching charger circuit based on a PFC chip, including: a control board and a power board. The input terminal of the power board is connected to a PFC circuit module 100, which is connected to the control board. One end of the control board is connected to a drive transformer LAB, and the other end of the drive transformer LAB is connected to a half-bridge topology circuit module 200. The half-bridge topology circuit module 200 is connected to one end of a transformer T1, and the other end of the transformer T1 is connected to a full-wave rectifier circuit module 300. The full-wave rectifier circuit module 300 is connected to a relay FJH, which is used to control the output of the charger.
[0029] In this embodiment, the PFC circuit module 100 reduces the primary current, synchronizing it with the input voltage waveform, improving the power factor, and reducing harmonic content. This effectively solves the electromagnetic interference (EMI) and electromagnetic compatibility (EMC) problems caused by severe current waveform distortion due to capacitive loads. The secondary winding uses a half-bridge topology circuit module 200 to simplify and stabilize the drive, reducing circuit complexity. Finally, after passing through transformer T1, the output is rectified by the full-wave rectifier circuit module 300, and the rectified output is controlled by relay FJH.
[0030] Specifically, the PFC circuit module 100 includes a chip JP3, a voltage regulator circuit unit, and a rectifier and filter circuit unit. The chip JP3 is an NCP1654 small board. The eighth pin of the chip JP3 is connected to the voltage regulator circuit unit, and the first, seventh, ninth, eleventh, and fourteenth pins of the chip JP3 are connected to the rectifier and filter circuit unit. The chip JP3, an NCP1654 small board, is the control chip and control circuit of the PFC circuit module 100.
[0031] The voltage regulator circuit unit includes an input terminal M1, with a capacitor C011 connected in parallel across its two ends. One end of the input terminal M1 is connected to the collector of a transistor Q9. The output terminal of the input terminal M1 is connected to the collector of the transistor Q9. A diode VZ101 is positioned between the output terminal of the input terminal M1 and the collector of the transistor Q9. The emitter of the transistor Q9 is connected to pin 8 of the chip JP3. A resistor R014 is connected between the base and collector of the transistor Q9. A diode D14 is connected between the collector and emitter of the transistor Q9. A capacitor C012 is connected between the base and emitter of the transistor Q9. A 12V voltage is input through the input terminal M1, regulated by the transistor Q9, and then supplies power to the chip JP3.
[0032] The rectifier and filter circuit unit includes a MOSFET Q101A and a transistor QB. The gate (G) of the MOSFET Q101A is connected to the emitter and base of the transistor QB, respectively. A resistor R107 is provided between the gate of the MOSFET Q101A and the emitter of the transistor QB. A resistor R105, a diode VZ102, and a resistor R106 are connected in series between the gate of the MOSFET Q101A and the base of the transistor QB. The source (S) of the MOSFET Q101A is connected to the collector of the transistor QB. The drain (D) of the MOSFET Q101A is connected to the second pin of a boost inductor L03. The second pin of the boost inductor L03 is connected to a diode D07. One end of the diode D07 is connected to the first pin of the chip JP3. MOSFET Q101A is the boost MOSFET in the PFC circuit. It works with boost inductor L03 to boost the circuit voltage, which is then rectified and output by diode D07.
[0033] This system also includes sampling resistors Rs2 and Rs3, which are connected in parallel. The two ends of Rs2 and Rs3 are connected to the first and second pins of the boost inductor L03, respectively. Feedback is provided to chip JP3 via sampling resistors Rs2 and Rs3, which then changes the drive signal for MOSFET Q101A to ensure the voltage output of diode D07 is normal.
[0034] Specifically, the half-bridge topology circuit module 200 includes IGBT GTB and IGBT GTD. The first and second pins of the drive transformer LAB are connected to the control board. The third and fourth pins of the drive transformer LAB are connected to the first and third pins of the IGBT GTB, respectively. The fifth and sixth pins of the drive transformer LAB are connected to the first and third pins of the IGBT GTD, respectively. The third pin of the IGBT GTB and the second pin of the IGBT GTD are connected and connected to the second pin of the transformer T1. The first and second pins of the transformer T1 are connected to the transformer T3. The end of the transformer T3 furthest from the transformer T1 is connected to the control board. The drive transformer LAB boosts and isolates the signal output from the control board and outputs it to the IGBT GTB and IGBT GTD. The output signals of the drive transformers of the IGBT GTB and IGBT GTD alternately control the two transistors, forming a half-bridge topology structure and outputting high-frequency AC. The high-frequency AC is then boosted or stepped down by the transformer T1, which also acts as a primary-secondary isolation transformer. In this embodiment, the transformer T1 is a nanocrystalline transformer.
[0035] Furthermore, capacitors C6 and C5 are connected to the second pin of the IGBT GTB, which are connected in series. Capacitors C1 and C2 are connected in parallel across C6 and C5. The first pin of the transformer T3 is connected between capacitors C6 and C5. Capacitors C1 and C2 are electrolytic capacitors used for filtering the circuit, while capacitors C5 and C6 are DC blocking capacitors that separate the AC and DC currents in the circuit, thereby suppressing transformer magnetization.
[0036] Furthermore, the full-wave rectifier circuit module 300 includes diodes DB601, DB602, DB603, and DB604. One end of diodes DB601 and DB602 is connected to the third pin of transformer T1, and one end of diodes DB603 and DB604 is connected to the fourth pin of transformer T1. The ends of diodes DB601, DB602, DB603, and DB604 away from transformer T1 are connected to inductor L2. The fifth pin of transformer T1 is connected to inductor L3, and one end of inductor L3 is connected to the negative terminal. Capacitors C11, C12, C13, C14, and C15 are connected between inductors L2 and L3. The relay FJH is connected to the positive terminal. After the output of transformer T1, it undergoes full-wave rectification through diodes DB601, DB602, DB603, and DB604. After rectification, it is filtered by inductor L2 and multiple electrolytic capacitors, and finally the output is controlled by relay FJH.
[0037] Furthermore, the system also includes a low-pass filter circuit module 400, which is connected to the power supply board. The low-pass filter circuit module 400 includes a rectifier bridge BG1, a common-mode inductor L1A, a differential-mode inductor L1B, and capacitors C1A, C1B, and C4. The two ends of capacitor C1A are connected to the third and fourth pins of the common-mode inductor L1A, respectively. The first and second pins of the common-mode inductor L1A are connected to the third and fourth pins of the differential-mode inductor L1B, respectively. Capacitor C1B is connected between the common-mode inductor L1A and the differential-mode inductor L1B. The two ends of capacitor C4 are connected to the first and third pins of the rectifier bridge BG1, respectively. The second pin of the rectifier bridge BG1 is connected to the PFC circuit module 100. Low-pass filtering is performed by capacitors C1A, C1B, and C4 with the common-mode inductor L1A and the differential-mode inductor L1B, and finally, the output is rectified by the rectifier bridge BG1.
[0038] The working principle of this invention is as follows: Power is input through the power board. The primary winding employs a high-efficiency half-bridge hard switch based on the NCP1654 PFC chip. The PFC structure reduces the primary current, synchronizing it with the input voltage waveform, improving the power factor, and reducing harmonic content. This effectively solves the electromagnetic interference (EMI) and electromagnetic compatibility (EMC) problems caused by severe current waveform distortion due to capacitive loads. The output signal from the control board is boosted and isolated by the drive transformer LAB before entering the half-bridge topology circuit module 200. Two IGBT transistors alternately control the output signal of the drive transformer LAB, outputting a high-frequency AC signal. This high-frequency AC signal is then boosted or bucked by transformer T1 and isolated between the primary and secondary sides. After passing through the full-wave conditioning circuit module, the output is finally controlled by the relay FJH.
[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this disclosure.
Claims
1. A high-efficiency half-bridge hard-switching charger circuit based on a PFC chip, characterized in that, include: The system includes a control board and a power board. The power board's input terminal is connected to a PFC circuit module, which is connected to the control board. The control board is connected to one end of a drive transformer LAB, and the other end of the drive transformer LAB is connected to a half-bridge topology circuit module. The half-bridge topology circuit module is connected to one end of a transformer T1, and the other end of the transformer T1 is connected to a full-wave rectifier circuit module. The full-wave rectifier circuit module is connected to a relay FJH, which is used to control the charger's output.
2. The high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 1, characterized in that, The PFC circuit module includes a chip JP3, a voltage regulator circuit unit, and a rectifier and filter circuit unit. The chip JP3 is an NCP1654 small board. The eighth pin of the chip JP3 is connected to the voltage regulator circuit unit, and the first, seventh, ninth, eleventh, and fourteenth pins of the chip JP3 are connected to the rectifier and filter circuit unit.
3. The high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 2, characterized in that, The voltage regulator circuit unit includes an input terminal M1, with a capacitor C011 connected in parallel across the two ends of the input terminal M1. One end of the input terminal M1 is connected to the collector of a transistor Q9. The output terminal of the input terminal M1 is connected to the collector of the transistor Q9. A diode VZ101 is positioned between the output terminal of the input terminal M1 and the collector of the transistor Q9. The emitter of the transistor Q9 is connected to the eighth pin of the chip JP3. A resistor R014 is connected between the base and collector of the transistor Q9. A diode D14 is connected between the collector and emitter of the transistor Q9. A capacitor C012 is connected between the base and emitter of the transistor Q9.
4. The high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 3, characterized in that, The rectifier and filter circuit unit includes a MOSFET Q101A and a transistor QB. The gate (G) of the MOSFET Q101A is connected to the emitter and base of the transistor QB, respectively. A resistor R107 is provided between the gate of the MOSFET Q101A and the emitter of the transistor QB. A resistor R105, a diode VZ102, and a resistor R106 are connected in series between the gate of the MOSFET Q101A and the base of the transistor QB. The source (S) of the MOSFET Q101A is connected to the collector of the transistor QB. The drain (D) of the MOSFET Q101A is connected to the second pin of a boost inductor L03. The second pin of the boost inductor L03 is connected to a diode D07. One end of the diode D07 is connected to the first pin of the chip JP3.
5. A high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 4, characterized in that, It also includes sampling resistors Rs2 and Rs3, which are connected in parallel. The two ends of the sampling resistors Rs2 and Rs3 are respectively connected to the first pin and the second pin of the boost inductor L03.
6. The high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 1, characterized in that, The half-bridge topology circuit module includes IGBT GTB and IGBT GTD. The first and second pins of the drive transformer LAB are connected to the control board. The third and fourth pins of the drive transformer LAB are connected to the first and third pins of the IGBT GTB, respectively. The fifth and sixth pins of the drive transformer LAB are connected to the first and third pins of the IGBT GTD, respectively. The third pin of the IGBT GTB and the second pin of the IGBT GTD are connected and connected to the second pin of the transformer T1. The first and second pins of the transformer T1 are connected to the transformer T3. The end of the transformer T3 away from the transformer T1 is connected to the control board.
7. A high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 6, characterized in that, The second pin of the IGBT transistor GTB is connected to capacitors C6 and C5, which are connected in series. Capacitors C1 and C2 are connected in parallel across the two ends of capacitors C6 and C5. The first pin of the transformer T3 is connected between capacitors C6 and C5.
8. A high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 1, characterized in that, The full-wave rectifier circuit module includes diodes DB601, DB602, DB603, and DB604. One end of diodes DB601 and DB602 is connected to the third pin of transformer T1, and one end of diodes DB603 and DB604 is connected to the fourth pin of transformer T1. The ends of diodes DB601, DB602, DB603, and DB604 away from transformer T1 are connected to inductor L2. The fifth pin of transformer T1 is connected to inductor L3, and one end of inductor L3 is connected to the negative terminal. Capacitors C11, C12, C13, C14, and C15 are connected between inductors L2 and L3. The relay FJH is connected to the positive terminal.
9. A high-efficiency half-bridge hard-switching charger circuit based on a PFC chip according to claim 1, characterized in that, It also includes a low-pass filter circuit module, which is connected to the power supply board. The low-pass filter circuit module includes a rectifier bridge BG1, a common-mode inductor L1A, a differential-mode inductor L1B, and capacitors C1A, C1B, and C4. The two ends of capacitor C1A are connected to the third and fourth pins of the common-mode inductor L1A, respectively. The first and second pins of the common-mode inductor L1A are connected to the third and fourth pins of the differential-mode inductor L1B, respectively. Capacitor C1B is connected between the common-mode inductor L1A and the differential-mode inductor L1B. The two ends of capacitor C4 are connected to the first and third pins of rectifier bridge BG1, respectively. The second pin of the rectifier bridge BG1 is connected to the PFC circuit module.