Sine wave generating circuit

Abstract

The embodiment of the utility model discloses a technical scheme, and provides a sine wave generating circuit which generates PWM signals through an amplification function circuit 11 formed by a PWM controller U1 and control function circuits 12 (U2A and U2B), and then converts the PWM signals into smooth sine waves through LC filtering function circuits L1 and C2-C6 to output. The whole circuit controls the amplitude and frequency of the output sine wave by adjusting the duty ratio of the PWM signal, and is suitable for an application scene needing to stabilize the sine wave signal. Compared with a traditional sine wave generating circuit (an amplifying circuit, a positive feedback network, a frequency selecting network, a radiation stabilizing circuit and the like), the sine wave generating circuit provided by the utility model is simpler in circuit structure and lower in price.

Description

Technical Field

[0001] This utility model relates to the field of circuit technology, and in particular to a sine wave generating circuit. Background Technology

[0002] A sine wave generator circuit produces a sine wave output and is the core circuit of various waveform generators and signal sources. Currently, to generate a sine wave, positive feedback is generally added to the amplifier circuit. Therefore, the amplifier circuit and the positive feedback network are the most important parts of the sine wave oscillation circuit. Together with the frequency selection network and the amplitude stabilization circuit, they form the sine wave oscillation circuit. It is evident that the sine wave generator circuits or sine wave oscillation circuits currently used have complex circuit structures and relatively high costs. Utility Model Content

[0003] To address the aforementioned technical problems, an embodiment of this utility model provides a sine wave generating circuit.

[0004] A sine wave generating circuit according to an embodiment of the present invention includes an amplification circuit, a control circuit, and an LC filtering circuit. The amplification circuit generates a first pulse width modulation signal with a 12V duty cycle of 50%, the control circuit generates a second pulse width modulation signal with a 12V duty cycle of 50%, and the second pulse width modulation signal is in the opposite direction to the first pulse width modulation signal. The LC filtering circuit generates a sine wave signal based on the second pulse width modulation signal.

[0005] According to one embodiment of the present invention, the amplification circuit includes a first capacitor, a first resistor, and a gate driver chip. The power supply pin of the gate driver chip is connected to a working power supply signal. The working power supply signal first passes through the first capacitor, then is grounded, and finally enters the power supply pin of the gate driver chip to provide working power to the gate driver chip. The INA pin of the gate driver chip is connected to the first capacitor...

[0006] A third pulse width modulation signal with a 3.3V duty cycle of 50% is connected to a resistor to amplify the third pulse width modulation signal and obtain the first pulse width modulation signal.

[0007] According to one embodiment of the present invention, the control function circuit includes a first MOSFET, a second MOSFET, a second resistor, a third resistor, and a fourth resistor. The control function circuit receives the first pulse width modulation signal through the second resistor, which is a driving resistor used to prevent excessive instantaneous driving current. The third resistor is connected to the first MOSFET to rapidly discharge the parasitic capacitance within the first MOSFET. The fourth resistor is connected to the second MOSFET to rapidly discharge the parasitic capacitance of the second MOSFET. The control function circuit obtains the second pulse width modulation signal by turning the first MOSFET and the second MOSFET on and off using the first pulse width modulation signal.

[0008] According to one embodiment of the present invention, the LC filtering circuit includes an inductor and five capacitors for filtering out high-frequency components of the second pulse width modulation signal to generate a sine wave signal.

[0009] According to one embodiment of the present invention, the sine wave generating circuit further includes two sets of current transformers, which are connected to the LC filter circuit to output the sine wave signal.

[0010] Based on the technical solution provided by the above embodiments of this utility model, its sine wave generating circuit is formed by adding a control function circuit and an LC filter circuit to the amplification function circuit of a 3.3V PWM1 with a duty cycle of 50%. Compared with the traditional sine wave generating circuit (amplifier circuit, positive feedback network, frequency selection network, amplitude stabilization circuit, etc.), the sine wave generating circuit of this utility model has a simpler circuit structure and a lower price.

[0011] The technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0012] The above and other objects, features, and advantages of this utility model will become more apparent from the more detailed description of the embodiments thereof in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this utility model and form part of the specification. They are used together with the embodiments of this utility model to explain the utility model and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same parts or steps.

[0013] Figure 1 This is a schematic diagram of a sine wave generating circuit provided in an exemplary embodiment of the present invention. Detailed Implementation

[0014] Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments of the present invention. It should be understood that the present invention is not limited to the exemplary embodiments described herein.

[0015] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this invention.

[0016] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this utility model are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0017] It should also be understood that in the embodiments of this utility model, "multiple" can refer to two or more, and "at least one" can refer to one, two or more.

[0018] It should also be understood that any component, data or structure mentioned in the embodiments of this utility model can generally be understood as one or more unless explicitly defined or given contrary instructions in the context.

[0019] Furthermore, in this utility model, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, in this utility model, the character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0020] It should also be understood that the description of the various embodiments of this utility model emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0021] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0022] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0023] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0024] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0025] This utility model can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate with a wide range of other general-purpose or special-purpose computing system environments or configurations. Well-known examples of terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments including any of the above systems, etc.

[0026] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0027] To enable those skilled in the art to accurately and clearly understand the technical solution of this utility model, the technical solution of this utility model is described in detail by way of examples.

[0028] Figure 1 This is a schematic diagram of a sine wave generating circuit provided in an exemplary embodiment of this utility model. For example... Figure 1 As shown, a sine wave generating circuit in this embodiment of the present invention comprises three parts: an amplification circuit 11, a control circuit 12, and an LC filtering circuit 13. The amplification circuit 11 generates a first pulse width modulation signal with a 12V duty cycle of 50%, the control circuit 12 generates a second pulse width modulation signal with a 12V duty cycle of 50%, and the second pulse width modulation signal is in the opposite direction to the first pulse width modulation signal. The LC filtering circuit 13 generates a sine wave signal based on the second pulse width modulation signal.

[0029] In some embodiments, such as Figure 1As shown, the amplification circuit 11 may include a first capacitor C1, a first resistor R1, and a gate driver chip U1. The power supply pin VDD (pin 6) of the gate driver chip U1 is connected to a working power supply signal (e.g., 12V). This working power supply signal first passes through the first capacitor C1, then is grounded, and finally enters the power supply pin VDD of the gate driver chip U1, providing working power to the gate driver chip U1. The INA pin (pin 1) of the gate driver chip U1 is connected to a 3.3V third pulse width modulation signal with a 50% duty cycle through the first resistor R1 to amplify the third pulse width modulation signal and obtain a first pulse width modulation signal. It is understood that the function of the INA pin of the gate driver chip U1 is mainly related to signal amplification. Therefore, when it is connected to a 3.3V third pulse width modulation signal with a 50% duty cycle, after amplification, a 12V first pulse width modulation signal with a 50% duty cycle is obtained.

[0030] Furthermore, the OUTA or OUTB pin of the gate driver chip U1 is connected to the control function circuit 12 (e.g., the gate of the MOS transistor) through resistor R2 to send the first pulse width modulation signal to the control function circuit 12.

[0031] Specifically, after the 12V input voltage (operating power supply) enters the amplification circuit 11, the 12V voltage first passes through the first capacitor C1 and then grounds to the VDD pin of the gate driver chip U1, supplying power to the gate driver chip. The first capacitor C1 filters out noise, ensuring the stability and accuracy of the circuit; the first resistor R1 is the driving resistor, preventing excessive instantaneous drive current and providing current limiting and protection; the 3.3V third pulse width modulation signal PWM1 with a 50% duty cycle enters the INA pin of the gate driver chip U1 through the first resistor R1. The gate driver chip U1 has a built-in MOS (MOSFET) output, and the output voltage fluctuates between VDD and GND. In summary, the 3.3V third pulse width modulation signal PWM1 with a 50% duty cycle and the 12V input voltage, after entering U1, generate a 12V first pulse width modulation signal PWM2 with a 50% duty cycle.

[0032] In some embodiments, such as Figure 1 As shown, the control function circuit 12 may include a first MOSFET (such as...). Figure 1 U2B shown), the second MOS transistor (as shown) Figure 1 U2A shown), the second resistor (as shown) Figure 1 R2 shown), the third resistor (as shown) Figure 1 R3 as shown) and the fourth resistor (as shown) Figure 1As shown in R4), the control function circuit receives the first pulse width modulation signal through the second resistor R2, which is a drive resistor used to prevent excessive instantaneous drive current. The third resistor R3 is connected to the first MOSFET U2B to enable the parasitic capacitance in the first MOSFET U2B to discharge quickly. The fourth resistor R4 is connected to the second MOSFET U2A to enable the parasitic capacitance in the second MOSFET U2A to discharge quickly. The control function circuit 12 obtains the second pulse width modulation signal by turning the first MOSFET U2B and the second MOSFET U2A on and off through the first pulse width modulation signal.

[0033] Specifically, in the control function circuit 12, the first pulse width modulation signal PWM2 with a 12V duty cycle of 50% generated by the amplification function of the amplification function circuit 11, along with the 12V input voltage, controls the turn-on and turn-off of the second MOSFET U2A and the first MOSFET U2B. For example, when the input first pulse width modulation signal PWM2 is high, the second MOSFET U2A has VG=12V and VS=0V, and is turned on; the first MOSFET U2B has VG=12V and VS=12V, and is turned off. When the input first pulse width modulation signal PWM2 is low, the second MOSFET U2A has VG=0V and VS=0V, and is turned off; the first MOSFET U2B has VG=0V and VS=12V, and is turned on. The second resistor R2 is a drive resistor, preventing excessive instantaneous drive current and serving as a current limiter and protection. The third resistor R3 rapidly discharges the CGS parasitic capacitance within the first MOSFET U2B, achieving rapid turn-off of the first MOSFET U2B. The fourth resistor R4 rapidly discharges the CGS parasitic capacitance within the second MOSFET U2A, achieving rapid turn-off of the first MOSFET U2B. The switching on and off of the second MOSFET U2A and the first MOSFET U2B generates a 12V second pulse width modulation signal PWM3 with a 50% duty cycle, which is opposite in direction to the input first pulse width modulation signal PWM2.

[0034] In some embodiments, such as Figure 1 As shown, the LC filter circuit 13 may include an inductor L1 and five capacitors (C2, C3, C4, C5, and C6 as shown in the figure) to filter out high-frequency components of the second pulse width modulation signal PWM3 to generate a sine wave signal. The inductor L1 and the filter capacitors C2, C3, C4, C5, and C6 form an LC filter (LC filter circuit 13), which filters out the high-frequency components of the second pulse width modulation signal PWM3, retaining only the low-frequency components, smoothing the second pulse width modulation signal PWM3, and generating a sine wave output.

[0035] For example, when the 12V second pulse width modulation signal PWM3 with a duty cycle of 50% generated by the aforementioned control function circuit is filtered by the LC filter function circuit 13 (an LC filter formed by C2, C3, C4, C5, C6, and L1), it becomes a sine wave. The basic principle of the LC filter function circuit 13 is based on the impedance characteristics of inductors and capacitors. Inductors have lower impedance to low-frequency signals and higher impedance to high-frequency signals; capacitors have lower impedance to high-frequency signals and higher impedance to low-frequency signals. The Fourier series expansion corresponding to a square wave signal consists of many sine waves of different frequencies. When inductors and capacitors form a circuit, by adjusting the values ​​of the inductance and capacitance, signals of a specific frequency can be allowed to pass through while signals of other frequencies are blocked, thereby achieving the filtering function and obtaining a sine wave of the desired frequency.

[0036] Assuming the square wave has a period of T, a frequency of f, and a corresponding angular frequency of w = 2πf = 2π / T, and an amplitude of ±A, the Fourier series expansion of the square wave is:

[0037]

[0038] A simple design method for the LC filter circuit 13: Determine the filter type as LC low-pass filter by the frequency of the square wave and the frequency of the required sine wave; calculate the cutoff frequency of the LC low-pass filter by adjusting the values ​​of the inductor and capacitor.

[0039] The cutoff frequency of the LC low-pass filter is:

[0040]

[0041] The Fourier series expansion corresponding to a square wave signal consists of many sine waves of different frequencies. LC low-pass filtering passes low frequencies and blocks high frequencies, preventing signals with frequencies higher than the cutoff frequency from passing through. When the frequency of a sine wave is higher than the cutoff frequency, it is filtered out by LC low-pass filtering.

[0042] In other embodiments, the sine wave generating circuit further includes two sets of current transformers connected to an LC filter circuit to output a sine wave signal. For example... Figure 1 As shown, CT1+ and CT1-, CT2+ and CT2-, sinusoidal voltages are output to the load through CT1+ and CT1-, CT2+ and CT2-.

[0043] In summary, the sine wave generating circuit of this embodiment generates a PWM signal through a PWM controller (amplification circuit 11 formed by U1) and control circuits 12 (U2A and U2B), and then converts the PWM signal into a smooth sine wave output through an LC filtering circuit 13 (L1 and C2-C6). The entire circuit controls the amplitude and frequency of the output sine wave by adjusting the duty cycle of the PWM signal, making it suitable for applications requiring a stable sine wave signal.

[0044] Based on the technical solution provided by the above embodiments of this utility model, its sine wave generating circuit is formed by adding a control function circuit and an LC filter circuit to the amplification function circuit of a 3.3V PWM1 with a duty cycle of 50%. Compared with the traditional sine wave generating circuit (amplifier circuit, positive feedback network, frequency selection network, amplitude stabilization circuit, etc.), the sine wave generating circuit of this utility model has a simpler circuit structure and a lower price.

[0045] The basic principles of this utility model have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this utility model are merely examples and not limitations, and should not be considered as essential features of each embodiment of this utility model. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the utility model from being implemented using the aforementioned specific details.

[0046] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0047] The block diagrams of the devices, apparatuses, equipment, and systems involved in this utility model are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0048] The methods and apparatus of this invention may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of this invention are not limited to the order specifically described above, unless otherwise specifically stated. Furthermore, in some embodiments, this invention may also be implemented as a program recorded on a recording medium, the program including machine-readable instructions for implementing the methods according to this invention. Thus, this invention also covers recording media storing programs for executing the methods according to this invention.

[0049] It should also be noted that in the apparatus, equipment, and method of this utility model, each component or step can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this utility model.

[0050] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the present invention. Therefore, the present invention is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0051] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the present invention to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A sine wave generating circuit, characterized in that, The sine wave generating circuit includes an amplification circuit, a control circuit, and an LC filter circuit. The amplification circuit generates a first pulse width modulation signal with a 12V duty cycle of 50%. The control circuit generates a second pulse width modulation signal with a 12V duty cycle of 50%, and the second pulse width modulation signal is in the opposite direction to the first pulse width modulation signal. The LC filter circuit generates a sine wave signal based on the second pulse width modulation signal.

2. The sine wave generating circuit according to claim 1, characterized in that, The amplification circuit includes a first capacitor, a first resistor, and a gate driver chip. The power supply pin of the gate driver chip is connected to a working power supply signal. The working power supply signal first passes through the first capacitor, then is grounded, and then enters the power supply pin of the gate driver chip to provide working power to the gate driver chip. The INA pin of the gate driver chip is connected to a 3.3V third pulse width modulation signal with a duty cycle of 50% through the first resistor to amplify the third pulse width modulation signal to obtain the first pulse width modulation signal.

3. A sine wave generating circuit according to claim 1, characterized in that, The control function circuit includes a first MOSFET, a second MOSFET, a second resistor, a third resistor, and a fourth resistor. The control function circuit receives the first pulse width modulation signal through the second resistor, which is a drive resistor used to prevent excessive instantaneous drive current. The third resistor is connected to the first MOSFET to rapidly discharge the parasitic capacitance within the first MOSFET. The fourth resistor is connected to the second MOSFET to rapidly discharge the parasitic capacitance of the second MOSFET. The control function circuit obtains the second pulse width modulation signal by turning the first MOSFET and the second MOSFET on and off using the first pulse width modulation signal.

4. A sine wave generating circuit according to claim 1, characterized in that, The LC filtering circuit includes an inductor and five capacitors, used to filter out high-frequency components from the second pulse width modulation signal to generate a sine wave signal.

5. A sine wave generating circuit according to claim 1, characterized in that, The sine wave generating circuit also includes two sets of current transformers, which are connected to the LC filter circuit to output the sine wave signal.

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