Low-cost Ethernet powered device circuit

Abstract

The utility model discloses a low-cost Ethernet power receiving equipment circuit, which comprises a controller, one or more PD analog electronic terminal circuits and a communication circuit, and is characterized in that each PD analog electronic terminal circuit is respectively connected with the controller; each PD analog electronic terminal circuit is also connected with a PSE (Power Supply Equipment) through a network interface so as to simulate a PD (Power Device) of an IEEE802.3 bt protocol under the control of the controller; the communication circuit is connected with the controller, and the communication circuit is also used for being in communication connection with a test monitoring terminal so as to send the working state of the PD analog electronic terminal circuit to the test monitoring terminal. Therefore, under the control of the controller, the plurality of PD analog electronic terminal circuits can be used for testing the plurality of PSE power supply devices. The overall test cost is reduced and the test efficiency is improved.

Description

Technical Field

[0001] This utility model relates to the field of Ethernet powered devices technology, and in particular to a low-cost Ethernet powered device circuit. Background Technology

[0002] The current IEEE 802.3BT protocol, in Power over Ethernet (PoE), is a networking protocol that upgrades the IEEE 802.3af and 802.3at standards. The IEEE 802.3bt standard allows designers to provide higher power to powered devices and more versatile energy options. IEEE 802.3bt (PoE++): The 802.3bt specification introduces four new high-power powered device (PD) classes, bringing the total number of single-feature categories to nine. Classes 5-8 are new to the PoE standard and translate to PD power levels from 40.0W to 71W. This provides a wider range and more application scenarios for subsequent network power supply. Electronic loads play a crucial role in the testing and debugging of production equipment in real-world factories, and their power consumption is a significant factor in product testing.

[0003] Existing test electronic loads typically use a single load, allowing testing of only one PSE (Power Sourcing Equipment) device at a time. When testing multiple PSE devices, multiple electronic loads are required, each for separate testing. This leads to high testing costs and low efficiency. Utility Model Content

[0004] This invention aims to at least partially solve one of the technical problems in the related art. Therefore, one objective of this invention is to provide a low-cost Ethernet powered device circuit.

[0005] To achieve the above objectives, a low-cost Ethernet powered device circuit according to an embodiment of the present invention includes:

[0006] Controller;

[0007] The PD analog electronic terminal circuit includes one or more PD analog electronic terminal circuits, each of which is connected to the controller and also connected to the PSE power supply device through a network interface, so as to simulate the PD of the IEEE 802.3bt protocol under the control of the controller.

[0008] A communication circuit is provided, which is connected to the controller. The communication circuit is also used to communicate with a test monitoring terminal to send the operating status of the PD analog electronic terminal circuit to the test monitoring terminal.

[0009] Furthermore, according to one embodiment of the present invention, the PD analog electronic terminal circuit includes:

[0010] A PD power interface controller circuit, wherein the PD power interface controller circuit is used to input the power control output of the PSE power supply device;

[0011] An analog-to-digital converter circuit is communicatively connected to the controller to convert the control signal output by the controller into a corresponding analog signal.

[0012] An adjustable analog load circuit is provided, which is connected to the power output terminal of the PD power interface controller circuit and the analog signal output terminal of the analog-to-digital conversion circuit, respectively, so as to adjust and control the load power under the action of the analog signal.

[0013] Furthermore, according to one embodiment of the present invention, the adjustable analog load circuit includes:

[0014] The comparator has its first non-inverting input terminal connected to the analog signal output terminal via a first resistor R566;

[0015] The first electronic switch, the first output terminal of the comparator is connected to the controlled terminal of the first electronic switch, one channel terminal of the first electronic switch is connected to the power output terminal of the PD power interface controller circuit, and the first inverting input terminal of the comparator is connected to the other channel terminal of the first electronic switch through the second resistor R563.

[0016] A load resistor, one end of which is connected to the other channel terminal of the first electronic switch, and the other end of which is connected to a reference ground.

[0017] Furthermore, according to one embodiment of the present invention, one end of the load resistor is also connected to the first analog-to-digital sampling terminal ADC0 of the analog-to-digital conversion circuit, and the controller obtains the current information of the load resistor through the analog-to-digital conversion circuit;

[0018] The second non-inverting input terminal of the comparator is connected to the power output voltage divider signal terminal ADC1_L of the PD power interface controller circuit, the second inverting input terminal of the comparator is connected to the output terminal of the comparator, and the output terminal of the comparator is also connected to the second analog-to-digital sampling terminal ADC1 of the analog-to-digital conversion circuit. The controller obtains the voltage information of the power supply POE_V54_R of the load resistor through the analog-to-digital conversion circuit.

[0019] Furthermore, according to one embodiment of the present invention, the PD analog electronic terminal circuit further includes:

[0020] A signal isolation circuit is provided, through which the controller is connected to the analog-to-digital conversion circuit; wherein, the signal isolation circuit includes an isolator SU8, one side of the isolator SU8 is connected to the controller signal, and the other side of the isolator SU8 is connected to the analog-to-digital conversion circuit signal.

[0021] Furthermore, according to one embodiment of the present invention, the PD power interface controller circuit includes:

[0022] A second electronic switch, one channel of which is connected to the power output terminal introduced by the PSE power supply device;

[0023] A PD power interface management chip, wherein the control terminal of the PD power interface management chip is connected to the controlled terminal of the second electronic switch, so as to output the power control introduced by the PSE power device from another channel terminal of the second electronic switch.

[0024] Furthermore, according to one embodiment of the present invention, the PD analog electronic terminal circuit further includes: a power input switch circuit, which is connected to the controller and the channel terminal of the second electronic switch respectively, to control the output of the power supplied by the PSE power supply device; wherein, the power input switch circuit includes:

[0025] Transistor Q91, the base of transistor Q91 is connected to a control terminal of the controller through a third resistor R588, and the emitter of transistor Q91 is connected to reference ground;

[0026] The first channel switch has its controlled terminal connected to the collector of the transistor Q91, its first channel input terminal connected to the positive terminal of the power supply introduced by the PSE power supply device, and its second channel input terminal connected to the negative terminal of the power supply introduced by the PSE power supply device, so as to control the output of the power supply introduced by the PSE power supply device under the control of the controller.

[0027] Furthermore, according to one embodiment of the present invention, the PD analog electronic terminal circuit further includes: a power level control switch circuit, the power level control switch circuit comprising:

[0028] A power level setting resistor is provided, and each power level setting resistor has a different resistance value;

[0029] The system includes multiple channel switch control circuits, each connected to the control terminal of the controller. Each channel switch control circuit is also connected to the power level setting terminal of the PD power interface management chip via a power level setting resistor, so as to set the power level of the PD power interface management chip under the control of the controller.

[0030] Furthermore, according to one embodiment of the present invention, the PD analog electronic terminal circuit further includes:

[0031] A linear optocoupler circuit is provided, wherein the signal indication terminal of the PD power interface management chip is connected to the controller through the linear optocoupler circuit; wherein the linear optocoupler circuit includes an optocoupler Y9, the light-emitting diode terminal of the optocoupler Y9 is connected to the signal indication terminal of the PD power interface management chip, and the phototransistor terminal of the optocoupler Y9 is connected to a detection terminal of the controller.

[0032] Furthermore, according to one embodiment of the present invention, the PD analog electronic terminal circuit further includes:

[0033] A network interface for connecting to the PSE power supply equipment;

[0034] A transformer circuit is connected to the network interface to transform and rectify the power signal introduced by the network interface and output it to the channel terminal of the second electronic switch.

[0035] The low-cost Ethernet powered device circuit provided in this embodiment includes one or more PD (Power Distribution Device) analog electronic terminal circuits. Each PD analog electronic terminal circuit is connected to the controller and also connected to the PSE (Power Receiver Equipment) via a network interface to simulate the IEEE 802.3bt protocol powered device PD under the control of the controller. A communication circuit is connected to the controller and is also used to communicate with a test monitoring terminal to send the operating status of the PD analog electronic terminal circuits to the test monitoring terminal. Thus, under the control of the controller, multiple PD analog electronic terminal circuits can be used to test multiple PSE power devices, reducing overall testing costs and improving testing efficiency. Attached Figure Description

[0036] Figure 1 A structural block diagram of the low-cost Ethernet powered device circuit provided by this utility model;

[0037] Figure 2 A schematic diagram of the controller circuit structure provided by this utility model;

[0038] Figure 3 A schematic diagram of the signal isolation circuit structure provided by this utility model;

[0039] Figure 4 This is a schematic diagram of the digital-to-analog converter circuit structure provided by this utility model;

[0040] Figure 5 A schematic diagram of the adjustable analog load circuit structure provided by this utility model;

[0041] Figure 6 A schematic diagram of the circuit structure of the power access switch and PD power interface controller provided by this utility model.

[0042] Figure 7 A schematic diagram of the power level control switch circuit provided by this utility model;

[0043] Figure 8 A schematic diagram of the linear optocoupler circuit structure provided by this utility model;

[0044] Figure 9 A schematic diagram of the RJ45 network interface circuit structure provided by this utility model;

[0045] Figure 10 A schematic diagram of the transformer circuit structure provided by this utility model.

[0046] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0047] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present invention.

[0048] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the present invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0049] See Figure 1This utility model provides a low-cost Ethernet powered device circuit, including: a controller, a PD analog electronic terminal circuit, and a communication circuit. The PD analog electronic terminal circuit includes one or more circuits, each of which is connected to the controller. Each PD analog electronic terminal circuit is also connected to a PSE power supply device through a network interface to simulate a powered device PD using the IEEE 802.3bt protocol under the control of the controller. The communication circuit is connected to the controller and is also used to communicate with a test and monitoring terminal to send the operating status of the PD analog electronic terminal circuit to the test and monitoring terminal.

[0050] Specifically, such as Figure 1 As shown, one or more PD (Power Device) analog electronic terminal circuits can simulate one or more powered devices (PDs). The IEEE 802.3bt standard protocol states that "PD powered devices are the power-consuming or power-requesting devices that participate in the PD detection algorithm. Devices that can become PDs may have the ability to draw power from backup power sources." The low-cost Ethernet powered device circuit provided in this embodiment can form an electronic load and simulate powered devices (PDs), such as IP phones, wireless access points, and security cameras, to detect the power transmission status of the power supply equipment. Therefore, it can be applied in PSE (Power Separator) equipment production testing and in actual system testing. The PD analog electronic terminal circuit can be connected to the PSE power supply device under test via a network interface. In this way, network power data can be introduced into the PD analog electronic terminal circuit through the network interface and converted into power supply to power the PD analog electronic terminal circuit. The operating state of the PD analog electronic terminal circuit is controlled by a controller to simulate powered devices (PDs) of different power levels to achieve power supply to the PSE under test. The device is tested. Simultaneously, the controller monitors the operating status of the PD analog electronic terminal circuit in real time and communicates with the test monitoring terminal via a communication circuit. This allows the operating status of the PD analog electronic terminal circuit to be sent to the test monitoring terminal, enabling real-time monitoring of its operation. Furthermore, the controller receives setting signals from the test monitoring terminal via the communication circuit and controls the operating status of the PD analog electronic terminal circuit accordingly. This allows for testing of various operating states of the PSE power supply device under test, effectively identifying and intercepting power supply problems in different operating states. In one embodiment of this invention, up to 12 PD analog electronic terminal circuits can be provided, enabling efficient testing of multiple PSE power supplies, reducing overall test equipment costs, and improving test efficiency.

[0051] See Figure 1 , Figure 2 , Figure 4 and Figure 5 The PD analog electronic terminal circuit includes: a PD power interface controller circuit, an analog-to-digital converter circuit, and an adjustable analog load circuit. The PD power interface controller circuit is used to output the power control introduced by the PSE power supply device. The analog-to-digital converter circuit is communicatively connected to the controller to convert the control signal output by the controller into a corresponding analog signal. The adjustable analog load circuit is connected to the power output terminal of the PD power interface controller circuit and the analog signal output terminal of the analog-to-digital converter circuit, respectively, to adjust and control the load power under the action of the analog signal.

[0052] Specifically, to simulate powered devices of different power ratings, the controller can convert digital signals into corresponding analog signals via an analog-to-digital converter circuit, thereby controlling the power of the adjustable analog load circuit. Since the PD power interface controller circuit controls the power supply output of the PSE power supply device under test to power the adjustable analog load circuit, this allows for testing of the operating status of the PSE power supply device under test when connected to loads of different power ratings, even when the adjustable analog load circuit is in different power states.

[0053] See Figure 4 and Figure 5 The adjustable analog load circuit includes a comparator, a first electronic switch, and a load resistor. The first non-inverting input terminal of the comparator is connected to the analog signal output terminal through a first resistor R566. The first output terminal of the comparator is connected to the controlled terminal of the first electronic switch. One channel terminal of the first electronic switch is connected to the power output terminal of the PD power interface controller circuit. The first inverting input terminal of the comparator is connected to the other channel terminal of the first electronic switch through a second resistor R563. One end of the load resistor is connected to the other channel terminal of the first electronic switch, and the other end of the load resistor is connected to a reference ground.

[0054] Specifically, such as Figure 5 As shown, the adjustable analog load circuit can simulate powered devices (PDs) of different power levels. Figure 5 As shown, the adjustable analog load circuit is controlled by the DAC analog signal output from the analog-to-digital converter circuit. This DAC analog signal, in turn, controls the output of the analog-to-digital converter circuit via a controller. For example... Figure 4As shown, the analog-to-digital conversion circuit may include a digital-to-analog (DAC) converter U88. The DAC U88 communicates with the controller via a communication interface, thereby receiving the DAC signal output by the controller. It outputs the corresponding analog signal to the first inverting input of the comparator U89 via the DAC signal terminal. After passing through the signal at the first inverting input of the comparator U89, a control signal is output from the first output of the comparator U89 to the controlled terminal of the first electronic switch, thereby controlling the conduction of the first electronic switch. Figure 5 As shown, the electronic switch may include two MOSFETs Q86 and Q87 connected in parallel. When the gate voltage of MOSFETs Q86 and Q87 is higher than the source voltage, MOSFETs Q86 and Q87 are turned on. Resistors R564 and R565 connected in series constitute the electronic load. When MOSFETs Q86 and Q87 are turned on, the electronic load will generate a certain amount of power consumption, thus simulating the power consumption of the powered device (PD). The power consumption can be controlled according to the on-time of the first electronic switch; the longer the on-time of the first electronic switch within a time period, the greater the power consumption.

[0055] See Figure 2 and Figure 5 One end of the load resistor is also connected to the first analog-to-digital sampling terminal ADC0 of the analog-to-digital conversion circuit, and the controller obtains the current information of the load resistor through the analog-to-digital conversion circuit; the second non-inverting input terminal of the comparator is connected to the power output voltage divider signal terminal ADC1_L of the PD power interface controller circuit, the second inverting input terminal of the comparator is connected to the output terminal of the comparator, and the output terminal of the comparator is also connected to the second analog-to-digital sampling terminal ADC1 of the analog-to-digital conversion circuit, and the controller obtains the voltage information of the power supply POE_V54_R of the load resistor through the analog-to-digital conversion circuit.

[0056] Specifically, in order to detect the operating status of the load resistor in real time, it is necessary to detect the supply voltage and current of the load resistor in real time. The analog-to-digital converter circuit can detect the current of the load resistor in real time through the ADC0 signal terminal.

[0057] In addition, such as Figure 5As shown, resistors R577 and R578 form a voltage divider circuit to divide the voltage of the power supply POE_V54_R, and then output the voltage to the second non-inverting input terminal of the comparator via the ADC1_L signal. The comparator U89 also forms a voltage follower, which transmits the divided voltage signal of the power supply POE_V54_R to the analog-to-digital converter circuit via the ADC1 signal terminal. In this way, the controller can read the current and voltage information of the load resistor, thereby achieving real-time monitoring of the load power.

[0058] See Figures 2 to 4 The PD analog electronic terminal circuit further includes a signal isolation circuit, through which the controller is connected to the analog-to-digital conversion circuit. The signal isolation circuit includes an isolator SU8, one side of which is connected to the controller signal, and the other side of which is connected to the analog-to-digital conversion circuit signal. The isolator SU8 provides signal isolation and buffering between the controller and the analog-to-digital conversion circuit, ensuring effective signal transmission at the interface between them and preventing data loss.

[0059] See Figure 6 The PD power interface controller circuit includes: a second electronic switch and a PD power interface management chip. One channel terminal of the second electronic switch is connected to the power output terminal introduced by the PSE power supply device; the control terminal of the PD power interface management chip is connected to the controlled terminal of the second electronic switch to output the power control introduced by the PSE power supply device from the other channel terminal of the second electronic switch. Figure 6 As shown, the PD power interface management chip can implement the relevant protocols of the IEEE 802.3bt protocol on the powered device side, and control the conduction or cutoff of the second electronic switch according to the relevant protocols of the IEEE 802.3bt protocol on the powered device side, thereby controlling the output of the power introduced by the PSE power device. The second electronic switch may include a MOS transistor Q69. The gate of the MOS transistor Q69 is connected to the gate control terminal of the PD power interface management chip U91. Thus, the MOS transistor Q69 can be turned on under the control of the PD power interface management chip U91, thereby controlling the output of the power introduced by the PSE power device.

[0060] See Figure 2 and Figure 6The PD analog electronic terminal circuit further includes a power access switch circuit, which is connected to the controller and the first channel terminal of the second electronic switch to control the output of the power supplied by the PSE power supply device; wherein, the power access switch circuit includes a transistor Q91 and a first channel switch, the base of the transistor Q91 is connected to a control terminal of the controller through a third resistor R588, and the emitter of the transistor Q91 is connected to a reference ground;

[0061] The controlled terminal of the first channel switch is connected to the collector of the transistor Q91, the first channel input terminal of the first channel switch is connected to the positive terminal of the power supply introduced by the PSE power supply device, and the second channel input terminal of the first channel switch is connected to the negative terminal of the power supply introduced by the PSE power supply device, so as to control the output of the power supply introduced by the PSE power supply device under the control of the controller.

[0062] Specifically, such as Figure 6 As shown, the power supply input to the PSE power supply device can be controlled via this power supply connection switch circuit. In this way, the controller can control the output of the power supply input to the PSE power supply device according to the test conditions. For example, when the test ends, the power output circuit can be disconnected via the power supply connection switch circuit to save energy. The circuit works as follows: when the controller outputs a high-level signal through the PD_ON signal terminal, transistor Q91 is turned on, which in turn controls the two channels of the first channel switch to conduct, thus controlling the positive and negative terminals of the power supply input to the PSE power supply device to conduct, and controlling the power supply output. Conversely, when it is necessary to control the power supply output to be disconnected, the controller can output a non-high-level signal. At this time, transistor Q91 is turned off. The two channels of the first channel switch are also disconnected, so the power supply input to the PSE power supply device no longer supplies power to the load resistor.

[0063] See Figure 2 , Figure 6 and Figure 7 The PD analog electronic terminal circuit further includes a power level control switch circuit, which includes a power level setting resistor and a channel switch control circuit. Multiple power level setting resistors are provided, each with a different resistance value. Multiple channel switch control circuits are also provided, each connected to the control terminal of the controller. Each channel switch control circuit is also connected to the power level setting terminal of the PD power interface management chip via a power level setting resistor, so as to set the power level of the PD power interface management chip under the control of the controller.

[0064] like Figure 7As shown, the power level setting resistors include resistors R598, R601, R610, R613, and R616, each with a different resistance value. Correspondingly, multiple channel switch control circuits are also provided. Each power level setting resistor is connected to the power level setting terminal of the PD power interface management chip via the channel switch control circuit. Thus, under the control of the controller, power level setting resistors with different resistance values ​​can be connected in parallel to the power level setting terminal CLSB of the PD power interface management chip U91. This allows for power setting of five different power levels of powered devices (CLASS4 to 8). Each channel switch control circuit may include a transistor (Q92 to Q96) and a second channel switch (U92 to U96). The controller can select different power level setting resistors to be connected in parallel to the power level setting terminal of the PD power interface management chip U91 via the CLS_2 to CLS_5 signal terminals. When one of the signals at the CLS_2 to CLS_5 terminals is high, the corresponding transistor will conduct, thus turning on the corresponding second-channel switch. This connects the corresponding transistor to the power level setting terminal of the PD power interface management chip U91 between it and the reference ground, enabling different power level settings. This allows for more precise settings when simulating devices with different power levels, making testing more convenient.

[0065] See Figure 2 , Figure 6 and Figure 8 The PD analog electronic terminal circuit further includes: a linear optocoupler circuit, wherein the signal indication terminal of the PD power interface management chip is connected to the controller through the linear optocoupler circuit; wherein the linear optocoupler circuit includes an optocoupler Y9, the light-emitting diode terminal of the optocoupler Y9 is connected to the signal indication terminal of the PD power interface management chip, and the phototransistor terminal of the optocoupler Y9 is connected to a detection terminal of the controller. Figure 6 and Figure 8 As shown, the operating status signal of the PD power interface management chip U91 can be isolated and output to the controller via the optocoupler Y9. In this way, the controller can obtain the operating status information of the PD power interface management chip U91 and transmit this status information to the test monitoring terminal via the communication circuit. Thus, the test status can be monitored through the test monitoring terminal.

[0066] See Figure 9 and Figure 10The PD analog electronic terminal circuit further includes: a network interface and a transformer circuit. The network interface is used to connect to the PSE power supply device; the transformer circuit is connected to the network interface to transform and rectify the power signal introduced by the network interface and output it to the channel terminal of the second electronic switch. Figure 9 As shown, the network interface can be an RJ45 interface. Multiple RJ45 interfaces can be used as needed for testing. This allows connection of the PSE power supply equipment via a network cable. Figure 10 As shown, the transformer circuit may include multiple transformers and rectifiers. Each transformer is connected to a network interface, so that the power / data signals introduced from the network interface can be transformed and input to the rectifier. After rectification by the rectifier, a DC power supply can be output to power the load resistor and each circuit module.

[0067] The above are merely embodiments of this utility model, but do not limit the patent scope of this utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing specific embodiments, or make equivalent substitutions for some of the technical features. Any equivalent structures made using the content of this utility model specification and drawings, directly or indirectly applied to other related technical fields, are similarly within the patent protection scope of this utility model.

[0068] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0069] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention without departing from the principles and spirit of the present invention, and all such changes and variations are within the protection scope of the present invention.

Claims

1. A low-cost Ethernet powered device circuit, characterized in that, include: Controller; The PD analog electronic terminal circuit includes one or more PD analog electronic terminal circuits, each of which is connected to the controller and also connected to the PSE power supply device through a network interface, so as to simulate the PD of the IEEE 802.3bt protocol under the control of the controller. A communication circuit is provided, which is connected to the controller. The communication circuit is also used to communicate with a test monitoring terminal to send the operating status of the PD analog electronic terminal circuit to the test monitoring terminal.

2. The low-cost Ethernet powered device circuit according to claim 1, characterized in that, The PD analog electronic terminal circuit includes: A PD power interface controller circuit, wherein the PD power interface controller circuit is used to input the power control output of the PSE power supply device; An analog-to-digital converter circuit is communicatively connected to the controller to convert the control signal output by the controller into a corresponding analog signal. An adjustable analog load circuit is provided, which is connected to the power output terminal of the PD power interface controller circuit and the analog signal output terminal of the analog-to-digital conversion circuit, respectively, so as to adjust and control the load power under the action of the analog signal.

3. The low-cost Ethernet powered device circuit according to claim 2, characterized in that, The adjustable analog load circuit includes: The comparator has its first non-inverting input terminal connected to the analog signal output terminal via a first resistor (R566). The first electronic switch, the first output terminal of the comparator is connected to the controlled terminal of the first electronic switch, one channel terminal of the first electronic switch is connected to the power output terminal of the PD power interface controller circuit, and the first inverting input terminal of the comparator is connected to the other channel terminal of the first electronic switch through the second resistor (R563). A load resistor, one end of which is connected to the other channel terminal of the first electronic switch, and the other end of which is connected to a reference ground.

4. The low-cost Ethernet powered device circuit according to claim 3, characterized in that, One end of the load resistor is also connected to the first analog-to-digital sampling terminal ADC0 of the analog-to-digital conversion circuit, and the controller obtains the current information of the load resistor through the analog-to-digital conversion circuit. The second non-inverting input terminal of the comparator is connected to the power output voltage divider signal terminal ADC1_L of the PD power interface controller circuit, the second inverting input terminal of the comparator is connected to the output terminal of the comparator, and the output terminal of the comparator is also connected to the second analog-to-digital sampling terminal ADC1 of the analog-to-digital conversion circuit. The controller obtains the voltage information of the power supply POE_V54_R of the load resistor through the analog-to-digital conversion circuit.

5. The low-cost Ethernet powered device circuit according to any one of claims 2 to 4, characterized in that, The PD analog electronic terminal circuit also includes: A signal isolation circuit is provided, through which the controller is connected to the analog-to-digital conversion circuit; wherein the signal isolation circuit includes an isolator (SU8), one side of the isolator (SU8) is connected to the controller signal, and the other side of the isolator (SU8) is connected to the analog-to-digital conversion circuit signal.

6. The low-cost Ethernet powered device circuit according to claim 5, characterized in that, The PD power interface controller circuit includes: A second electronic switch, one channel of which is connected to the power output terminal introduced by the PSE power supply device; A PD power interface management chip, wherein the control terminal of the PD power interface management chip is connected to the controlled terminal of the second electronic switch, so as to output the power control introduced by the PSE power device from another channel terminal of the second electronic switch.

7. The low-cost Ethernet powered device circuit according to claim 6, characterized in that, The PD analog electronic terminal circuit further includes: a power input switch circuit, which is connected to one channel terminal of the controller and the second electronic switch respectively, to control the output of the power supplied by the PSE power supply device; wherein, the power input switch circuit includes: A transistor (Q91) is used, the base of which is connected to a control terminal of the controller through a third resistor (R588), and the emitter of which is connected to a reference ground. A first channel switch, the controlled terminal of the first channel switch is connected to the collector of the transistor (Q91), the first channel input terminal of the first channel switch is connected to the positive terminal of the power supply introduced by the PSE power supply device, and the second channel input terminal of the first channel switch is connected to the negative terminal of the power supply introduced by the PSE power supply device, so as to control the output of the power supply introduced by the PSE power supply device under the control of the controller.

8. The low-cost Ethernet powered device circuit according to claim 7, characterized in that, The PD analog electronic terminal circuit further includes: a power level control switch circuit, the power level control switch circuit comprising: A power level setting resistor is provided, and each power level setting resistor has a different resistance value; The system includes multiple channel switch control circuits, each connected to the control terminal of the controller. Each channel switch control circuit is also connected to the power level setting terminal of the PD power interface management chip via a power level setting resistor, so as to set the power level of the PD power interface management chip under the control of the controller.

9. The low-cost Ethernet powered device circuit according to claim 6, characterized in that, The PD analog electronic terminal circuit also includes: A linear optocoupler circuit is provided, wherein the signal indication terminal of the PD power interface management chip is connected to the controller through the linear optocoupler circuit; wherein the linear optocoupler circuit includes an optocoupler (Y9), the light-emitting diode terminal of the optocoupler (Y9) is connected to the signal indication terminal of the PD power interface management chip, and the phototransistor terminal of the optocoupler (Y9) is connected to a detection terminal of the controller.

10. The low-cost Ethernet powered device circuit according to claim 6, characterized in that, The PD analog electronic terminal circuit also includes: A network interface for connecting to the PSE power supply equipment; A transformer circuit is connected to the network interface to transform and rectify the power signal introduced by the network interface and output it to the channel terminal of the second electronic switch.

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