Computing circuit and device

Abstract

The utility model provides a calculation circuit and equipment. The circuit comprises a first chip, a second chip, an instruction acquisition module and a loudspeaker, a calculation program and a first voice program are stored in the first chip, and a second voice program is stored in the second chip; the instruction acquisition module is used for acquiring a voice selection instruction input by a target object; the first chip is used for executing the calculation program and executing the first voice program when the voice selection instruction represents that the first voice program is selected; and the second chip is used for executing the second voice program when the voice selection instruction represents that the second voice program is selected. Based on the calculation circuit, the calculation function is realized, and meanwhile, various types of voice functions can be provided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, in particular to a computing circuit and device. BACKGROUND

[0002] With the continuous progress of science and technology, computing devices have become an indispensable tool in our daily life. These devices not only play an important role in business, education and scientific research, but also play an increasingly key role in personal life. Traditional computing devices mainly rely on keyboard and screen for human-computer interaction, but this kind of interaction may not be intuitive or convenient in some cases, especially for users who need to input quickly or have limited vision.

[0003] In related technologies, the development of speech recognition and speech synthesis technology provides new interaction possibilities for computing devices. Through voice commands, users can communicate with devices more naturally, and voice feedback can provide users with more rich and intuitive information.

[0004] However, there are still some limitations in the application of voice functions of existing computing devices. For example, many devices can only provide a single type of voice output, and cannot be adjusted according to the specific needs or preferences of users, resulting in poor user experience. CONTENT OF THE INVENTION

[0005] Therefore, the present application provides a computing circuit and device, which can provide multiple types of voice selection for users while realizing computing functions, thereby improving user experience.

[0006] In one aspect, the present application provides a computing circuit, comprising: a first chip, a second chip, an instruction acquisition module, and a loudspeaker.

[0007] The first chip is connected with the second chip, the loudspeaker, an external power supply, and the instruction acquisition module, and the second chip is connected with the loudspeaker and the external power supply.

[0008] The first chip stores a computing program and a first voice program, and the second chip stores a second voice program.

[0009] The instruction acquisition module is configured to acquire a voice selection instruction input by a target object.

[0010] The first chip is configured to execute the computing program, and when the voice selection instruction represents selection of the first voice program, execute the first voice program.

[0011] The second chip is configured to execute the second voice program when the voice selection instruction represents selection of the second voice program.

[0012] In a possible embodiment, the first chip comprises a storage module, a processing module, a voice output module, and a port module;

[0013] The storage module is connected with the processing module and the voice output module respectively, the processing module is connected with the voice output module and the port module respectively, the voice output module is connected with a loudspeaker, and the loudspeaker and the port module are connected with the second chip respectively, and the port module is connected with an external power supply and an instruction collection module;

[0014] The storage module stores a calculation program and a first voice program;

[0015] The processing module is configured to execute the calculation program and the first voice program;

[0016] The voice output module is configured to transmit an execution result of the first voice program to the loudspeaker and output the execution result in an audio mode, and the execution result comprises a voice result corresponding to a calculation result of the calculation program;

[0017] The port module comprises an interface connected with the external power supply and the second chip, and is configured to connect with the external power supply and the second chip.

[0018] In a possible embodiment, the voice output module comprises an automatic reload timer and a pulse width modulation (PWM) module;

[0019] The automatic reload timer is connected with the storage module, the port module, and the PWM module;

[0020] The automatic reload timer is configured to generate a periodic signal based on the processing module;

[0021] The PWM module is configured to control a duty cycle of an output waveform according to the periodic signal, so as to obtain an audio signal with a corresponding frequency, and transmit the audio signal to the loudspeaker.

[0022] In a possible embodiment, the first chip further comprises an oscillator and a time base module;

[0023] The oscillator is connected with the time base module, and the oscillator and the time base module are connected with the storage module, the processing module, and the voice output module respectively;

[0024] The oscillator is configured to generate a stable clock signal, and a frequency of the clock signal corresponds to a processing rate of the processing module;

[0025] The time base module is configured to adjust a frequency of an output audio signal of the voice output module according to the clock signal.

[0026] In a possible embodiment, the first chip further comprises an interrupt control module and a wake-up control module;

[0027] The interrupt control module and the wake-up control module are connected with the storage module, the processing module and the voice output module respectively;

[0028] The interrupt control module is used for managing interrupt requests to interrupt the current processing event of the processing module.

[0029] The wake-up control module is used for waking up the processing module.

[0030] In a possible embodiment, the first chip further comprises a low-voltage reset module.

[0031] The low-voltage reset module is connected with the storage module, the processing module and the voice output module, and is used for triggering a reset when the voltage of the external power supply is lower than a preset threshold.

[0032] In a possible embodiment, the first chip further comprises a display module, and the display module comprises a storage unit and a driving unit.

[0033] The storage unit and the driving unit are connected with the storage module, the processing module and the voice output module respectively.

[0034] The storage unit is used for storing display data.

[0035] The driving unit is used for converting the display data into pixels.

[0036] In a possible embodiment, the second chip comprises a CPU, a memory, an external port and a control module.

[0037] The CPU is connected with the memory, the external port and the control module respectively, the external port is connected with the first chip, and the control module is connected with the loudspeaker.

[0038] The memory is used for storing a second voice program.

[0039] The CPU is used for executing the second voice program to obtain a voice result.

[0040] The control module is used for controlling the voice result and transmitting a control result to the loudspeaker.

[0041] In a possible embodiment, the memory comprises a static random access memory (SRAM), a one-time programmable read-only memory (OTP PROM) and a one-time programmable dynamic read-only memory (OTP DROM).

[0042] In a possible embodiment, the control module comprises a signal processor and a PWM digital-analog converter generator.

[0043] The signal processor is connected with the PWM digital-analog converter generator and the CPU.

[0044] The PWM digital-to-analog converter generator is configured to generate an audio adjustment signal by adjusting the voice result.

[0045] The signal processor is configured to obtain an audio optimization result by optimizing the audio adjustment signal.

[0046] In a possible embodiment, the computing circuit further includes a switch module.

[0047] The switch module includes a first impedance, a diode, a triode, and a second impedance.

[0048] One end of the first impedance is connected to an external power supply, and the other end is connected to the anode of the diode; the cathode of the diode is connected to the collector of the triode; the emitter of the triode is grounded; and the base of the triode is connected to the second chip.

[0049] The switch module is configured to control the power supply of the second chip to be turned on or turned off.

[0050] In a possible embodiment, the computing circuit further includes a voice configuration module.

[0051] The voice configuration module includes a first switch, a second switch, and a third switch.

[0052] One end of each of the first switch, the second switch, and the third switch is connected to an external power supply, and the other end is connected to the second chip.

[0053] When the first switch is turned on, the voice function of the circuit is turned on; when the first switch is turned off, the voice function is turned off; when the second switch is turned on and the third switch is turned off, the voice function corresponds to one voice; when the second switch is turned off and the third switch is turned on, the voice function corresponds to two voices; and when the second switch and the third switch are simultaneously turned on or turned off, the voice function corresponds to three voices.

[0054] In a possible embodiment, the computing circuit further includes a voltage stabilizing module.

[0055] The voltage stabilizing module includes a ceramic capacitor and an electrolytic capacitor.

[0056] One end of each of the ceramic capacitor and the electrolytic capacitor is connected to an external power supply and a second chip, and the other end is grounded.

[0057] The ceramic capacitor is configured to perform high-frequency decoupling on the external power supply.

[0058] The electrolytic capacitor is configured to perform low-frequency decoupling on the external power supply.

[0059] In one aspect, the embodiments of the present application provide a computing device including any of the above computing circuits.

[0060] The present application has the following beneficial effects:

[0061] The application provides a computing circuit and device, the circuit comprising a first chip, a second chip, an instruction acquisition module, and a speaker. The first chip stores a computing program and a first voice program, and the second chip stores a second voice program. The instruction acquisition module is configured to acquire a voice selection instruction input by a target object. The first chip is configured to execute the computing program and execute the first voice program when the voice selection instruction represents selection of the first voice program. The second chip is configured to execute the second voice program when the voice selection instruction represents selection of the second voice program. In this way, the first chip and the second chip are integrated, and different voice programs are stored in the first chip and the second chip, respectively. The device can execute corresponding voice programs according to voice selection instructions of a user. This design improves the accuracy and response speed of voice recognition, increases the diversity of voice functions, and improves user experience. BRIEF DESCRIPTION OF DRAWINGS

[0062] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.

[0063] Figure 1A Fig. 1 shows a structural schematic diagram of a computing circuit according to an embodiment of the present application.

[0064] Figure 1B Fig. 2 shows a circuit schematic diagram of an instruction acquisition module according to an embodiment of the present application.

[0065] Figure 2 Fig. 3 shows a structural schematic diagram of a computing circuit according to another embodiment of the present application.

[0066] Figure 3 Fig. 4 shows a structural schematic diagram of a computing circuit according to another embodiment of the present application.

[0067] Figure 4 Fig. 5 shows a structural schematic diagram of a computing circuit according to another embodiment of the present application.

[0068] Figure 5 Fig. 6 shows a structural schematic diagram of a computing circuit according to another embodiment of the present application.

[0069] Figure 6 Fig. 7 shows a structural schematic diagram of a computing circuit according to another embodiment of the present application.

[0070] Figure 7 Fig. 8 shows a structural schematic diagram of a computing circuit according to another embodiment of the present application.

[0071] Figure 8 Fig. 8 shows a structural schematic diagram of a computing circuit according to an embodiment of the present application.

[0072] Figure 9 Fig. 9 shows a structural schematic diagram of a switch module according to an embodiment of the present application.

[0073] Figure 10 Fig. 10 shows a structural schematic diagram of a voice configuration module according to an embodiment of the present application.

[0074] Figure 11 Fig. 11 shows a structural schematic diagram of a computing circuit according to an embodiment of the present application.

[0075] Figure 12 Fig. 12 shows a detailed diagram of a computing circuit according to an embodiment of the present application.

[0076] Figure 13 Fig. 13 shows a structural schematic diagram of a computing device according to an embodiment of the present application. DETAILED DESCRIPTION

[0077] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0078] However, the embodiments of the present application can be implemented in various forms and should not be understood as being limited to the examples set forth herein; rather, these embodiments are provided so that the present application will be more comprehensive and complete, and so that the inventive concept of the embodiments of the present application will be fully conveyed to those skilled in the art. Among them, the described features, structures or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to give a sufficient understanding of the embodiments of the present application.

[0079] However, those skilled in the art will realize that the technical solutions of the embodiments of the present application can be implemented without one or more of the specific details, or can be implemented with other methods, components, materials, etc. In other cases, well-known structures, materials or operations are not shown or described in detail to avoid obscuring the main technical ideas of the embodiments of the present application.

[0080] The words "one", "an", "said" are used to indicate the presence of one or more elements / components / etc.; the words "include" and "have" are used to indicate an open-ended inclusion in the sense that additional elements / components / etc. can be present in addition to those listed; the words "first", "second", etc. are used only as labels and do not imply a quantity limitation.

[0081] Existing computing devices still have some limitations in the application of voice functions. For example, many devices can only provide a single type of voice output, which cannot be adjusted according to the specific needs or preferences of the user, and the user experience is not good.

[0082] Therefore, the embodiments of the present application provide a computing circuit. As shown in FIG. 1, it is a structural schematic diagram of a computing circuit provided by the embodiments of the present application. In FIG. 1, the computing circuit includes a first chip 101, a second chip 102, an instruction acquisition module 103, and a speaker 104; the first chip 101 is connected with the second chip 102, the speaker 104, an external power supply, and the instruction acquisition module 103; the second chip 102 is connected with the speaker 104 and the external power supply; the first chip 101 stores a computing program and a first voice program, and the second chip 102 stores a second voice program; the instruction acquisition module 103 is used to acquire a voice selection instruction input by a target object; the first chip 101 is used to execute the computing program to realize a computing function, and execute the first voice program when the voice selection instruction represents that the first voice program is selected, and then realize a voice function; the second chip 102 is used to execute the second voice program when the voice selection instruction represents that the second voice program is selected, and then realize another voice function.

[0083] The above computing circuit integrates the first chip and the second chip, respectively stores different voice programs, so that the device can execute the corresponding voice program according to the voice selection instruction of the user. This design not only improves the accuracy and response speed of voice recognition, but also increases the diversity of voice functions and improves the user experience.

[0084] Optionally, the instruction acquisition module 103 can be a keyboard, including a physical keyboard and a virtual keyboard. When the target object clicks the keyboard, the instruction acquisition can be realized. When the instruction acquisition module 103 is a physical keyboard, the corresponding circuit diagram is as follows: Figure 1B In the above embodiments, the first chip and the second chip are integrated, and different voice programs are stored in the first chip and the second chip respectively, so that the device can execute the corresponding voice program according to the voice selection instruction of the user. This design not only improves the accuracy and response speed of voice recognition, but also increases the diversity of voice functions and improves the user experience. Figure 1BIn the diagram, “IOEF0”, “IOEF1”, “IOEF2”, “IOEF3”, “IOEF4”, “IOEF5”, “IOEF6”, “IOEF7”, “IOAB0”, “IOAB1”, and “IOAB2” are all interfaces connected to the first chip 101. “VDD” is the external power supply. “TIME SET” is the time setting button. “Square Root” is used for square root calculation. “MRC” is the clear button, also known as Memory RecallClear (MRC). “VOL” is the volume button. “--->” is the right shift button. “ADJ” is the adjustment button. “GT” is an abbreviation for Grand Total, representing continuous summation. “OFF” is the power off button. “M+” is an abbreviation for Memory Plus, used to add the currently displayed value to the value already stored in memory. “M-” is an abbreviation for Memory Minus, used to subtract the currently displayed value from the value already stored in memory. “MC” is an abbreviation for Memory Clear, used to clear the memory contents. The “MR” key represents “Memory The "Recall" key is used for "memory recall" or "retrieving from storage". "UNIT" is the unit conversion key. The "CE" key stands for "Clear Entry" and is used to clear the current input. "AC / ON" is a multi-function key used to clear or power off.

[0085] In one possible embodiment, such as Figure 2 The diagram shown is a schematic representation of another computing circuit provided in an embodiment of this application. Figure 2 In the first chip 101, there are a storage module 201, a processing module 202, a voice output module 203, and a port module 204. The storage module 201 is connected to the processing module 202 and the voice output module 203 respectively. The processing module 202 is connected to the voice output module 203 and the port module 204 respectively. The voice output module 203 is connected to the speaker 104. The speaker 104 and the port module 204 are connected to the second chip 102 respectively. The port module 204 is connected to the external power supply and the command acquisition module 103.

[0086] The storage module 201 stores a calculation program and a first voice program; the processing module 202 is used to execute the calculation program and the first voice program; the voice output module 203 is used to transmit the execution result of the first voice program to the speaker 104 and output it in audio mode, and the execution result includes the voice result corresponding to the calculation result of the calculation program; the port module 204 includes an interface for connecting to an external power supply and a second chip 102, and is used to connect to an external power supply and a second chip.

[0087] Optionally, the storage module 201 includes 64K bytes of ROM and 160 bytes of RAM, with the first voice program stored in the 64K bytes of ROM.

[0088] Optionally, the processing module 202 includes an 8-bit RISC Processor, an 8-bit processor employing a Reduced Instruction Set Computer (RISC) architecture.

[0089] In one possible embodiment, such as Figure 3 The diagram shown is a schematic representation of another computing circuit provided in an embodiment of this application. Figure 3 In the audio output module 203, there are an automatic reload timer 301 and a pulse width modulation (PWM) module 302. The automatic reload timer 301 is connected to the storage module 201, the port module 204 and the PWM module 302. The automatic reload timer 301 is used to generate a periodic signal based on the processing module 202. The PWM module 302 is used to control the duty cycle of the output waveform according to the periodic signal, so as to obtain an audio signal of the corresponding frequency and transmit the audio signal to the speaker 104.

[0090] Optionally, the auto-reload timer 301 can be a 16-bit auto-reload timer that can count from 0 to 65535 (i.e., 2^16-1).

[0091] Based on this circuit, different frequency audio signals can be generated by adjusting the duty cycle of the output waveform. For example, if the waveforms corresponding to the audio signals of the numbers "0", "1", "2", ... "9" are set to different duty cycles, then when the target inputs the numbers "0", "1", "2", ... "9", the voice tones corresponding to the different numbers will be different.

[0092] In one possible embodiment, such as Figure 4 The diagram shown is a schematic representation of another computing circuit provided in an embodiment of this application. Figure 4In the first chip 101, a time base module 401 and an oscillator 402 are also included. The oscillator 402 is connected to the time base module 401, and the oscillator 402 and the time base module 401 are respectively connected to the storage module 201, the processing module 202, and the voice output module 203. The oscillator 402 is used to generate a stable clock signal, the frequency of which corresponds to the processing rate of the processing module 202. The time base module 401 is used to adjust the frequency of the output audio by the voice output module 203 according to the clock signal. Specifically, the adjustment can be achieved by controlling the duty cycle of the output waveform through a PWM module.

[0093] Optionally, the oscillator 402 is a 32.768 kHz oscillator.

[0094] In one possible embodiment, such as Figure 5 The diagram shown is a schematic representation of another computing circuit provided in an embodiment of this application. Figure 5 In the first chip 101, there are also interrupt control module 501 and wake-up control module 502; interrupt control module 501 and wake-up control module 502 are respectively connected to storage module 201, processing module 202 and voice output module 203; interrupt control module 501 is used to manage interrupt requests triggered internally or externally so that processing module 202 interrupts the current processing event; wake-up control module 502 is used to wake up processing module.

[0095] Based on this computing circuit, it is possible to interrupt operation in specific scenarios, thereby saving power consumption.

[0096] In one possible embodiment, such as Figure 6 The diagram shown is a schematic representation of another computing circuit provided in an embodiment of this application. Figure 6 In the first chip 101, a low-voltage reset module 601 is also included. The low-voltage reset module 601 is connected to the storage module 201, the processing module 202, and the voice output module 203, and is used to trigger a reset when the voltage of the external power supply is lower than a preset threshold.

[0097] In one possible embodiment, such as Figure 7 The diagram shown is a schematic representation of another computing circuit provided in an embodiment of this application. Figure 7In the specific implementation, the first chip 101 further comprises a display module 701, and the display module 701 comprises a storage unit 701A and a driving unit 701B; the storage unit 701A and the driving unit 701B are connected with the storage module 201, the processing module 202 and the voice output module 203 respectively; the storage unit 701A is configured to store display data, which can be data input by the target object or data generated by the processing module, and the specific implementation is not limited herein; and the driving unit 701B is configured to convert the display data into pixels, thereby facilitating screen display.

[0098] In a possible implementation, as shown in Figure 8 FIG. 6, another structure of a computing circuit provided by the embodiment of the present application is shown. In Figure 8 the specific implementation, the second chip 102 comprises a central processing unit (CPU) 801, a memory 802, an external port 803 and a control module 804; the CPU 801 is connected with the memory 802, the external port 803 and the control module 804 respectively; the external port 803 is connected with the first chip 101; the control module 804 is connected with the loudspeaker 104; the memory 802 is configured to store a second voice program; the CPU 801 is configured to execute the second voice program to obtain a voice result; and the control module 804 is configured to control the voice result and transmit a control result to the loudspeaker 104.

[0099] Optionally, the memory 802 comprises a static random access memory (SRAM), a one-time programmable read-only memory (OTP PROM) and a one-time programmable dynamic read-only memory (OTP DROM).

[0100] Optionally, the control module 804 comprises a signal processor and a PWM digital-analog converter generator; the signal processor is connected with the PWM digital-analog converter generator and the CPU; the PWM digital-analog converter generator is configured to adjust the voice result to obtain an audio adjustment signal; and the signal processor is configured to optimize the audio adjustment signal to obtain an audio optimization result.

[0101] In a possible implementation, any of the above computing circuits further comprises a switch module 901, as shown in Figure 9 FIG. 7, a structure of the switch module provided by the embodiment of the present application is shown. InFigure 9 In the circuit, the switching module 901 includes a first impedance 901A, a diode 901B, a transistor 901C, and a second impedance 901D. One end of the first impedance 901A is connected to an external power supply, and the other end is connected to the positive terminal of the diode 901B. The negative terminal of the diode 901B is connected to the collector of the transistor 901C. The emitter of the transistor 901C is grounded, and the base of the transistor 901C is connected to the second chip 102. The switching module 901 is used to control the power supply of the second chip 102 to be turned on or off.

[0102] In one possible embodiment, any of the above-described computing circuits further includes a voice configuration module 1001, such as... Figure 10 The diagram shown is a structural schematic of the voice configuration module provided in an embodiment of this application. Figure 10 In the middle, the voice configuration module 1001 includes a first switch 1001A, a second switch 1001B and a third switch 1001C; one end of each of the first switch 1001A, the second switch 1001B and the third switch 1001C is connected to an external power supply, and the other end is connected to the second chip 102.

[0103] Figure 10 In this circuit, when the first switch 1001A is on, the voice function of the computing circuit is enabled; when the first switch 1001A is off, the voice function is off. When the second switch 1001B is on and the third switch 1001C is off, the voice function corresponds to one voice; when the second switch 1001B is off and the third switch 1001C is on, the voice function corresponds to two voices; and when the second switch 1001B and the third switch 1001C are both on or both off, the voice function corresponds to three voices. It should be noted that the different types of voices here can be different national languages ​​or different ethnic languages, mainly referring to different language categories.

[0104] In one possible embodiment, any of the above-described computing circuits further includes a voltage regulator module, which comprises a ceramic capacitor and an electrolytic capacitor. One end of each of the ceramic capacitor and the electrolytic capacitor is connected to an external power supply and the second chip, while the other end is grounded. The ceramic capacitor is used for high-frequency decoupling of the external power supply, and the electrolytic capacitor is used for low-frequency decoupling of the external power supply. Based on this voltage regulator module, noise reduction processing can be performed on the external power supply connected to the second chip, thereby achieving voltage stabilization and protecting the second chip from overcurrent burnout.

[0105] To further illustrate the embodiments of this application, specific examples are provided below. For instance... Figure 11 The diagram shown is an example of the structure of a computing circuit.

[0106] exist Figure 11 The system contains two chips. The first chip includes:

[0107] 32.768KHz Oscillator & Time Base: This oscillator provides a stable 32.768KHz clock signal, which is used by the Time Base module to generate precise time intervals for the Timer and PWM modules.

[0108] One 16-bit Auto Reload Timers: This is a 16-bit auto-reload timer that can be set to a count value. When the counter reaches this value, it automatically reloads and starts counting again. The timer can be used to generate periodic interrupts for timing operations.

[0109] PWM: The PWM module receives the clock signal from the Time Base module and adjusts the duty cycle of the output signal based on the settings of the timer. It can be used to control the duty cycle of the audio module.

[0110] 8-bit RISC Processor: This is the central processing unit of the microcontroller, responsible for executing program instructions, including the calculation program and the voice program.

[0111] Interrupt / Wakeup Control: The Interrupt Control module manages interrupt requests, allowing the processor to respond to external or internal events; the Wakeup Control is used to wake up the processor from low-power mode.

[0112] Low Voltage Reset: The Low Voltage Reset feature triggers a reset when the supply voltage falls below a certain threshold, protecting the microcontroller from running under unstable power conditions.

[0113] ROM and RAM: The 64K bytes of ROM are used to store fixed program code or data, which is usually read-only; the 160 bytes of RAM provide temporary data storage for the processor's data operations while running; the voice program is stored in the ROM.

[0114] LCD RAM & LCD Driver: The LCD RAM is used to store the data displayed on the LCD, while the LCD Driver is responsible for converting these data into pixels on the screen. The configuration of 33 Segments X 5 Commons means that 33 segments and 5 common terminals can be controlled to drive the LCD display.

[0115] I / O Ports: Port modules, 12 I / O ports for communication with external devices, can be configured as input or output. IOAB3 and IOCD0 are specific I / O ports for specific functions or connections, here for the external second chip, thus realizing the expansion of language categories.

[0116] AUDP and AUDN: These are audio-related output ports for outputting audio signals.

[0117] The second chip includes:

[0118] 4-Bit RISC CPU Core: This is the core processing unit of the microcontroller, responsible for executing program instructions. The 4-bit RISC (Reduced Instruction Set Computer) CPU is designed for efficient execution of a simple instruction set.

[0119] SRAM: 256x4 Static Random Access Memory (SRAM) for storing temporary data and program variables.

[0120] OTP PROM: 8K word One-Time Programmable Read-Only Memory (OTP PROM) for storing fixed program code or data, once programmed, the content cannot be changed.

[0121] OTP DROM: 496K word One-Time Programmable Read-Only Memory (OTP DROM) for storing larger program code or data, also once programmed, the content cannot be changed.

[0122] LVR (Low Voltage Reset): Low voltage reset circuit triggers a reset when the power supply voltage is below a certain threshold, to protect the microcontroller from running under unstable power conditions.

[0123] WDT (Watchdog Timer): Watchdog timer monitors the running state of the microcontroller. If the microcontroller stops responding for some reason, the watchdog timer can trigger a reset to restore normal operation.

[0124] RCOSC (32MHz Oscillator): Internal 32MHz RC oscillator provides a clock signal for driving the CPU and other timing-sensitive modules.

[0125] Port A, B, C, D, E: These are the input / output ports of the microcontroller, used for communication with external devices. Each port can be configured as input or output mode.

[0126] OP Amp / Schmitt: Operational amplifier and Schmitt trigger for signal processing such as amplification and shaping.

[0127] Comparator1 / Comparator2: Comparator is used to compare two voltage values and generate output signal according to the comparison result.

[0128] 38KHz Modulator: 38KHz modulator can be used for infrared communication or other applications requiring 38KHz carrier.

[0129] PWM DAC Gen.: PWM digital analog converter generator is used to generate accurate analog voltage, through the duty cycle of PWM signal to simulate continuous voltage value.

[0130] PWMN, PWMP: These are PWM output pins used to control the speaker.

[0131] The working principle of the whole system is that the 4-bit RISC CPU controls various modules according to the voice program instructions stored in SRAM or OTP memory. The CPU communicates with external devices through I / O ports, and controls the waveform duty cycle corresponding to the voice signal through PWM, comparator and operational amplifier modules, so as to realize different frequency voice corresponding to different entered numbers. LVR and WDT provide system stability and fault recovery mechanism. RCOSC provides the clock signal required for system operation.

[0132] The first chip contains a voice program, and the second chip contains three voice programs, which can realize the switching of four different voices in total. The detailed circuit diagram of the calculation circuit for realizing voice function switching can refer to Figure 12 .

[0133] In Figure 12 , KT-350 is the first chip, and SOP16 is the second chip. The circuit diagram corresponding to different keys of the keyboard is shown in the upper right corner of the figure. Clicking the "voice" key can realize voice switching. Among them, the type configuration of voice is realized based on the switches S1, S2 and S3 shown in the lower right corner of the figure. When S2 is on and S3 is off, one type of voice is configured; when S2 is off and S3 is on, two types of voice are configured; when S2 and S3 are on or off at the same time, three types of voice are configured; S1 is used to control the opening or closing of voice. If S1 is off, the voice function is closed, and if S1 is on, the voice function is enabled.

[0134] In addition, the component "32768" in the figure represents a 32.768 kHz crystal oscillator, "RESET" is the reset key, C1 is the capacitor, and the block on the left side of the figure represents the LCD RAM & LCD Driver in Figure 11 .

[0135] In addition, the element "NTC-103H343F" is a negative temperature coefficient thermistor, RR is a precision resistor of 10kΩ, C3 is a filter capacitor, IOCD1, IOCD2, IOCD3 are all connected to the chip KT-350, and this part of the circuit is used for monitoring the temperature change of the chip.

[0136] In addition, in this circuit, when S1 is in the OFF state, the IOEF6 pin connected thereto is set to 12-bit mode; when S1 is in the ON state, the IOEF6 pin is set to 10-bit mode. When S2 is in the OFF state, the IOEF7 pin connected thereto indicates no calendar function; when S2 is in the ON state, the IOEF7 pin connected thereto indicates a calendar function.

[0137] The working principle between the first chip and the second chip will not be described here.

[0138] On the other hand, the embodiments of the present application also provide a computing device, which comprises any one of the computing circuits described above. Figure 13 As shown in the figure, it is a structural schematic diagram of a computing device.

[0139] It should be noted that the accompanying drawings only represent examples and are not limited to the structure of the circuit diagram, wherein the various circuit diagrams can be in a parallel relationship, a progressive relationship, can be combined with each other, or the circuit units in the various circuit diagrams can also be combined with each other, and the specific combination mode is not limited by the embodiments of the present application.

[0140] Although the preferred embodiments of the present application have been described, those skilled in the art can make further changes and modifications to these embodiments once they know the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0141] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and changes of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application also intends to include these changes and modifications.

Claims

1. A computing circuit, characterized in that, include: First chip, second chip, instruction acquisition module, speaker; The first chip is connected to the second chip, the speaker, the external power supply, and the instruction acquisition module; the second chip is connected to the speaker and the external power supply. The first chip stores a calculation program and a first voice program, and the second chip stores a second voice program; The instruction acquisition module is used to acquire the voice selection instructions input by the target object; The first chip is used to execute the calculation program, and execute the first voice program when the voice selection instruction indicates that the first voice program is selected; The second chip is used to execute the second voice program when the voice selection instruction indicates that the second voice program is selected.

2. The circuit according to claim 1, characterized in that, The first chip includes a storage module, a processing module, a voice output module, and a port module; The storage module is connected to the processing module and the voice output module respectively. The processing module is connected to the voice output module and the port module respectively. The voice output module is connected to a speaker. The speaker and the port module are connected to the second chip respectively. The port module is connected to an external power supply and the instruction acquisition module. The storage module stores a calculation program and a first voice program. The processing module is used to execute the calculation program and the first voice program; The voice output module is used to transmit the execution result of the first voice program to the speaker and output it in audio mode. The execution result includes the voice result corresponding to the calculation result of the calculation program. The port module includes an interface for connecting to an external power supply and the second chip, and is used to connect to the external power supply and the second chip.

3. The circuit according to claim 2, characterized in that, The voice output module includes an automatic reload timer and a pulse width modulation (PWM) module. The automatic reload timer is connected to the storage module, the port module, and the PWM module; The automatic reload timer is used to generate a periodic signal based on the processing module; The PWM module is used to control the duty cycle of the output waveform according to the periodic signal, thereby obtaining an audio signal of the corresponding frequency, and transmitting the audio signal to the speaker.

4. The circuit as described in claim 2, characterized in that, The first chip also includes an oscillator and a time base module; The oscillator is connected to the time base module, and the oscillator and the time base module are respectively connected to the storage module, the processing module, and the voice output module; The oscillator is used to generate a stable clock signal, the frequency of which corresponds to the processing rate of the processing module. The time base module is used to cause the voice output module to adjust the frequency of the output audio according to the clock signal.

5. The circuit as described in claim 2, characterized in that, The first chip also includes an interrupt control module and a wake-up control module; The interrupt control module and the wake-up control module are respectively connected to the storage module, the processing module, and the voice output module; The interrupt control module is used to manage interrupt requests so that the processing module can interrupt the current processing event. A wake-up control module is used to wake up the processing module.

6. The circuit as described in claim 2, characterized in that, The first chip also includes a low-voltage reset module; The low-voltage reset module is connected to the storage module, the processing module, and the voice output module, and is used to trigger a reset when the voltage of the external power supply is lower than a preset threshold.

7. The circuit as described in claim 2, characterized in that, The first chip also includes a display module, which includes a storage unit and a driving unit; The storage unit and the driving unit are respectively connected to the storage module, the processing module, and the voice output module; The storage unit is used to store display data; The driving unit is used to convert the display data into pixels.

8. The circuit as described in claim 1, characterized in that, The second chip includes a CPU, memory, external ports, and a control module; The CPU is connected to the memory, the external port, and the control module respectively. The external port is connected to the first chip, and the control module is connected to the speaker. The memory is used to store the second voice program; The CPU is used to execute the second voice program and obtain the voice result; The control module is used to control the voice result and transmit the control result to the speaker.

9. The circuit as described in claim 1, characterized in that, It also includes a voice configuration module; The voice configuration module includes a first switch, a second switch, and a third switch; One end of each of the first switch, the second switch, and the third switch is connected to the external power supply, and the other end is connected to the second chip. Specifically, when the first switch is on, the voice function of the circuit is turned on; when the first switch is off, the voice function is turned off. When the second switch is on and the third switch is off, the voice function corresponds to one voice. When the second switch is off and the third switch is on, the voice function corresponds to two voices. When the second switch and the third switch are both on or both off, the voice function corresponds to three voices.

10. A computing device, characterized in that, The computing device includes the circuit described in any one of claims 1 to 9.

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