Display device and electronic apparatus

Abstract

The utility model discloses a display device and electronic equipment, and belongs to the technical field of electronic display. The display device comprises a display module and a driving integrated circuit, the display module comprises a plurality of pixels, a pixel driving circuit and a sampling holding circuit, wherein the pixel driving circuit and the sampling holding circuit correspond to each pixel, and the plurality of pixels are divided into at least one pixel group by taking at least two columns of pixels as one group; the pixel driving circuit corresponding to each pixel is connected with the driving integrated circuit through the sampling holding circuit; the driving integrated circuit is used for controlling the sampling hold circuits corresponding to at least two pixels of the pixel row in each pixel group in a row scanning period of any pixel row, and sequentially acquiring pixel data output by the driving integrated circuit; the sampling hold circuit is used for outputting the pixel data to the pixel driving circuit; and the pixel driving circuit is used for driving the pixels to emit light based on the pixel data.

Description

Technical Field

[0001] This application belongs to the field of electronic display technology, specifically relating to a display device and an electronic device. Background Technology

[0002] With the development of mobile devices, users have increasingly higher requirements for them. Among these requirements, the screen-to-body ratio, which refers to the ratio of the area of ​​the display screen to the area of ​​the front panel of the device, has become an important parameter that users pay close attention to, as the demand for narrow bezels increases.

[0003] Currently, the main technical means to reduce screen-to-body ratio include: overlapping the bezel circuitry located below the bezel in the display device to reduce the bezel area used to cover the bezel circuitry, thus achieving the narrow bezel requirement of the display device. For example, the de-mux module is an important component of the bezel circuitry in the display device, used to reduce the number of output channels of the driver integrated circuit (IC). Figure 1 As shown, the demultiplexing module 10 can be disposed on the back of the display panel 20 in the display module, so that the demultiplexing module 10 and the display panel 20 are overlapped. This effectively reduces the bezel used to cover the demultiplexing module 10, and significantly reduces the bezel area compared to a flat arrangement of the demultiplexing module 10 and the display panel 20. However, as the area occupied by the demultiplexing module increases, the thickness of the display device increases. Utility Model Content

[0004] The purpose of this application is to provide a display device and an electronic device that at least solves the problem of increased display device thickness caused by reducing the bezel area of ​​the display device.

[0005] In a first aspect, embodiments of this application provide a display device, the display device comprising: a display module and a driver integrated circuit IC;

[0006] The display module includes: a plurality of pixels, and a pixel driving circuit and a sample-and-hold circuit corresponding to each pixel; the plurality of pixels are divided into at least one pixel group according to at least two columns of pixels as a group; the pixel driving circuit corresponding to each pixel is connected to the driving IC through the sample-and-hold circuit;

[0007] The driver IC is used to control the sample-and-hold circuits corresponding to at least two pixels in each pixel group during the row scanning period of any pixel row, so as to sequentially collect the pixel data output by the driver IC;

[0008] The sample-and-hold circuit is used to output the pixel data to the pixel driving circuit;

[0009] The pixel driving circuit is configured to drive the pixel to emit light based on the pixel data.

[0010] In a second aspect, the embodiments of the present application provide an electronic device, which comprises a device body and the display device of the first aspect.

[0011] In the embodiments of the present application, the display device comprises a display module and a driving IC. The display module comprises a plurality of pixels, and a pixel driving circuit and a sample-and-hold circuit of each pixel. The plurality of pixels are divided into at least one pixel group according to at least two columns of pixels as a group. The driving IC can control the sample-and-hold circuit of at least two pixels of the pixel row in each pixel group in the row scanning period of any pixel row, and sequentially collect the pixel data output by the driving IC, so that the sample-and-hold circuit can output the pixel data to the pixel driving circuit, and the pixel driving circuit drives the pixel to emit light based on the pixel data.

[0012] In the technical solution, the driving IC can drive the one column of pixels in the pixel row in each pixel group to emit light at the same time, so as to drive the multiple columns of pixels in the pixel row in each pixel group to emit light in sequence, thereby achieving the driving of the single row of pixels in batches. In this way, the driving IC can output the pixel data of the same pixel group according to the emission sequence of the pixels in the same pixel group, effectively reducing the number of output channels of the driving IC, realizing the demultiplexing function on the driving IC, saving the demultiplexing module on the display module, reducing the frame area for covering the demultiplexing module, realizing the narrow frame requirement of the display device, and effectively avoiding the increase of the thickness of the display device on the basis of reducing the frame area of the display device.

[0013] Further, the sample-and-hold circuit can also continuously output the pixel data of the pixel. Therefore, in the refresh process of the single row of pixels, when the unemitting pixel is refreshed, the input end of the pixel driving circuit of the emitting pixel will also receive the pixel data output by the sample-and-hold circuit. This avoids the suspension state of the input end of the pixel driving circuit of the emitting pixel due to the waiting of the emitting pixel for the refresh of the unemitting pixel. Moreover, the suspension state of the circuit in the mobile terminal has a great influence on the anti-EMI ability and EMS ability. Therefore, the technical solution of the present application can also effectively improve the anti-EMI ability and EMS ability of the electronic device. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 A structural schematic diagram of a display device provided by the related art is shown;

[0015] Figure 2 A structural schematic diagram of a display device provided by the embodiments of the present application is shown;

[0016] Figure 3A partial circuit schematic diagram of a single pixel is shown;

[0017] Figure 4 A structural schematic diagram of another display device is shown;

[0018] Figure 5 A circuit schematic diagram of a sample-and-hold circuit is shown;

[0019] Figure 6 A circuit schematic diagram of a sample control circuit is shown;

[0020] Figure 7 A circuit timing diagram of a display device is shown;

[0021] Figure 8 A structural schematic diagram of another display device is shown. DETAILED DESCRIPTION

[0022] The terms "first", "second" in the specification and claims of the present application can explicitly or implicitly include one or more of the features. In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / ", generally means that the front and rear associated objects are in an "or" relationship.

[0023] In the description of the present application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0024] In the description of the present application, it should be noted that unless otherwise specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0025] Please refer to Figure 2 This illustrates a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 2 As shown, the display device 2 includes a display module 21 and a driver IC 22.

[0026] Display module 21 includes: multiple pixels ( Figure 2 (Not shown in the diagram), and a pixel driving circuit 211 and a sample-and-hold circuit (S / H) 212 corresponding to each pixel. The pixel driving circuit 211 corresponding to each pixel is connected to the driving IC 22 through the sample-and-hold circuit 212. Multiple pixels are divided into at least one pixel group according to at least two columns of pixels. Correspondingly, it can be understood that the pixel driving circuits 211 of multiple pixels can also be divided into at least one driving group 3, and each driving group 3 includes pixel driving circuits 211 of at least two columns of pixels.

[0027] It should be noted that the pixel, pixel driving circuit 211 and sample-and-hold circuit 212 are not limited to a one-to-one correspondence. Figure 2 Among the multiple pixels of the display module 21, the pixel driving circuit (PX11) 211 and sample-and-hold circuit (S / H) 212 for the first row and first column pixel, the pixel driving circuit (PX21) 211 and sample-and-hold circuit (S / H) 212 for the first row and second column pixel, the pixel driving circuit (PX12) 211 and sample-and-hold circuit (S / H) 212 for the second row and first column pixel, and the pixel driving circuit (PX22) 211 and sample-and-hold circuit (S / H) 212 for the second row and second column pixel... The pixel driving circuit (PX31) 211 and sample-and-hold circuit (S / H) 212 for the first row and third column pixel, the pixel driving circuit (PX41) 211 and sample-and-hold circuit (S / H) 212 for the first row and fourth column pixel, the pixel driving circuit (PX32) 211 and sample-and-hold circuit (S / H) 212 for the second row and third column pixel, and the pixel driving circuit (PX42) 211 and sample-and-hold circuit (S / H) 212 for the second row and fourth column pixel. The example is illustrated by dividing the pixels into at least one pixel group with two columns of pixels as a group. Accordingly, the pixel driving circuit 211 for each driving group, which includes two columns of pixels, is also illustrated schematically.

[0028] The driver IC 22 controls the sample-and-hold circuits 212 corresponding to at least two pixels in each pixel group within the row scan period of any pixel row. These circuits sequentially acquire the pixel data output by the driver IC 22, thereby controlling all pixels in that pixel row to complete the refresh during the row scan period. Specifically, the driver IC 22 outputs the pixel data for each pixel. Multiple pixels in the display module refresh their pixel data according to pixel rows to emit light and display the image.

[0029] The sample-and-hold circuit 212 is used to output pixel data to the pixel driving circuit 211. The pixel driving circuit 211 is used to drive the pixels to emit light based on the pixel data. Optionally, the sample-and-hold circuit 212 is used to continuously output pixel data to the pixel driving circuit 211.

[0030] like Figure 3 As shown, for a single pixel (xx), its connected pixel driving circuit (PXxx) 211 is also connected to a sample-and-hold circuit (S / H) 212. The sample-and-hold circuit 212 has a control signal terminal SW and a data input terminal Data. The data input terminal Data is used to receive pixel data output by the driver IC 22. The control signal terminal SW is used to receive a control signal output by the driver IC 22, which controls whether the sample-and-hold circuit 212 acquires the pixel data transmitted by the driver IC 22 to the data input terminal Data. Based on this, the sample-and-hold circuit 212 can be used to acquire the pixel data transmitted by the driver IC 22 through the data input terminal Data when the control signal output by the driver IC 22 indicates that pixel data acquisition is required, and continuously output pixel data to the pixel driving circuit 211.

[0031] In some embodiments of this application, the display module 21 includes n (rows) × m (columns) pixels, and each pixel group includes all pixels in k columns. Accordingly, the row scanning time period of a single row of pixels includes k scanning time periods. Wherein, n, m, and k are all positive integers, and 1 < k < m.

[0032] During the row scan period of the first pixel row, the driver IC 22 controls the sample-and-hold circuit 212 corresponding to the first row and first column of pixels in each pixel group to acquire pixel data. The sample-and-hold circuit 212 corresponding to the first row and first column of pixels in each pixel group outputs the acquired pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data.

[0033] Further, the driving IC 22 controls the sampling and holding circuit 212 corresponding to the pixel in the first row and the second column in each pixel group to collect pixel data, and the sampling and holding circuit 212 corresponding to the pixel in the first row and the second column in each pixel group outputs the collected pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data. Moreover, the sampling and holding circuit 212 corresponding to the pixel in the first row and the first column in each pixel group keeps outputting the pixel data of the pixel to the pixel driving circuit 211. In this way, until the driving IC 22 controls the sampling and holding circuit 212 corresponding to the pixel in the first row and the kth column in each pixel group to collect pixel data, and the sampling and holding circuit 212 corresponding to the pixel in the first row and the kth column in each pixel group outputs the collected pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data. Moreover, the sampling and holding circuit 212 corresponding to the pixel in the first row and the first column to the pixel in the first row and the k-1th column in each pixel group keeps outputting the pixel data of the corresponding pixel to the pixel driving circuit 211. In this way, until the driving IC 22 controls the sampling and holding circuit 212 corresponding to the pixel in the nth row and the first column in each pixel group to collect pixel data in the row scanning period of the nth pixel row. The sampling and holding circuit 212 corresponding to the pixel in the nth row and the first column outputs the collected pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data. Moreover, in each pixel group, the sampling and holding circuit 212 corresponding to all pixels in the first n-1 rows keeps outputting the pixel data of the pixel to the pixel driving circuit 211.

[0034] Further, the driving IC 22 controls the sampling and holding circuit 212 corresponding to the pixel in the first row and the second column in each pixel group to collect pixel data, and the sampling and holding circuit 212 corresponding to the pixel in the first row and the second column in each pixel group outputs the collected pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data. Moreover, the sampling and holding circuit 212 corresponding to the pixel in the first row and the first column in each pixel group keeps outputting the pixel data of the pixel to the pixel driving circuit 211. In this way, until the driving IC 22 controls the sampling and holding circuit 212 corresponding to the pixel in the first row and the kth column in each pixel group to collect pixel data, and the sampling and holding circuit 212 corresponding to the pixel in the first row and the kth column in each pixel group outputs the collected pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data. Moreover, the sampling and holding circuit 212 corresponding to the pixel in the first row and the first column to the pixel in the first row and the k-1th column in each pixel group keeps outputting the pixel data of the corresponding pixel to the pixel driving circuit 211. In this way, until the driving IC 22 controls the sampling and holding circuit 212 corresponding to the pixel in the nth row and the first column in each pixel group to collect pixel data in the row scanning period of the nth pixel row. The sampling and holding circuit 212 corresponding to the pixel in the nth row and the first column outputs the collected pixel data to the pixel driving circuit 211, so that the pixel driving circuit 211 drives the pixel to emit light based on the pixel data. Moreover, in each pixel group, the sampling and holding circuit 212 corresponding to all pixels in the first n-1 rows keeps outputting the pixel data of the pixel to the pixel driving circuit 211.

[0035] In summary, the display device includes a display module and a driving IC. The display module includes a plurality of pixels, and a pixel driving circuit and a sample-and-hold circuit of each pixel. The plurality of pixels are divided into at least one pixel group according to at least two columns of pixels as a group, so that the driving IC can control the sample-and-hold circuit of at least two pixels in the pixel row of each pixel group in the row scanning period of any pixel row, and sequentially collect the pixel data output by the driving IC, so that the sample-and-hold circuit can output the pixel data to the pixel driving circuit, and the pixel driving circuit drives the pixel to emit light based on the pixel data.

[0036] In the technical solution, the driving IC can control one column of pixels in the pixel row of each pixel group to emit light at the same time, so as to control multiple columns of pixels in the pixel row of each pixel group to emit light in sequence, thereby achieving the driving of the single row of pixels in batches. In this way, the driving IC can output the pixel data of the same pixel group in the order of the light emission of the pixels in the same pixel group, effectively reducing the number of output channels of the driving IC, realizing the demultiplexing function on the driving IC, saving the demultiplexing module on the display module, reducing the frame area for covering the demultiplexing module, and effectively avoiding the increase in the thickness of the display device while realizing the narrow frame requirement of the display device and reducing the frame area of the display device.

[0037] Further, the sample-and-hold circuit can also continuously output the pixel data of the pixel. Therefore, during the refresh process of the single row of pixels, when the non-emitting pixel is refreshed, the input end of the pixel driving circuit of the emitting pixel will also receive the pixel data output by the sample-and-hold circuit. This avoids the situation that the input end of the pixel driving circuit of the emitting pixel is in a suspended state due to the need for the emitting pixel to wait for the refresh of the non-emitting pixel. Moreover, the suspended state of the circuit in the mobile terminal has a greater impact on the anti-electromagnetic interference (EMI) ability and electromagnetic susceptibility (EMS) of the circuit. Therefore, the technical solution of the present application can also effectively improve the anti-EMI ability and EMS ability of the electronic device.

[0038] Optionally, as shown in Figure 4 the row scanning period of the single row of pixels is divided into at least two scanning periods corresponding to each column of pixels in the single pixel group. For example, if the single pixel group includes two columns of pixels, the row scanning period of the single row of pixels is composed of two scanning periods. If the single pixel group includes three columns of pixels, the row scanning period of the single row of pixels is composed of three scanning periods. In addition, the driving IC 22 includes a sample control module 221.

[0039] The sampling control module 221 is connected with the sample-and-hold circuit 212 of each pixel. The sampling control module 221 is configured to output a sampling control signal to the sample-and-hold circuit 212 of a different pixel in each pixel group in each scanning period of any pixel row. The sampling control signal is configured to control the sample-and-hold circuit 212 to collect the pixel data of the pixel connected therewith and output the collected pixel data to the pixel driving circuit 211. Optionally, the sampling control module 221 provides a demultiplexing function and can be in a non-overlap structure.

[0040] The sample-and-hold circuit 212 is configured to receive the pixel data output by the driving IC 22 and output the received pixel data to the pixel driving circuit 211 upon receiving the sampling control signal.

[0041] Further optionally, the sampling control module 221 is configured to output a sampling control signal to the sample-and-hold circuit 212 of a different pixel in each pixel group in each scanning period of any pixel row and output a stop sampling signal to the sample-and-hold circuit 212 of other pixels in each pixel group in the pixel row. The stop sampling signal is configured to control the sample-and-hold circuit 212 to stop collecting the pixel data output by the driving IC 22 and output the pixel data collected in the previous time to the pixel driving circuit 211.

[0042] The sample-and-hold circuit 212 is further configured to stop receiving the pixel data output by the driving IC 22 and output the pixel data of the corresponding pixel collected in the previous time to the pixel driving circuit 211 upon receiving the stop sampling signal. Optionally, the sample-and-hold circuit 212 is further configured to stop receiving the pixel data output by the driving IC 22 and continuously output the pixel data of the corresponding pixel collected in the previous time to the pixel driving circuit 211 upon receiving the stop sampling signal.

[0043] It should be noted that the number of sampling control modules 221 in the driving IC 22 can be at least one. When the number of sampling control modules 221 is one, it can be understood that one sampling control module 221 controls whether the pixels in all pixel groups are lit. Of course, the number of sampling control modules 221 can also be determined according to the number of pixel groups. For example, the number of sampling control modules is the same as the number of pixel groups, and the sampling control module is one-to-one with the pixel group. In this way, it can be understood that one sampling control module 221 controls whether the pixels in one pixel group are lit. Figure 4 An example is taken in which the number of sampling control modules is the same as the number of pixel groups.

[0044] In an optional case, please continue to refer to Figure 4 The driving IC 22 comprises a sampling control module 221 corresponding to each pixel group.

[0045] Each sampling control module 221 is connected with the sampling holding circuit 212 of each pixel in the corresponding pixel group. Each sampling control module 221 is configured to output a sampling control signal to the sampling holding circuit 212 of a different pixel in the pixel row in each scan period of any pixel row.

[0046] Further optionally, each sampling control module 221 is configured to output a sampling control signal to the sampling holding circuit 212 of a different pixel in the pixel row in each scan period of any pixel row, and output a stop sampling signal to the sampling holding circuit 212 of other pixels in the pixel row in the pixel group. The sampling holding circuit 212 is configured to stop receiving the pixel data output by the driving IC 22 and output the pixel data of the corresponding pixel collected last time to the pixel driving circuit 211 upon receiving the stop sampling signal. In some embodiments, the sampling holding circuit 212 can be configured to continuously output the pixel data of the corresponding pixel collected last time to the pixel driving circuit 211 upon receiving the stop sampling signal.

[0047] Optionally, as shown in FIG. 2, the sampling holding circuit 212 comprises a switch S and a capacitor C. The switch S is connected with the driving IC 22 and one end of the capacitor C respectively. The other end of the capacitor C is connected with the pixel driving circuit 211, and the other end of the capacitor C is grounded. The switch S is configured to be turned on or off under the control of the driving IC 22 to connect or disconnect the driving IC 22 and the pixel driving circuit 211. The capacitor C is configured to store the pixel data and output the pixel data to the pixel driving circuit 211 upon the switch S being turned off. Figure 5

[0048] Specifically, each sampling control module 221 is configured to output a sampling control signal to the switch S of the sampling holding circuit 212 of a different pixel in the pixel row in each scan period of any pixel row, and output a stop sampling signal to the switch S of the sampling holding circuit 212 of other pixels in the pixel row in the pixel group.

[0049] The switch S is configured to turn on the driving IC 22 and the pixel driving circuit 211 to collect the pixel data output by the driving IC 22 and transmit the pixel data to the pixel driving circuit 211 upon receiving the sampling control signal. The switch S is also configured to turn off the driving IC 22 and the pixel driving circuit 211 to make the capacitor C output the pixel data to the pixel driving circuit 211 upon receiving the stop sampling signal.

[0050] For example, as described above, the pixel driving circuit 211 is configured to output the pixel data of the corresponding pixel to the pixel driving circuit 211 upon receiving the pixel data output by the driving IC 22. Figure 2 ​The sample-and-hold circuit 212 has a control signal terminal SW and a data input terminal Data. The switch S is connected with the driving IC 22 and one end of the capacitor C respectively. The other end of the capacitor C is also connected with the pixel driving circuit 211, and the other end of the capacitor C is grounded.

[0051] The switch S is connected with the driving IC 22 through the control signal terminal SW, for receiving the control signal outputted by the driving IC 22. The control signal includes a sample control signal or a stop sample signal. The switch S is also connected with the driving IC 22 through the data input terminal Data, for receiving the pixel data outputted by the driving IC 22. In addition, the sample-and-hold circuit 212 also has a pixel data output terminal DOut. The switch S is also connected with one end of the capacitor C, and one end of the capacitor C is also connected with the pixel driving circuit 211 through the pixel data output terminal DOut, for transmitting the pixel data to the pixel driving circuit 211.

[0052] In some embodiments, as Figure 4 shown, the driving IC 22 further includes a data amplification module 222. The data amplification module 222 is connected with the sample-and-hold circuit 212. The data amplification module 222 is used for power amplification processing of the pixel data, and outputs the power amplified pixel data to the sample-and-hold circuit 212.

[0053] Optionally, referring to Figure 4 , the data amplification module 222 can include at least one power amplifier X1 AMP corresponding to each pixel group. Each power amplifier X1 AMP is used for receiving the pixel data of the pixels in the corresponding pixel group in the order of the light emission of the pixels, and performing power amplification processing on the received pixel data, and serially outputting the power amplified pixel data to the sample-and-hold circuit 212. Each power amplifier X1 AMP serially outputs the pixel data of the pixels in the order of the light emission of the pixels in the corresponding pixel group. It should be noted that, Figure 4 only two power amplifiers X1 AMP corresponding to two pixel groups are exemplarily shown.

[0054] In an alternative case, referring to Figure 4 , each pixel group includes at least two columns of all the pixels. Figure 4 Taking an example of each pixel group including two columns of all the pixels, the pixel driving circuit 211 corresponding to each driving group 3 including two columns of pixels is also exemplarily shown.

[0055] Each sample control module 221 has at least two signal output terminal groups. The signal output terminal groups are one-to-one corresponding to the pixel columns, and at least one signal output terminal in each signal output terminal group is connected with the sample-and-hold circuit of the corresponding pixel column.

[0056] Each sampling control unit 221 is also configured to output the sampling control signal to the sample-and-hold circuit 212 of a different column of pixels in the pixel group in each scan period of any pixel row.

[0057] The pixel driving circuit 211 is configured to drive the pixel to emit light based on the received pixel data in the row scan period of the pixel connected thereto. In this case, since each sampling control unit 221 is configured to output the sampling control signal to the sample-and-hold circuit 212 of a column of pixels in the pixel group in each scan period of any pixel row, the sample-and-hold circuit 212 of the column of pixels can all collect the pixel data output by the driving IC 22. However, it is obvious that the pixel data is for lighting a certain pixel in the pixel row. Therefore, the pixel driving circuit 211 can be configured to drive the pixel to emit light based on the pixel data received from the sample-and-hold circuit 212 in the row scan period of the pixel connected thereto.

[0058] In the case where each signal output end group includes at least two signal output ends, each column of pixels in the pixel group corresponding to each sampling control module 221 can also be divided into at least two pixel subgroups, and the pixel subgroups correspond to the signal output ends one by one. Each signal output end in each signal output end group outputs the sampling control signal to the sample-and-hold circuit 212 of the pixel subgroups of the corresponding column of pixels. In this case, the sampling control module 221 can output the sampling control signal to the sample-and-hold circuit 212 of the corresponding column of pixels through at least two signal output ends in a single signal output end group.

[0059] For example, the display device includes one pixel group, which includes a first column of pixels and a second column of pixels, and the number of pixels in each column is 6. Correspondingly, the driving IC 22 includes one sampling control module 221 corresponding to the pixel group, which has a first signal output end group and a second signal output group, and the number of signal output end groups is two.

[0060] In this case, the first signal output group includes a first signal output end and a second signal output end. The first signal output group is configured to output the sampling control signal / stop sampling signal to the first column of pixels. Based on this, the first signal output end is connected to the sample-and-hold circuit 212 of 2 pixels in the first column of pixels, and the second signal output end is connected to the sample-and-hold circuit 212 of the remaining 4 pixels in the first column of pixels. The first signal output end and the second signal output end are configured to synchronously output the sampling control signal / stop sampling signal to the sample-and-hold circuit 212 of each pixel in the first column of pixels.

[0061] The second signal output group includes a third signal output terminal and a fourth signal output terminal. The second signal output group is configured to output a sampling control signal / stop sampling signal to the second column of pixels. Based on this, the third signal output terminal is connected with the sampling holding circuit 212 of 3 pixels in the second column of pixels, and the fourth signal output terminal is connected with the sampling holding circuit 212 of the remaining 3 pixels in the second column of pixels. The third signal output terminal and the fourth signal output terminal are configured to synchronously output the sampling control signal / stop sampling signal to the sampling holding circuit 212 of each pixel in the second column of pixels.

[0062] In the case where each signal output terminal group includes one signal output terminal, each signal output terminal is connected with the sampling holding circuit 212 of a corresponding column of pixels. It is not difficult to understand that the sampling control module 221 can output the sampling control signal to the sampling holding circuit 212 of the corresponding column of pixels through at least two signal output terminals in a single signal output terminal group.

[0063] Further optionally, each sampling control module 221 is further configured to output the sampling control signal to the sampling holding circuit 212 of a different column of pixels in the pixel group and output the stop sampling signal to the sampling holding circuit 212 of other columns of pixels in the pixel group in each scanning period of any pixel row.

[0064] The sampling holding circuit 212 is configured to receive the pixel data output by the driving IC 22 and output the pixel data to the pixel driving circuit 211 in the case where the sampling control signal is received, and stop receiving the pixel data output by the driving IC 22 and output the pixel data of the corresponding pixel collected last time to the pixel driving circuit 211 in the case where the stop sampling signal is received. In some embodiments, the sampling holding circuit 212 can be configured to continuously output the pixel data of the corresponding pixel collected last time to the pixel driving circuit 211 in the case where the stop sampling signal is received.

[0065] In some embodiments of the present application, the driving IC further includes a scan enable module (not shown in the figure). The scan enable module can be connected with the pixel driving circuit 211. The scan enable module is configured to output a valid row scan enable signal to the pixel driving circuit 211 of any pixel row in the row scanning period of the pixel row. The valid row scan enable signal indicates that the pixel driving circuit 211 currently reaches the row scanning period of the pixel connected therewith. Accordingly, the pixel driving circuit 211 is configured to drive the pixel to emit light based on the received pixel data in the case where the valid row scan enable signal is received.

[0066] Optionally, the scan enable module is further configured to output a valid row scan enable signal to the pixel driving circuit 211 of any pixel row during the row scan period of the pixel row, and output an invalid row scan enable signal to the pixel driving circuit 211 of other pixel rows. The invalid row scan enable signal indicates that the pixel driving circuit 211 is not currently in the row scan period of the pixel connected thereto. Accordingly, the pixel driving circuit 211 is configured to not drive the pixel to emit light based on the received pixel data if the invalid row scan enable signal is received.

[0067] Optionally, each sampling control module 221 is further configured to output a stop sampling signal to the sample-and-hold circuit 212 corresponding to the other column pixels in the pixel group during each scan period of any pixel row. The sample-and-hold circuit 212 is further configured to output the pixel data output by the driving IC 22 to the pixel driving circuit 211 if the sampling control signal is received, and output the previously collected pixel data to the pixel driving circuit 211 if the stop sampling signal is received. In some embodiments, the sample-and-hold circuit 212 can be configured to continuously output the previously collected pixel data of the corresponding pixel to the pixel driving circuit 211 if the stop sampling signal is received.

[0068] In some embodiments of the present application, the display module 21 includes n (rows) x m (columns) pixels, each pixel group includes k columns of all pixels, and the pixel group corresponds to one sampling control module 221. Accordingly, the row scan period of a single row of pixels includes k scan periods. Wherein n, m, k are positive integers, and 1 < k < m.

[0069] Optionally, each sampling control module 221 is configured to output a sampling control signal to the sample-and-hold circuit 212 corresponding to the i-th column pixels in the pixel group during the i-th scan period of any pixel row, and output a no-sampling signal to the sample-and-hold circuit 212 corresponding to the other column pixels in the pixel group, i is a positive integer, and 0 < i ≤ k.

[0070] Specifically, in the driving IC 22, each sampling control module 221 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the first column pixels in the pixel group during the first scan period of the first pixel row. The sample-and-hold circuit 212 corresponding to the first column pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first row and first column pixels in each pixel group receives a valid row scan enable signal and drives the pixel to emit light based on the pixel data.

[0071] Further, each sampling control module 221 outputs a sampling control signal to the sampling and holding circuit 212 corresponding to the second column of pixels in the pixel group in the second scanning period of the first pixel row. The sampling and holding circuit 212 corresponding to the second column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first row and second column of pixels in each pixel group receives a valid row scanning enable signal and drives the pixels to emit light based on the pixel data. Moreover, the sampling and holding circuits 212 corresponding to the first column of pixels to the second column of pixels in each pixel group continuously output the pixel data collected in the previous time. In this way, until each sampling control module 221 outputs a sampling control signal to the sampling and holding circuit 212 corresponding to the kth column of pixels in the pixel group in the kth scanning period of the first pixel row. The sampling and holding circuit 212 corresponding to the kth column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first row and kth column of pixels in each pixel group receives a valid row scanning enable signal and drives the pixels to emit light based on the pixel data. Moreover, the sampling and holding circuits 212 corresponding to the first column of pixels to the (k-1)th column of pixels in each pixel group continuously output the pixel data collected in the previous time. In this way, until each sampling control module 221 outputs a sampling control signal to the sampling and holding circuit 212 corresponding to the first column of pixels in the pixel group in the first scanning period of the nth pixel row. The sampling and holding circuit 212 corresponding to the first column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the nth row and first column of pixels in each pixel group receives a valid row scanning enable signal and drives the pixels to emit light based on the pixel data. Moreover, the sampling and holding circuits 212 corresponding to the second column of pixels to the (n-1)th column of pixels in each pixel group continuously output the pixel data collected in the previous time.

[0072] Further, each sampling control module 221 outputs a sampling control signal to the sampling and holding circuit 212 corresponding to the second column of pixels in the pixel group in the second scanning period of the first pixel row. The sampling and holding circuit 212 corresponding to the second column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first row and second column of pixels in each pixel group receives a valid row scanning enable signal and drives the pixels to emit light based on the pixel data. Moreover, the sampling and holding circuits 212 corresponding to the first column of pixels to the second column of pixels in each pixel group continuously output the pixel data collected in the previous time. In this way, until each sampling control module 221 outputs a sampling control signal to the sampling and holding circuit 212 corresponding to the kth column of pixels in the pixel group in the kth scanning period of the first pixel row. The sampling and holding circuit 212 corresponding to the kth column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first row and kth column of pixels in each pixel group receives a valid row scanning enable signal and drives the pixels to emit light based on the pixel data. Moreover, the sampling and holding circuits 212 corresponding to the first column of pixels to the (k-1)th column of pixels in each pixel group continuously output the pixel data collected in the previous time. In this way, until each sampling control module 221 outputs a sampling control signal to the sampling and holding circuit 212 corresponding to the first column of pixels in the pixel group in the first scanning period of the nth pixel row. The sampling and holding circuit 212 corresponding to the first column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the nth row and first column of pixels in each pixel group receives a valid row scanning enable signal and drives the pixels to emit light based on the pixel data. Moreover, the sampling and holding circuits 212 corresponding to the second column of pixels to the (n-1)th column of pixels in each pixel group continuously output the pixel data collected in the previous time.

[0073] In an alternative case, the display module includes a plurality of pixels, and each pixel group includes a first column of pixels and a second column of pixels. The row scanning period of a single row of pixels includes a first scanning period and a second scanning period. Accordingly, the driving IC includes m / 2 sampling control modules.

[0074] Each sampling control module 221 is configured to output a sampling control signal to the sample-and-hold circuit 212 of the first column of pixels of the corresponding pixel group and output a stop sampling signal to the sample-and-hold circuit 212 of the second column of pixels during the first scanning period.

[0075] Each sampling control module 221 is further configured to output a stop sampling signal to the sample-and-hold circuit 212 of the first column of pixels of the corresponding pixel group and output a sampling control signal to the sample-and-hold circuit 212 of the second column of pixels during the second scanning period.

[0076] Thus, in the driving IC 22, each sampling control module 221 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the first column of pixels in each pixel group during the first scanning period of the first pixel row. The sample-and-hold circuit 212 corresponding to the first column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first column of pixels in the first row of each pixel group receives an active row scanning enable signal and drives the pixels to emit light based on the pixel data.

[0077] Each sampling control module 221 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the second column of pixels in each pixel group during the second scanning period of the first pixel row. The sample-and-hold circuit 212 corresponding to the second column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the second column of pixels in the first row of each pixel group receives an active row scanning enable signal and drives the pixels to emit light based on the pixel data. In addition, the sample-and-hold circuit 212 corresponding to the first column of pixels in each pixel group continuously outputs the pixel data. Similarly, each sampling control module 221 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the first column of pixels in each pixel group during the first scanning period of the nth pixel row. The sample-and-hold circuit 212 corresponding to the first column of pixels in each pixel group collects pixel data, and the pixel driving circuit 211 corresponding to the first column of pixels in the nth row of each pixel group receives an active row scanning enable signal and drives the pixels to emit light based on the pixel data. In addition, the sample-and-hold circuit 212 corresponding to the first column of pixels continuously outputs the pixel data collected in the previous time, except for the sample-and-hold circuit 212 corresponding to the first column of pixels.

[0078] Each sampling control module 221 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the second column of pixels in the pixel group during the second scan period of the nth pixel row. The sample-and-hold circuit 212 corresponding to the second column of pixels in each pixel group acquires pixel data, and the pixel driving circuit 211 corresponding to the second column of pixels in the nth row of each pixel group receives a valid row scan enable signal and drives the pixel to emit light based on the pixel data. In addition, except for the sample-and-hold circuit 212 of the second column of pixels, the sample-and-hold circuits 212 corresponding to the other columns of pixels continuously output the previously acquired pixel data. It is easy to understand that during the first scan period of the first pixel row, half of the pixels in the i-th row of the display module 2 emit light under the drive of the pixel driving circuit 211; during the second scan period of the i-th pixel row, the other half of the pixels in the i-th row of the display module 2 emit light under the drive of the pixel driving circuit 211, so that the entire i-th row of pixels emits light.

[0079] Optionally, when the sampling control module 211 has a non-overlapping circuit structure, the sampling control module 221 can be used to receive a periodically changing image processing signal CTS to generate at least two control signals based on the image processing signal CTS. The number of control signals is the same as the number of pixel columns in a single pixel group. Each control signal is either a sampling control signal or a stop sampling signal. The variation period of the image processing signal CTS is the row scan period of a single row of pixels, and the number of variations within a single period is the same as the number of output control signals.

[0080] For example, with Figure 4 Taking the displayed device as an example, the multiple pixels of the display module in this device are divided into pixel groups according to two columns of all pixels. Correspondingly, each sampling control module 221 is used to simultaneously output a sampling control signal / stop sampling signal to the sample-and-hold circuit 212 of the two columns of pixels. Figure 6 As shown, the sampling control module 221 with a non-overlap structure includes:

[0081] The system comprises an inverter G, a first NOR gate L1, a second NOR gate L2, a first delay unit D1, and a second delay unit D2. The signal input terminal IN of the sampling control module 221 is connected to one input terminal of the first NOR gate L1 and one input terminal of the inverter G. The other input terminal of the first NOR gate L1 is connected to the output terminal of the second delay unit D2. The output terminal of the first NOR gate L1 is connected to the first signal output terminal MUX1 of the sampling control module 221 via the first delay unit D1. The output terminal of the inverter G is connected to one input terminal of the second NOR gate L2. The other input terminal of the second NOR gate L2 is connected to the output terminal of the first delay unit D1. The output terminal of the second NOR gate L2 is connected to the second signal output terminal MUX2 of the sampling control module 221 via the second delay unit D2.

[0082] The signal input end IN of the sampling control module 221 is configured to receive an image processing signal CTS. The image processing signal CTS can be inverted once in a row scanning period of a single row of pixels, that is, the image processing signal CTS is opposite in phase in the first scanning period and the second scanning period. Each sampling control module 221 is configured to output, based on the image processing signal CTS, a control signal Mux1 to the first column of pixels in the corresponding pixel group through the first signal output end MUX1, and output a control signal Mux2 to the second column of pixels through the second signal output end MUX2. Wherein, if the sampling control signal is a high-level control signal, and the stop sampling signal is a low-level control signal, the two control signals Mux1 and Mux2 output by the sampling control module 221 are opposite in phase.

[0083] The sample-and-hold circuit 212 of each pixel is configured to, in the case of receiving a high-level control signal, collect pixel data output by the power amplifier X1 APM and output the collected pixel data to the pixel driving circuit 211 of the pixel; and the sample-and-hold circuit 212 of each pixel is also configured to, in the case of receiving a low-level control signal, continuously output the pixel data collected last time to the pixel driving circuit 211 of the pixel.

[0084] The pixel driving circuit 211 of each pixel is configured to, in the row scanning period of the pixel, drive the pixel to emit light based on the received pixel data of the pixel.

[0085] Further examples are described with reference to Figure 7 , which shows Figure 4 In the display device shown in the figure, the circuit timing diagram of a single pixel group (i.e., a single driving group 3) part when driving the first row of pixels. The single pixel group includes the first column of pixels and the second column of pixels.

[0086] As shown in Figure 7 , in the row scanning period 1H Time of the first row of pixels, the scan enable module outputs a high-level row scanning enable signal Hsync (i.e., an effective row scanning enable signal) to the pixel driving circuit PX11 corresponding to the first column of pixels in the first row, and the pixel driving circuit PX21 corresponding to the second column of pixels in the first row. The operational amplifier X1 AMP of each pixel group is configured to alternately output the pixel data of each pixel in the two columns of pixels in the pixel group.

[0087] The sampling control module 221 receives a high-level image processing signal CTS in the first scanning period 1-1H, outputs a high-level control signal Mux1 to the sample-and-hold circuit 212 corresponding to the first column of pixels, and outputs a low-level control signal Mux2 to the sample-and-hold circuit 212 corresponding to the second column of pixels.

[0088] The sample-and-hold circuit 212 corresponding to the first column of pixels receives the pixel data Output output by the operational amplifier X1 AMP in the first scanning period 1-1H and outputs the pixel data Output to the pixel driving circuit 211. The pixel data Output is the pixel data of the first row and the first column of pixels.

[0089] The sample-and-hold circuit 212 corresponding to the second column of pixels does not receive the pixel data Output output by the operational amplifier X1 AMP in the first scanning period 1-1H and continuously outputs the pixel data Output collected last time to the pixel driving circuit 211.

[0090] At this time, in the first scanning period 1-1H, the input signal Pixel11 of the pixel driving circuit PX11 corresponding to the first row and the first column of pixels is the pixel data Output, and the input signal Pixel21 of the pixel driving circuit P21 corresponding to the first row and the second column of pixels is the pixel data Output collected last time by the sample-and-hold circuit 212.

[0091] The sample control module 221 receives the low-level image processing signal CTS in the second scanning period 1-2H, outputs the low-level control signal Mux1 to the sample-and-hold circuit 212 corresponding to the first column of pixels, and outputs the high-level control signal Mux2 to the sample-and-hold circuit 212 corresponding to the second column of pixels.

[0092] The sample-and-hold circuit 212 corresponding to the first column of pixels does not receive the pixel data Output output by the operational amplifier X1 AMP in the second scanning period 1-2H and continuously outputs the pixel data Output collected last time to the pixel driving circuit 211.

[0093] The sample-and-hold circuit 212 corresponding to the second column of pixels receives the pixel data Output output by the operational amplifier X1 AMP in the second scanning period 1-2H and outputs the pixel data Output to the pixel driving circuit 211. The pixel data Output is the pixel data of the first row and the second column of pixels.

[0094] At this time, in the second scanning period 1-2H, the input signal Pixel11 of the pixel driving circuit corresponding to the first row and the first column of pixels is the pixel data Output collected last time by the sample-and-hold circuit 212, and the input signal Pixel21 of the pixel driving circuit corresponding to the first row and the second column of pixels is the pixel data Output newly collected by the sample-and-hold circuit 212.

[0095] It should be noted that, in the row scanning period 1H Time of the first row of pixels, the pixel driving circuits 211 corresponding to the pixels of the rows other than the first row do not sample the pixel data Output transmitted by the sample-and-hold circuits 212 because they do not receive the high-level row scanning enable signal Hsync. Figure 6 In the above example, the output signal of the sample-and-hold circuit 212 of the first column of pixels is denoted as Pixel1, and the output signal of the sample-and-hold circuit 212 of the second column of pixels is denoted as Pixel2.

[0096] In an alternative case, the row scanning period of a single row of pixels is divided into at least two scanning periods each corresponding to each column of pixels in a single pixel group. The driving IC 22 includes a sample control module 221 corresponding to each pixel group.

[0097] Please refer to Figure 8 Each pixel group includes at least two columns of pixels in at least two rows of pixels. Each sample control module 221 is connected to the sample-and-hold circuit 212 corresponding to each pixel in the corresponding pixel group. Figure 8 For example, each pixel group includes two columns of pixels in two rows of pixels. Correspondingly, each driving group 3 includes the pixel driving circuits 211 corresponding to two columns of pixels in two rows of pixels, which is also illustrative.

[0098] In the above example, the output signal of the sample-and-hold circuit 212 of the first column of pixels is denoted as Pixel1, and the output signal of the sample-and-hold circuit 212 of the second column of pixels is denoted as Pixel2. Figure 8 Only one pixel group composed of the first column of pixels in the first row, the second column of pixels in the first row, the first column of pixels in the second row, and the second column of pixels in the second row is shown, and another pixel group composed of the first column of pixels in the third row, the second column of pixels in the third row, the first column of pixels in the fourth row, and the second column of pixels in the fourth row is also shown. Correspondingly, Figure 8 The pixel driving circuit (PX11) 211 and the sample-and-hold circuit (S / H) 212 of the first column of pixels in the first row, the pixel driving circuit (PX21) 211 and the sample-and-hold circuit (S / H) 212 of the second column of pixels in the first row, the pixel driving circuit (PX12) 211 and the sample-and-hold circuit (S / H) 212 of the first column of pixels in the second row, the pixel driving circuit (PX22) 211 and the sample-and-hold circuit (S / H) 212 of the second column of pixels in the second row, the pixel driving circuit (PX13) 211 and the sample-and-hold circuit (S / H) 212 of the first column of pixels in the third row, the pixel driving circuit (PX23) 211 and the sample-and-hold circuit (S / H) 212 of the second column of pixels in the third row, the pixel driving circuit (PX14) 211 and the sample-and-hold circuit (S / H) 212 of the first column of pixels in the fourth row, and the pixel driving circuit (PX24) 211 and the sample-and-hold circuit (S / H) 212 of the second column of pixels in the fourth row are shown.

[0099] Based on this, the driving IC 22 further comprises a scan enable module. The scan enable module is connected with each sampling control module 221. The scan enable module is configured to output an image processing signal to the sampling control module 221 corresponding to the target pixel group during the row scanning period of any pixel row. The image processing signal indicates each scanning period within the row scanning period. The target pixel group is the pixel group in which the pixels in the pixel row corresponding to the row scanning period are located.

[0100] Each sampling control module 221 is configured to output a sampling control signal to the sample-and-hold circuit 212 of a different pixel in the pixel row in the pixel group during each scanning period indicated by the image processing signal. The sample-and-hold circuit 212 is configured to receive the pixel data of the pixel corresponding to the sample-and-hold circuit 212 output by the driving IC 22 and output the pixel data to the pixel driving circuit 211 when the sampling control signal is received. The pixel driving circuit 211 is configured to drive the pixel to emit light based on the pixel data.

[0101] Alternatively, each sampling control module 221 is further configured to output a stop control signal to the sample-and-hold circuit 212 of other pixels in the pixel group during each scanning period indicated by the image processing signal. The sample-and-hold circuit 212 is configured to stop receiving the pixel data output by the driving IC 22 and output the pixel data collected last time to the pixel driving circuit 211 when the stop control signal is received.

[0102] In some embodiments of the present application, the display module 21 comprises n (rows) x m (columns) pixels, and each pixel group comprises j rows and k columns of pixels. Accordingly, the row scanning period of a single row of pixels comprises k scanning periods. Wherein j is a positive integer, and 1 < j < n. For ease of understanding, the pixel group j is used to represent the pixel group comprising the pixels in the jth pixel row in the following description. For example, the pixel group 1 represents the pixel group comprising the pixels in the 1st pixel row.

[0103] The scan enable module is configured to output an image processing signal to the sampling control module 221 corresponding to each pixel group 1 during the row scanning period of the 1st pixel row.

[0104] The sampling control module 221 corresponding to each pixel group 1 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the 1st column of pixels in the 1st pixel row in the pixel group 1 and outputs a stop sampling signal to the sample-and-hold circuit 212 corresponding to other pixels during the 1st scanning period of the 1st pixel row. The sample-and-hold circuit 212 corresponding to the 1st column of pixels in the 1st pixel row in each pixel group 1 collects pixel data, and the pixel driving circuit 211 corresponding to the pixel drives the pixel to emit light based on the pixel data, and so on.

[0105] Further, the sampling control module 221 corresponding to each pixel group 1 outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the kth column of pixels in the first pixel row in the pixel group 1 and outputs a stop sampling signal to the sample-and-hold circuits 212 corresponding to other pixels in the kth scanning period of the first pixel row.

[0106] The sample-and-hold circuit 212 corresponding to the kth column of pixels in the first pixel row in each pixel group 1 collects pixel data, and the pixel drive circuit 211 corresponding to the pixel drives the pixel to emit light based on the pixel data. Further, the sample-and-hold circuits 212 corresponding to the first column of pixels to the k-1th column of pixels in the first pixel row in each pixel group 1 continuously output pixel data. In this way, the scanning enable module outputs an image processing signal to the sampling control module 221 corresponding to each pixel group 1 in the row scanning period of the nth pixel row.

[0107] The sampling control module 221 corresponding to each pixel group n outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the first column of pixels in the nth pixel row in the pixel group n and outputs a stop sampling signal to the sample-and-hold circuits 212 corresponding to other pixels in the first scanning period of the nth pixel row.

[0108] The sample-and-hold circuit 212 corresponding to the first column of pixels in the nth pixel row in each pixel group n collects pixel data, and the pixel drive circuit 211 corresponding to the pixel drives the pixel to emit light based on the pixel data. Further, except for the sample-and-hold circuit 212 corresponding to the first column of pixels in the nth pixel row, the sample-and-hold circuits 212 corresponding to other columns of pixels continuously output pixel data collected in the previous time. In this way, the sampling control module 221 corresponding to each pixel group n outputs a sampling control signal to the sample-and-hold circuit 212 corresponding to the kth column of pixels in the nth pixel row in the pixel group n and outputs a stop sampling signal to the sample-and-hold circuits 212 corresponding to other pixels in the kth scanning period of the nth pixel row.

[0109] The sample-and-hold circuit 212 corresponding to the kth column of pixels in the nth pixel row in each pixel group n collects pixel data, and the pixel drive circuit 211 corresponding to the pixel drives the pixel to emit light based on the pixel data. Further, except for the sample-and-hold circuit 212 corresponding to the kth column of pixels in the nth pixel row, the sample-and-hold circuits 212 corresponding to other columns of pixels continuously output pixel data collected in the previous time.

[0110] For example, a single pixel group includes a first row first column pixel, a first row second column pixel, a second row first column pixel, and a second row second column pixel.

[0111] The scan enable module is configured to output an image processing signal to each sampling control module 221 corresponding to each pixel group 1 during the row scanning period of the first pixel row.

[0112] The sampling control module 221 corresponding to each pixel group 1 outputs a sampling control signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX11 211 during the first scanning period of the first pixel row, and outputs a stop sampling signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX21 211, the pixel driving circuit PX21 211, and the pixel driving circuit PX22 211. The pixel driving circuit PX11 211 drives the pixels to emit light based on the pixel data, and so on.

[0113] Further, the sampling control module 221 corresponding to each pixel group 1 outputs a sampling control signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX21 211 during the second scanning period of the first pixel row, and outputs a stop sampling signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX11 211, the pixel driving circuit PX21 211, and the pixel driving circuit PX22 211. The pixel driving circuit PX21 211 drives the pixels to emit light based on the pixel data. Further, the sample-and-hold circuit 212 connected to the pixel driving circuit PX11 211, the pixel driving circuit PX21 211, and the pixel driving circuit PX22 211 continuously outputs the pixel data. This is repeated until the sampling control module 221 corresponding to each pixel group 1 outputs a sampling control signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX12 211 during the first scanning period of the second pixel row, and outputs a stop sampling signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX11 211, the pixel driving circuit PX21 211, and the pixel driving circuit PX22 211. The pixel driving circuit PX12 211 drives the pixels to emit light based on the pixel data, and so on.

[0114] Further, the sampling control module 221 corresponding to each pixel group 1 outputs a sampling control signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX22 211 during the second scanning period of the second pixel row, and outputs a stop sampling signal to the sample-and-hold circuit 212 connected to the pixel driving circuit PX11 211, the pixel driving circuit PX21 211, and the pixel driving circuit PX21 211. The pixel driving circuit PX22 211 drives the pixels to emit light based on the pixel data. Further, the sample-and-hold circuit 212 connected to the pixel driving circuit PX11 211, the pixel driving circuit PX21 211, and the pixel driving circuit PX12 211 continuously outputs the pixel data. This is repeated until the pixel driving circuit PXmn 211 drives the pixels to emit light based on the pixel data.

[0115] In summary, the display device comprises a display module and a driving IC. The display module comprises a plurality of pixels, and a pixel driving circuit and a sample-and-hold circuit of each pixel. The plurality of pixels are divided into at least one pixel group according to at least two columns of pixels as a group, so that the driving IC can control the sample-and-hold circuit of at least two pixels in the pixel row of each pixel group in the row scanning period of any pixel row, sequentially collect the pixel data output by the driving IC, so that the sample-and-hold circuit can output the pixel data to the pixel driving circuit, and the pixel driving circuit drives the pixel to emit light based on the pixel data.

[0116] In the technical solution, the driving IC can drive the one column of pixels in the pixel row to emit light by simultaneously controlling each pixel group, so as to realize the driving of the single row of pixels by sequentially controlling the multiple columns of pixels in the pixel row of each pixel group. In this way, the driving IC can output the pixel data of the same pixel group according to the emission sequence of the pixels in the same pixel group, effectively reduce the number of output channels of the driving IC, realize the demultiplexing function on the driving IC, save the demultiplexing module on the display module, reduce the frame area for covering the demultiplexing module, realize the narrow frame requirement of the display device, reduce the frame area of the display device, and effectively avoid the increase of the thickness of the display device.

[0117] Further, the sample-and-hold circuit can continuously output the pixel data of the pixel. Therefore, during the refresh process of the single row of pixels, when the unemitting pixel is refreshed, the input end of the pixel driving circuit of the emitting pixel will also receive the pixel data output by the sample-and-hold circuit. This avoids the suspension state of the input end of the pixel driving circuit of the emitting pixel due to the waiting of the emitting pixel for the refresh of the unemitting pixel. Moreover, the suspension state of the circuit in the mobile terminal has a great influence on the anti-EMI ability and EMS ability. Therefore, the technical solution of the present application can effectively improve the anti-EMI ability and EMS ability of the electronic device.

[0118] The present application also provides an electronic device comprising a device body and the display device provided by the embodiments of the present application. Optionally, the electronic device comprises the display device shown in Figure 2 、 Figure 4 or Figure 8 The display device can be installed on the device body. Since the electronic device comprises the display device provided by the embodiments of the present application, the electronic device has the same beneficial effects as the display device provided by the embodiments of the present application, which will not be repeated here.

[0119] In the description of the application, reference has been made to descriptive terms such as "one embodiment", "some embodiments", "an embodiment", "example", "specific example" or "some examples" etc. It is emphasized that each of these terms refers to a specific feature, structure, material or characteristic described in connection with a particular embodiment or example. The descriptive terms are not necessarily referring to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0120] While the embodiments of the application have been shown and described, it is to be understood that the embodiments described are only by way of example and that various changes, modifications, substitutions and alterations can be made thereto without departing from the spirit and scope of the application as defined in the claims and their equivalents.

Claims

1. A display device, characterized by comprising: The display device comprises a display module and a driving integrated circuit; The display module comprises a plurality of pixels, and a pixel driving circuit and a sample-and-hold circuit corresponding to each pixel, the plurality of pixels are divided into at least one pixel group according to at least two columns of pixels as a group; the pixel driving circuit corresponding to each pixel is connected with the driving integrated circuit through the sample-and-hold circuit; The driving integrated circuit is used for controlling the sample-and-hold circuit corresponding to at least two pixels in the pixel row of each pixel group to sequentially collect pixel data output by the driving integrated circuit within the row scanning period of any pixel row. The sample-and-hold circuit is used for outputting the pixel data to the pixel driving circuit. The pixel driving circuit is used for driving the pixel to emit light based on the pixel data.

2. The display device according to claim 1, wherein The row scanning period of a single row of pixels is divided into at least two scanning periods corresponding to each column of pixels in a single pixel group; The driving integrated circuit comprises a sample control module; The sample control module is connected with the sample-and-hold circuit of each pixel, and is used for outputting a sample control signal to the sample-and-hold circuit of a different pixel in the pixel row of each pixel group within each scanning period of any pixel row. The sample-and-hold circuit is used for receiving the pixel data output by the driving integrated circuit when the sample control signal is received.

3. The display device according to claim 2, wherein The driving integrated circuit comprises the sample control module corresponding to the pixel group; Each sample control module is connected with the sample-and-hold circuit of each pixel in the corresponding pixel group, and is used for outputting a sample control signal to the sample-and-hold circuit of a different pixel in the pixel row of the pixel group within each scanning period of any pixel row.

4. The display device according to claim 3, wherein Each sample control module has at least two signal output end groups, and each signal output end group corresponds to a column of pixels, at least one signal output end in each signal output end group is connected with the sample-and-hold circuit of the corresponding column of pixels; Each sample control module is also used for outputting the sample control signal to the sample-and-hold circuit of a different column of pixels in the pixel group within each scanning period of any pixel row. The pixel driving circuit is used for driving the pixel to emit light based on the received pixel data within the row scanning period of the connected pixel.

5. The display device according to claim 4, wherein Each signal output end group comprises one signal output end, and each signal output end is connected with the sample-and-hold circuit of the corresponding column of pixels.

6. The display device according to claim 2, wherein The sample control module is also used for outputting a stop sampling signal to the sample-and-hold circuit of other pixels in the pixel row of each pixel group within each scanning period of any pixel row; The sample-and-hold circuit is also used for receiving the pixel data output by the driving integrated circuit when the sample control signal is received, and outputting the pixel data to the pixel driving circuit, and outputting the pixel data collected in the previous time to the pixel driving circuit when the stop sampling signal is received.

7. The display device according to claim 4 or 5, wherein Each of the sampling control modules is further configured to output a stop sampling signal to the sample-and-hold circuits of other column pixels in the pixel group in each of the scanning periods of any pixel row. The sample-and-hold circuits are further configured to receive the pixel data output by the driving integrated circuit and output the pixel data to the pixel driving circuit upon receiving the sampling control signal, and output the pixel data collected in the previous time to the pixel driving circuit upon receiving the stop sampling signal.

8. The display device according to claim 7, wherein The plurality of pixels comprises n×m pixels, each of the pixel groups comprises first column pixels and second column pixels, and the row scanning period comprises a first scanning period and a second scanning period; the driving integrated circuit comprises m / 2 sampling control modules; Each of the sampling control modules is configured to output the sampling control signal to the sample-and-hold circuits of the first column pixels and output the stop sampling signal to the sample-and-hold circuits of the second column pixels in the first scanning period. Each of the sampling control modules is further configured to output the stop sampling signal to the sample-and-hold circuits of the first column pixels and output the sampling control signal to the sample-and-hold circuits of the second column pixels in the second scanning period.

9. The display device according to claim 3, wherein Each of the pixel groups comprises at least two column pixels in at least two rows of pixels; and the driving integrated circuit further comprises a scanning enable module; The scanning enable module is connected with each of the sampling control modules and configured to output an image processing signal to the sampling control module corresponding to a target pixel group in the row scanning period of any pixel row, the image processing signal indicating each of the scanning periods in the row scanning period, and the target pixel group comprising pixels in the pixel row. Each of the sampling control modules is configured to output a sampling control signal to the sample-and-hold circuit of a different pixel in the pixel row in each of the scanning periods indicated by the image processing signal.

10. An electronic device, comprising: The electronic device comprises a device main body and the display device of any one of claims 1 to 9.

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