Circuit board capable of keeping continuous impedance at bonding pad
By setting up compensating pads near the pads and using a multilayer board structure, the problem of low pad impedance was solved, achieving impedance continuity at the pads and improving signal quality, thus ensuring the stability and efficiency of signal transmission.
Patent Information
- Application Number
- CN202520251014.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-18
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2035-02-18
AI Technical Summary
The large pad size of BGA packages and the relatively large volume of chip solder balls result in low impedance at the pads, affecting impedance continuity and signal quality in high-speed signal transmission.
Compensation pads are set near the initial pads, and electrical connections are formed through traces of preset line widths. Differential signal lines with preset impedances are led out to ensure impedance continuity at the pads. A multi-layer board and insulating board structure is adopted, and prepreg and core board materials are used for bonding and electrical insulation.
It improves impedance consistency at the pads, reduces signal reflection and attenuation, enhances the integrity and efficiency of the signal link, and ensures signal quality.
Smart Images

Figure CN223584413U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to PCB design technical field, especially a kind of circuit board for keeping impedance continuous at pad. BACKGROUND
[0002] In high-speed optical module, Ball Grid Array (BGA) package form Digital Signal Processor (DSP) chip is widely used in signal processing process. The impedance of high-speed differential signal on DSP chip is usually 90-100 ohms, while the pad size of BGA package is large and the chip solder ball has a certain volume, which leads to low impedance at the pad, i.e. impedance lower than 90 ohms. This impedance discontinuity will cause return loss due to impedance change during high-speed signal transmission, thereby affecting the performance of optical module.
[0003] Therefore, it is urgent to overcome the defects of the prior art in the technical field. UTILITY MODEL CONTENT
[0004] The utility model solves the problem of low impedance at the pad due to large pad size and certain volume of chip solder ball in BGA package.
[0005] The utility model adopts the following technical solutions:
[0006] On the one hand, the utility model provides a kind of circuit board for keeping impedance continuous at pad, comprising: multilayer layer board and multilayer insulating plate, each layer of the insulating plate is arranged between two layers of the layer board, the layer board on the first layer and the second layer is provided with initial pad 1 and compensation pad 2, the initial pad 1 and the corresponding compensation pad 2 are electrically connected by the wire of preset line width, and the differential signal line of preset impedance is led out from the compensation pad 2, the compensation pad 2 is used to keep the impedance continuity at the initial pad 1.
[0007] Preferably, the number of layer boards is 10, and the total thickness is 1mm±0.1mm.
[0008] Preferably, the insulating plate is a semi-cured sheet or a core plate, the core plate is located between the layer boards on the fourth layer and the fifth layer, and the sixth layer and the seventh layer, and the insulating plates arranged between the remaining layer boards are semi-cured sheets.
[0009] The thickness of the semi-cured sheet is 70μm±1μm, 90μm±1μm or 105μm±1μm, and the thickness of the core plate is 50μm±1μm.
[0010] Preferably, the preset impedance is 90Ω-100Ω.
[0011] Preferably, the diameter of the compensation pad 2 is 0.2mm±0.001mm.
[0012] Preferably, the distance between the center of the compensation pad 2 and the center of the initial pad 1 is 0.35mm±0.001mm.
[0013] Preferably, the distance between two adjacent compensation pads 2 is 0.5mm±0.001mm.
[0014] Preferably, the distance between two adjacent initial pads 1 is 0.5mm±0.001mm.
[0015] Preferably, the line width of the trace from the initial pad 1 to the compensation pad 2 is 3mil±0.01mil.
[0016] Preferably, the second layer and the third layer of the layer plate are provided with a reverse pad 3, which is located at the lowermost of the initial pad 1; the length of the reverse pad 3 is 0.72mm±0.01mm, and the width is 1.25mm±0.01mm.
[0017] Compared with the prior art, the beneficial effects of the present application are that: by setting the compensation pad 2 near the initial pad 1, the impedance at the BGA pad can reach more than 90 ohms, thereby greatly improving the impedance consistency in the high-speed signal link, which helps to reduce the problems of signal reflection, attenuation and overall signal quality decline caused by impedance mismatch or discontinuity, and through fine control of the pad layout and impedance matching, the adverse effects caused by small impedance can be effectively reduced, and the integrity and efficiency of the signal link are guaranteed. BRIEF DESCRIPTION OF DRAWINGS
[0018] In order to more clearly illustrate the technical scheme of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.
[0019] Figure 1 is a whole schematic view of the BGA pad of the circuit board for keeping the impedance continuous at the pad provided by the embodiments of the present application on the PCB;
[0020] Figure 2 is a compensated PCB schematic view of the circuit board for keeping the impedance continuous at the pad provided by the embodiments of the present application;
[0021] Figure 3is a schematic diagram of a reverse pad of a circuit board keeping impedance continuous at a pad provided by the embodiment of the utility model;
[0022] Figure 4 is a schematic diagram of a layer plate design of a circuit board keeping impedance continuous at a pad provided by the embodiment of the utility model;
[0023] Figure 5 is a schematic diagram of an impedance curve of a circuit board keeping impedance continuous at a pad before optimization provided by the embodiment of the utility model;
[0024] Figure 6 is a schematic diagram of an impedance curve of a circuit board keeping impedance continuous at a pad after optimization provided by the embodiment of the utility model. DETAILED DESCRIPTION
[0025] In order to make the purpose, technical scheme and advantages of the utility model more clearly, the following will be further described in detail by combining with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the utility model, and are not used to limit the utility model.
[0026] Unless otherwise required by context, the term "comprises" in the specification and claims is to be construed as open-ended, i.e. as "comprises but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example" or "some examples" are intended to mean that the specific feature, structure, material or characteristic associated with that embodiment or example includes in at least one embodiment or example of the present disclosure. The illustrative representation of the above terms does not necessarily mean the same embodiment or example. In addition, the specific features, structures, materials or characteristics described can be included in any one or more embodiments or examples in any appropriate manner, i.e. although they are carried in the embodiment or example of the above terms due to the order of appearance and location, they are not limited to the combination of one embodiment or example.
[0027] In the description of the utility model, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate the orientation or positional relationship shown in the drawings, and are only used to facilitate the description of the present disclosure and simplify the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.
[0028] In the description of the utility model, the terms "first", "second" are only used for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more features. In the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "a plurality of" is two or more. In addition, for example, in the description, the same type of nouns will also be described as two independent individuals by adding "A", "B" at the end, in which case the features limited by "A", "B" are only used for the purpose of distinguishing the same type of individual description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
[0029] In describing some embodiments, "coupled", "coupled", and "connected" and their derivatives can be used. For example, the term "connected" can be used to describe some embodiments to indicate that two or more components have direct physical or electrical contact with each other. For another example, the term "coupled" can be used to describe some embodiments to indicate that two or more components have direct physical or electrical contact. However, the term "connected" or "coupled" can also refer to two or more components that do not have direct contact with each other, but still cooperate or interact with each other, such as "optical coupling", "wireless connection", etc. The embodiments disclosed herein are not necessarily limited to the content of the utility model.
[0030] In the description of the utility model, the expression "A and / or B" (wherein A and B are used to represent specific feature content) can be used, and the corresponding expression includes the following three combinations: only A, only B, and the combination of A and B.
[0031] In the utility model, "about", "approximately" or "approximately" includes the value described and the average value within the acceptable deviation range of the specific value, wherein the acceptable deviation range is determined by the person skilled in the art considering the measurement being discussed and the error related to the measurement of the specific quantity (i.e. the limitation of the measurement system).
[0032] In addition, the technical features involved in each embodiment of the utility model described below can be combined with each other as long as there is no conflict.
[0033] Embodiment 1:
[0034] The utility model embodiment 1 provides a kind of circuit board for keeping pad impedance continuity, such as Figure 1 And Figure 2As shown, it comprises: a plurality of layers of laminates and a plurality of layers of insulating boards, each layer of the insulating board is arranged between two layers of the laminates, the initial pad 1 and the compensation pad 2 are arranged on the laminates of the first layer and the second layer, the initial pad 1 and the corresponding compensation pad 2 are electrically connected through the trace with a preset line width, and the differential signal line with a preset impedance is led out from the compensation pad 2, the compensation pad 2 is used to maintain the impedance continuity at the initial pad 1 and improve the impedance at the initial pad 1. Wherein, the insulating board is a prepreg or a core board. Figure 1 It is a schematic diagram of the BGA pad on the printed circuit board (PCB), Figure 2 It is a schematic diagram of the BGA pad on the printed circuit board (PCB), Figure 1 It is a schematic diagram of the BGA pad on the printed circuit board (PCB),
[0035] Wherein, the initial pad 1 refers to the BGA pad that needs to pass high-speed differential signals; the preset impedance is 90Ω-100Ω; the line width of the trace from the initial pad 1 to the compensation pad 2 is 3mil±0.01mil, which is the preset line width.
[0036] The prepreg, also known as pre-impregnated material, is a thin sheet material impregnated and cured to an intermediate degree (B stage) with resin. During the PCB lamination process, the epoxy resin of the prepreg will melt, flow and solidify, thereby bonding the circuit layers together to form a reliable interlayer bond. In addition, as a kind of dielectric material, the prepreg is sandwiched between two laminates, providing the necessary electrical insulation to ensure that there is no electrical short circuit between different circuit layers on the PCB. The core board is the middle layer in the multi-layer PCB structure, usually made of insulating materials such as epoxy resin or polyimide, and has conductive circuit patterns printed on it, which can be electrically connected to the circuit patterns of other layers, thereby realizing electrical interconnection between multi-layer boards. In addition to electrical connection, the core board also serves to maintain the overall structural strength of the PCB.
[0037] By arranging the compensation pad 2 near the initial pad 1, the impedance at the BGA pad can reach 90 ohms or more, thereby greatly improving the impedance consistency in the high-speed signal link, ensuring that the impedance variation encountered by the signal during transmission is controlled within a minimum range, which helps to reduce signal reflection, attenuation and overall signal quality degradation caused by impedance mismatch or discontinuity. By fine-tuning the pad layout and impedance matching, the adverse effects caused by small impedance can be effectively reduced, and the integrity and efficiency of the signal link can be ensured.
[0038] As shown in the figure, Figure 3As shown, the second layer and the third layer of the layer plate are provided with a reverse pad 3 which is located at the lowermost of the initial pad 1; the length of the reverse pad 3 is 0.72 mm ± 0.01 mm, and the width is 1.25 mm ± 0.01 mm.
[0039] In the design stage of the PCB, passive simulation can be performed in the HFSS software, and by adjusting the parameters of the compensation pad 2, the wire and the reverse pad 3, the simulation result can meet the design requirements, so as to optimize the design of the PCB; in actual production, the optimized PCB is measured to verify whether the passive indicators of the high-speed signal meet the design requirements, so as to ensure the reliability of the design. The reverse pad 3 is also called an isolation pad, and the reverse pad 3 refers to a specific area or design concept for controlling the hole and copper spacing on the inner layer of the PCB in the PCB design, which is usually consistent with the overall material of the PCB. In the PCB design, especially in the PCB negative process, the reverse pad 3 is used to control the hole and copper spacing on the layer plate and the insulating plate of the PCB to prevent short circuit between the copper and the hole. Through the above technical means, the technical scheme can effectively solve the problems existing in the prior art, ensure the continuity of the impedance at the BGA pad, thereby reducing the signal loss caused by the discontinuity of the impedance, and improving the performance of the optical module.
[0040] In this embodiment, taking the application scenario of a 10-layer second-order high-density interconnect (HDI) PCB with a total thickness of 1 mm and a Panasonic M6(G) board as an example, modeling and simulation are first performed in the HFSS software, and the design scheme shown in Figure 4 can be obtained.
[0041] In one embodiment, referring to Figure 4 As shown, the number of layer plates is 10 layers, and the total thickness is 1 mm ± 0.1 mm. The insulating plate is a semi-solid sheet or a core plate, the core plate is located between the fourth layer and the fifth layer, and between the sixth layer and the seventh layer, and the insulating plate between the remaining layer plates is the semi-solid sheet; the thickness of the semi-solid sheet is 70 μm ± 1 μm, 90 μm ± 1 μm or 105 μm ± 1 μm, and the thickness of the core plate is 50 μm ± 1 μm. The model number of the semi-solid sheet is one of M6(G)1*1078(RC64), M6(G)1*1080(RC64) or M6(G)1*1078(RC72); the model number of the core plate is M6(G)1*1035.
[0042] The material of the fourth layer, the fifth layer and the sixth layer is copper foil (copper), and the material of the rest of the layers can be copper (STD), wherein STD stands for Standard Electrolytic Copper Foil (STD for short), which has good electrical conductivity, is easy to etch, and can effectively shield electromagnetic signals and microwave interference. In addition, it also has the characteristics of flat plate type, which can be perfectly laminated with other materials.
[0043] In one embodiment, the weight of the layer plate is one of 1 / 3 oz or 0.5 oz. As Figure 4 The weight of the first layer plate is 1 / 3 oz + plating, as shown in the formula, wherein 1 / 3 oz refers to the weight of the copper foil being one third of an ounce, which is approximately equal to 9.4 grams (the specific weight may vary slightly due to manufacturing process, material purity, etc.); plating is a layer of metal or non-metal material applied to the surface of the copper foil to improve its corrosion resistance, wear resistance, electrical conductivity or other properties. 1 / 3 oz + plating indicates that a layer of plating has been applied to the surface of the copper foil, and the plating material can be one of nickel, gold or tin. Different plating materials have different properties and uses, for example, nickel plating has good corrosion resistance and mechanical properties, and gold plating has excellent electrical conductivity and oxidation resistance. The prepreg is made of one of M6(G) type 1*1078 (RC72), 1*1080 (RC64) or 1*1078 (RC64), and the core plate is made of M6(G) type 1*1035.
[0044] In this embodiment, the weight of the first layer plate to the third layer plate is 1 / 3 oz, the weight of the fourth layer plate to the seventh layer plate is 0.5 oz, the weight of the eighth layer plate to the tenth layer plate is 1 / 3 oz, the core plate is arranged between the fourth layer plate and the fifth layer plate, and between the sixth layer plate and the seventh layer plate, and the insulating plate arranged between the rest of the adjacent layer plates is a prepreg.
[0045] As Figure 2 As shown in the formula, the diameter of the compensation pad 2 is 0.2 mm ± 0.001 mm; the distance between the center of the compensation pad 2 and the center of the initial pad 1 is 0.35 mm ± 0.001 mm; the distance between two adjacent compensation pads 2 is 0.5 mm ± 0.001 mm; the distance between two adjacent initial pads 1 is 0.5 mm ± 0.001 mm.
[0046] As Figure 5 As shown in the formula, the PCB impedance curve before optimization is not optimized, as Figure 6The PCB impedance curve shown is produced by the above scheme, compared with the PCB without optimization, the impedance at the initial pad 1 after optimization can reach more than 90 ohms, and the impedance at the BGA pad of the PCB without optimization is only 75 ohms, and the PCB actual measurement also confirms that the passive index of the high-speed signal after the optimization of the compensation pad 2 is better.
[0047] The above merely describes preferred embodiments of the present application and is not intended to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A circuit board that maintains impedance continuity at the pads, characterized in that, include: The system comprises a multilayer board and a multilayer insulating board, with each insulating board disposed between two layers of the board. An initial pad (1) and a compensation pad (2) are disposed on the first and second layers of the board. The initial pad (1) and the corresponding compensation pad (2) are electrically connected by traces of a preset line width, and a differential signal line with a preset impedance is led out from the compensation pad (2). The compensation pad (2) is used to maintain the impedance continuity at the initial pad (1).
2. The circuit board for maintaining impedance continuity at the pads according to claim 1, characterized in that, The number of layers is 10, and the total thickness is 1mm ± 0.1mm.
3. The circuit board for maintaining impedance continuity at the pads according to claim 2, characterized in that, The insulating board is a prepreg or a core board. The core board is located between the fourth and fifth layers, and between the sixth and seventh layers. The insulating board between the remaining layers is a prepreg. The thickness of the prepreg is 70μm±1μm, 90μm±1μm, or 105μm±1μm, and the thickness of the core board is 50μm±1μm.
4. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The preset impedance is 90Ω to 100Ω.
5. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The diameter of the compensation pad (2) is 0.2 mm ± 0.001 mm.
6. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The distance between the center of the compensation pad (2) and the center of the initial pad (1) is 0.35mm ± 0.001mm.
7. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The distance between two adjacent compensation pads (2) is 0.5mm ± 0.001mm.
8. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The distance between two adjacent initial pads (1) is 0.5mm ± 0.001mm.
9. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The trace width from the initial pad (1) to the compensation pad (2) is 3mil ± 0.01mil.
10. The circuit board for maintaining impedance continuity at the pads according to any one of claims 1-3, characterized in that, The second and third layers are provided with anti-pads (3), which are located at the bottom of the initial pads (1); the length of the anti-pads (3) is 0.72mm ± 0.01mm and the width is 1.25mm ± 0.01mm.