Main control module based on Feiteng D2000

Abstract

The utility model relates to a master control module based on Feiteng D2000. The master control module takes Feiteng D2000 as a core, adopts a standard 3U VPX architecture design, carries 8GB DDR4 storage particles, and outputs an SGMII gigabit Ethernet interface, a three-way isolation CAN interface, a three-way isolation RS232 interface, a one-way debugging RS232 interface, a two-way PCIe 3.0 X8 bus interface and a two-way PCIe 3.0 X4 bus interface, and all external communication interfaces are led out through a VPX connector. The main control module is provided with a domestic Kylin operating system. And all selected components and operating systems realize 100% localization. The master control module developed by the utility model can realize the functions of data processing, information interaction, external communication and the like, and can be applied to the fields of industrial control, vehicle-mounted control and the like.

Description

TECHNICAL FIELD

[0001] The utility model relates to a kind of main control module of Feiteng D2000, applied in industrial control, vehicle-mounted control and the like field, specifically relates to a kind of main control module based on Feiteng D2000. BACKGROUND

[0002] D2000 is a domestic high-performance processor, with powerful computing ability and self-controllable performance. It adopts advanced architecture design, ensures the efficiency and stability of processor in the operation process, and is the representative of self-reliance and self-strength in the field of information technology in China.

[0003] D2000 is the first processor supporting 8-core desktop platform of Feiteng, integrates 8 high-performance cores FTC663 independently developed by Feiteng, compatible with 64-bit ARMv8 instruction set, supports double-channel DDR4-2666 memory, built-in SM2 / SM3 / SM4 / SM9 acceleration engine of national secret, supports single-precision, double-precision floating-point operation instruction, main frequency 2.3GHz, manufactured by 14nm process, integrates 8.8 billion logic gates, core area 12.7x10.4=132 square millimeters.

[0004] There is no main control module with Feiteng D2000 as the core in prior art. CONTENT OF UTILITY MODEL

[0005] To solve the above technical problems, the utility model provides a kind of main control module of Feiteng D2000. Main control module takes Feiteng D2000 as core, adopts standard 3U VPX structure design, carries 8GB DDR4 storage particles, and installs a piece of 512GB SSD solid state disk through M.2 NVMe hard disk interface. Main control module exports 1-way SGMII gigabit ethernet interface, 3-way isolated CAN interface, 3-way isolated RS232 interface, 1-way debugging RS232 interface, 2-way PCIe3.0 X8 bus interface and 2-way PCIe3.0 X4 bus interface, and all external communication interfaces are led out through VPX connector. The main control module installs domestic Galaxy Kirin operating system, can realize data processing, information interaction and external communication and the like functions, and can be applied in industrial control, vehicle-mounted control and the like field.

[0006] To achieve the above functions, the technical scheme of the utility model is as follows: a main control module based on Feiteng D2000, the main control module adopts Feiteng D2000, adopts standard 3U VPX structure, on-board 8GB DDR4 storage particles, install a piece of 512GB SSD solid state disk through M.2 NVMe hard disk interface, the main control module exports 1 way SGMII gigabit ethernet interface, 3 way isolated CAN interface, 3 way isolated RS232 interface, 1 way debugging RS232 interface, 2 way PCIe3.0 X8 bus interface and 2 way PCIe3.0 X4 bus interface, all external communication interfaces are led out through VPX connector.

[0007] Beneficial effects:

[0008] The main control module developed by the utility model can realize data processing, information interaction and external communication functions, and can be applied to industrial control, vehicle-mounted control and other fields. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 The utility model relates to a kind of main control module based on Feiteng D2000. DETAILED DESCRIPTION

[0010] The technical scheme in the embodiments of the utility model will be described clearly and completely in conjunction with the drawings in the embodiments of the utility model, apparently, the described embodiments are only a part of the embodiments of the utility model, not all the embodiments, based on the embodiments in the utility model, all other embodiments obtained by the ordinary skill in the art without creative labor are within the protection scope of the utility model.

[0011] According to the embodiment, the main chip of the main control module based on Feiteng D2000 of the utility model is composed of D2000, memory CXDQ3BFAM-IJ-A, CAN transceiver NCA1042-DSPR, 232 transceiver SM3232AE, isolation NSI8220N, network controller WX1860AL2, PHY chip YT8521SH, CPLD chip GW1N-LV4PG256C6 / I5, MCU chip GD32F407VGT6, clock generator AU5329, temperature sensor DS18B20U, current sensor SC810DFT and voltage monitoring chip SM2990.

[0012] Fengyun D2000 is connected with 8 DDR4 memory particles through 2 DDR controllers integrated internally; Fengyun D2000 is connected with 1 M.2 NVMe hard disk interface through 1 PCIe3.0 X1 bus integrated internally; D2000 is connected with 2 PCIe3.0 X8 buses to VPX connector through 2 PCIe3.0 interfaces integrated internally; D2000 is connected with 2 PCIe3.0 X4 buses to VPX connector through 2 PCIe3.0 interfaces integrated internally; D2000 is connected with 1 PCIe3.0 X1 bus and network controller through 1 PCIe3.0 interface integrated internally; D2000 is connected with 4 UART signals through level conversion and isolation and RS232 transceiver through 4 UART interfaces integrated internally; D2000 is connected with 3 CAN signals through level conversion and isolation and CAN transceiver through 3 CAN controllers integrated internally.

[0013] D2000 is internally integrated with 2 64-bit DDR4 controllers LMU0 and LMU1, each memory controller is mounted with 4 16-bit DDR4 memory particles, DDR4 memory particles are selected from CXDQ3BFAM-IJ-A, memory rate is 2666Mbps, single-chip memory particle capacity is 8Gb, a total of 8 chips are mounted, and total memory capacity is 8GB.

[0014] The D2000 outputs 1 PCIe3.0 X1 bus through the M.2 NVMe hard disk interface to expand a 512GB SSD solid state disk for installing an operating system.

[0015] The 3 CAN controller output signals of the D2000 are first isolated by the isolation chip NSI8220N, and then output to the CAN transceiver NCA1042-DSPR to convert the CAN protocol signal and output to the VPX connector.

[0016] The 1 SGMII gigabit Ethernet interface is realized by the D2000 through an externally mounted network controller. The network controller is selected from the gigabit Ethernet controller WX1860AL2. The D2000 chip communicates with the WX1860AL2 through the PCIe x1 interface. The WX1860AL2 realizes the output of 1 SGMII interface to the VPX connector by externally mounting the PHY chip YT8521SH through the RGMII interface.

[0017] The 3 isolated RS232 interfaces are isolated in a capacitive isolation manner, the isolation uses the NSI8220N chip, and the RS232 transceiver uses the SM3232AE chip. The UART signal output by the D2000 is transmitted to the RS232 transceiver after being isolated by the capacitive isolation chip, and is output to the VPX connector by the RS232 transceiver.

[0018] The main control module is clocked with a common source, and an AU5329 is selected as a clock generator.

[0019] The MCU chip of the main control module is selected as a GD32F407VGT, the MCU chip is connected with the remaining boards in the case through an I2C bus as a 3U case management unit, the MCU chip of the main control module is selected as a GD32F407VGT, the MCU chip is connected with a voltage monitoring chip SM2990 through the I2C bus, the MCU chip is connected with a temperature monitoring chip DS18B20U, the MCU chip reads the pull-up and pull-down states of GA on the P0 of the VPX connector, and the MCU chip is connected with a current detection chip SC810DFT. The MCU of the main control module is powered on and starts to work through a 3V3_AUX power supply signal, then the 12V power supply of the main control module is powered on and powered off, then the remaining boards in the case are powered on and powered off through an I2C power-on and power-off command, the MCU of the main control module monitors the internal voltage of the board by using the SM2990, and the internal temperature of the board is monitored by using the DS18B20U, when the temperature is too high to reach a threshold, the MCU controls the system to be powered off; the MCU chip of the main control module judges the remaining board slots in the case by reading the pull-up and pull-down states of GA on the P0 of the VPX connector. The chip SC810DFT detects the 12V current on the board.

[0020] The main control module takes Feiteng D2000 as a core, adopts a standard 3U VPX structure design, carries an 8GB DDR4 storage particle, and installs a 512GB SSD solid state disk through an M.2 NVMe hard disk interface. The main control module outputs one SGMII gigabit Ethernet interface, three isolated CAN interfaces, three isolated RS232 interfaces, one debugging RS232 interface, two PCIe3.0 X8 bus interfaces and two PCIe3.0 X4 bus interfaces, and all the external communication interfaces are led out through a VPX connector. The main control module is installed with a domestic Galaxy Kirin operating system.

[0021] The preferred embodiments of the utility model are explained above with reference to the drawings, however, it should be understood that the above description is only exemplary. Those skilled in the art can make various modifications and changes to the utility model without departing from the spirit and scope of the utility model. The protection scope of the utility model is defined by the appended claims.

Claims

1. A master control module based on Feiteng D2000, characterized in that: The master module adopts Feiteng D2000, adopts standard 3U VPX structure, on-board 8GB DDR4 memory particles, installs a 512GB SSD solid state disk through M.2 NVMe hard disk interface, and outputs 1 SGMII gigabit Ethernet interface, 3 isolated CAN interfaces, 3 isolated RS232 interfaces, 1 debugging RS232 interface, 2 PCIe3.0 X8 bus interfaces and 2 PCIe3.0 X4 bus interfaces outside the master module, and all external communication interfaces are led out through the VPX connector.

2. The master module based on Feiteng D2000 according to claim 1, characterized in that: Feiteng D2000 is connected with 8 DDR4 memory particles through 2 DDR controllers integrated inside; Feiteng D2000 connects 1 group of PCIe3.0 X1 bus with the M.2 NVMe hard disk interface through the PCIe3.0 interface integrated inside; Feiteng D2000 leads out 2 groups of PCIe3.0 X8 bus to the VPX connector through the PCIe3.0 interface integrated inside; Feiteng D2000 leads out 2 groups of PCIe3.0 X4 bus to the VPX connector through the PCIe3.0 interface integrated inside; Feiteng D2000 connects 1 group of PCIe3.0 X1 bus with the network controller through the PCIe3.0 interface integrated inside; Feiteng D2000 connects 4 UART signals after level conversion and isolation with the RS232 transceiver through the UART interface integrated inside; Feiteng D2000 connects 3 CAN signals after level conversion and isolation with the CAN transceiver through the CAN controller integrated inside.

3. The master module based on Feiteng D2000 according to claim 1, characterized in that: The Feiteng D2000 internally integrates 2 64-bit DDR4 controllers LMU0 and LMU1, each memory controller mounts 4 16-bit DDR4 memory particles, the DDR4 memory particles select CXDQ3BFAM-IJ-A, the memory rate is 2666Mbps, the single-chip memory particle capacity is 8Gb, a total of 8 chips are mounted, and the total memory capacity is 8GB.

4. The master module based on Feiteng D2000 according to claim 1, characterized in that: The master module expands a 512GB SSD solid state disk through the M.2 NVMe hard disk interface.

5. The master module based on Feiteng D2000 according to claim 1, characterized in that: The 3 isolated CAN interfaces are output signals of 3 CAN controllers of the Feiteng D2000, which are first isolated through the isolation chip NSI8220N and then output to the CAN transceiver NCA1042-DSPR to convert into CAN protocol signals and output to the VPX connector.

6. The master module based on Feiteng D2000 according to claim 1, characterized in that: The 1-way SGMII gigabit Ethernet interface is realized by the external network controller of Feiteng D2000, the network controller selects gigabit Ethernet controller WX1860AL2, Feiteng D2000 chip communicates with WX1860AL2 through PCIe x1 interface, and WX1860AL2 realizes one-way SGMII interface output by external PHY chip YT8521SH through RGMII interface. 7.The master module based on Feiteng D2000 according to claim 1, characterized in that: The 3-way isolated RS232 interface is isolated in a capacitance isolation mode, the isolation adopts NSI8220N chip, and the RS232 transceiver adopts SM3232AE chip; the RS232 interface is transmitted to the RS232 transceiver after being isolated by the capacitance isolation chip from the UART signal output by Feiteng D2000, and is outputted by the RS232 transceiver. 8.The master module based on Feiteng D2000 according to claim 1, characterized in that: All PCIe devices of the master module are clocked from the same source, and the clock generator selects AU5329 chip. 9.The master module based on Feiteng D2000 according to claim 1, characterized in that: The MCU chip of the master module selects GD32F407VGT, the MCU chip is connected with voltage monitoring chip SM2990 through I2C bus, the MCU chip is connected with temperature monitoring chip DS18B20U, the MCU chip reads the pull-up and pull-down states of GA* on P0 of VPX connector, and the MCU chip is connected with current detection chip SC810DFT. 10.The master module based on Feiteng D2000 according to claim 1, characterized in that: The master module of Feiteng D2000 adopts Galaxy Kirin desktop operating system.

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