Case communication backboard and case

Abstract

The utility model discloses a case communication backboard and a case, and the backboard comprises a main control module which is provided with a plurality of pairs of first differential pins and clock signal output pins; the plurality of sub-modules are provided with second differential pins and clock signal input pins; wherein the first differential pins and the second differential pins are connected in a one-to-one correspondence manner through communication lines; the input end of the clock fan-out module is connected with a clock signal output pin of the main control module; and the output end of the clock fan-out module is respectively connected with the clock signal input pins of the sub-modules. Through a differential communication and clock synchronization mechanism with strong anti-interference capability, efficient and synchronous communication between the main control module and all the sub-modules is ensured. Through cooperative work of accurate distribution of clock signals and transmission of differential communication signals with strong anti-interference capability, stable transmission of data can be ensured, and the delay or packet loss phenomenon can be avoided, so that the signal quality of data transmission is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronics, in particular to a case communication backboard and a case. BACKGROUND

[0002] With the increasing demand for data processing capability of modern computer and communication systems, the multi-card interconnection communication inside the case of the data acquisition system needs to support higher transmission rate and better signal integrity. In the field of superconductivity, such as superconducting material research, quantum computing, particle physics, etc., the requirements for the signal quality of the transmitted data are higher, and the traditional signal transmission method often has problems such as low data transmission rate, poor anti-interference ability, distance limitation, etc. Especially in the field of superconductivity, it is particularly important to adopt a technology suitable for high-speed signal transmission.

[0003] Therefore, how to improve the signal quality of the transmitted data of the data acquisition system becomes a technical problem to be solved.

[0004] However, the existing case communication backboard often does not fully consider the demand of high-speed data transmission, and there are also deficiencies in the design of power supply redundancy, clock synchronization, etc. CONTENT OF THE UTILITY MODEL

[0005] Therefore, the present application provides a case communication backboard and a case to solve the technical problem of how to improve the signal quality of the transmitted data of the data acquisition system in the related art.

[0006] The present application provides a case communication backboard, comprising: a master control module having a plurality of pairs of first differential pins and a clock signal output pin; a plurality of sub-modules having second differential pins and clock signal input pins; wherein the first differential pins and the second differential pins are connected one-to-one through communication lines; a clock fan-out module, the input end of the clock fan-out module is connected with the clock signal output pin of the master control module; the output end of the clock fan-out module is connected with the clock signal input pins of the sub-modules respectively.

[0007] In an embodiment, the first differential pins and the second differential pins are LVDS pins, and the communication lines are LVDS communication lines.

[0008] In an embodiment, a filter circuit is arranged one-to-one between the output end of the clock fan-out module and the clock signal input pins of the sub-modules, and between the input end of the clock fan-out module and the clock signal output pin of the master control module.

[0009] In an embodiment, the case communication backboard further comprises: a redundant power supply module connected with the power supply end of the master control module and the plurality of sub-modules, for supplying power to the master control module and the sub-modules.

[0010] In an embodiment, the redundant power module comprises: a main power input end, a backup power input end and a power switching circuit, wherein the main power input end is configured to be connected with a main power supply, and the backup power input end is configured to be connected with a backup power supply; the power switching circuit comprises a first branch and a second branch connected in parallel, wherein the first branch is connected with the main power input end, and the second branch is connected with the backup power input end.

[0011] In an embodiment, the power switching circuit comprises: a first diode connected in series with the first branch, and a second diode connected in series with the second branch, wherein a positive electrode of the first diode is connected with the main power input end, and a negative electrode of the first diode is connected with an output end of the power switching circuit; a positive electrode of the second diode is connected with the backup power input end, and a negative electrode of the second diode is connected with the output end of the power switching circuit.

[0012] In an embodiment, the chassis communication backboard further comprises: a signal isolation module, an input end of which is connected with the working state monitoring module, and an output end of which is connected with the main control module, and the signal isolation module is configured to feed back the monitoring parameter.

[0013] In an embodiment, the signal isolation module comprises an optoelectronic isolation module.

[0014] In an embodiment, the chassis communication backboard further comprises: a substrate, which carries the main control module, the plurality of sub-modules and the clock fan-out module.

[0015] According to a second aspect, the embodiments of the present application provide a chassis, comprising: a chassis body and a chassis communication backboard as described in any one of the first aspect above arranged on the chassis body.

[0016] The present application has at least the following beneficial effects:

[0017] In the chassis communication backboard provided by the present application, differential signal communication is adopted between the main control module and the sub-modules, which has strong anti-interference ability and long transmission distance, and can meet the demand of high-speed communication system. Moreover, the clock fan-out module has the characteristics of high precision and low jitter, and through the clock fan-out module, the clock signal output by the main control module can be distributed to all the sub-modules, so as to ensure that each sub-module in the system can receive the same clock signal, and the clock synchronization of all the sub-modules in the system is ensured, and data error or communication failure caused by inconsistent clock is avoided. Through the differential communication with strong anti-interference ability and the clock synchronization mechanism, the communication between the main control module and all the sub-modules is ensured to be efficient and synchronous. The accurate distribution of clock signal and the cooperative work of differential communication signal transmission with strong anti-interference ability can ensure stable transmission of data and avoid delay or packet loss phenomenon, so as to improve the signal quality of transmission data. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the specific embodiments or prior art in the present application, the drawings needed to be used in the description of the specific embodiments or prior art will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0019] Figure 1 is a modular schematic diagram of a chassis communication backplane provided by an embodiment of the present application;

[0020] Figure 2 is a circuit schematic diagram of a clock fan-out module in a chassis communication backplane provided by an embodiment of the present application;

[0021] Figure 3 is a modular schematic diagram of a chassis communication backplane provided by another embodiment of the present application;

[0022] Figure 4 is a circuit structure schematic diagram of a redundant power module in a chassis communication backplane provided by an embodiment of the present application;

[0023] Figure 5 is a circuit structure schematic diagram of another redundant power module in a chassis communication backplane provided by an embodiment of the present application;

[0024] Figure 6 is a circuit structure schematic diagram of a communication isolation module provided by an embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0026] According to an embodiment of the present application, a chassis communication backplane is provided, such as Figures 1 to 6As shown, the chassis communication backboard comprises: a master module 10 having a plurality of pairs of first differential pins and clock signal output pins; a plurality of sub-modules 20 having second differential pins and clock signal input pins; wherein the first differential pins and the second differential pins are connected one-to-one through communication lines; a clock fan-out module 30, the input end of the clock fan-out module 30 is connected with the clock signal output pin of the master module 10; the output end of the clock fan-out module 30 is connected with the clock signal input pin of the sub-module 20 respectively.

[0027] The master module 10 and the sub-module 20 can be installed on the substrate through the corresponding interface, in the embodiment, the substrate can adopt a PCB board, the master module 10 and the sub-module 20 adopt differential signal communication, which has strong anti-interference ability and long transmission distance, and can meet the demand of high-speed communication system. Moreover, the clock fan-out module 30 has the characteristics of high precision and low jitter, through the clock fan-out module, the clock signal output by the master module 10 can be distributed to all sub-modules 20, ensuring that each sub-module 20 in the system can receive the same clock signal, ensuring the clock synchronization of all sub-modules 20 in the system, avoiding data errors or communication failures caused by inconsistent clock. Through the differential communication with strong anti-interference ability and the clock synchronization mechanism, the communication between the master module 10 and all sub-modules 20 is efficient and synchronized. The accurate distribution of clock signal and the cooperative work of differential communication signal transmission with strong anti-interference ability can ensure the stable transmission of data and avoid delay or packet loss phenomenon, so as to improve the signal quality of transmission data.

[0028] In an embodiment, the first differential pin and the second differential pin are LVDS pins; the communication line is an LVDS communication line, that is, the master module 10 and the sub-module 20 adopt LVDS differential signal transmission mode, which can realize high-speed data transmission at a rate of 300Mbps. The LVDS signal line has strong anti-interference ability, supports long-distance transmission, and has stable signal quality, which is suitable for application scenarios of high-speed data exchange. In an alternative embodiment, the communication line can also be an MLVDS communication line, a copper core line such as a serial communication bus.

[0029] In an embodiment, as shown in the figure, Figure 2 A filter circuit 31 is arranged one-to-one between the output end of the clock fan-out module 30 and the clock signal input pin of the sub-module 20, and between the input end of the clock fan-out module 30 and the clock signal output pin of the master module 10. The filter circuit adopts a capacitor filter circuit, and can also adopt an RC filter circuit.

[0030] In an embodiment, in order to improve the reliability and fault tolerance of the system, in the embodiment, as shown in the figure, Figure 3As shown, the power supply is provided by the redundant power module 40, which in this embodiment can be provided by an uninterruptible power supply or a multi-power supply switching power supply, so that the system can still work normally when the main power supply is out of service, thereby improving the reliability of the system and avoiding system downtime caused by power supply failure.

[0031] In this embodiment, a multi-power supply switching power supply is taken as an example for illustration, as shown in Figure 4 The redundant power module 40 includes a main power input end 41, a backup power input end 42, and a power switching circuit 43. The main power input end 41 is connected to the main power supply, and the backup power input end 42 is connected to the backup power supply. The power switching circuit 43 includes a first branch 431 and a second branch 432 connected in parallel. The first branch 431 is connected to the main power input end 41, and the second branch 432 is connected to the backup power input end 42.

[0032] In this embodiment, as shown in Figure 4 The power switching circuit 43 can be a diode parallel power switching circuit. The first branch 431 is connected in series with a first diode D1, and the second branch 432 is connected in series with a second diode D2. The anode of the first diode D1 is connected to the main power input end 41, and the cathode of the first diode D1 is connected to the output end of the power switching circuit 43. The anode of the second diode D2 is connected to the backup power input end 42, and the cathode of the second diode D2 is connected to the output end of the power switching circuit 43. The power switching circuit 43 can automatically select according to the voltage of the main power supply and the backup power supply. In normal state, the voltage of the main power supply is slightly higher than that of the backup power supply, so that the first diode is turned on and the second diode is turned off. When the main power supply is out of service, the second diode is turned on and the backup power supply is used.

[0033] In an optional embodiment, the backup power supply can be one or multiple, and the power switching circuit 43 can be two, three or more branches connected in parallel. Each branch can be connected in series with a diode and connected to a power supply. The diode can be a general diode or a Schottky diode.

[0034] In another embodiment, as shown in Figure 5 The power switching circuit 43 can also be a control switch switching circuit. The first branch 431 is connected in series with a third diode D3, and the anode of the third diode D3 is connected to the main power input end 41. The cathode of the third diode D3 is connected to the output end of the power switching circuit 43. A control switch Q1 is connected in series between the backup power input end 42 and the output end of the power switching circuit 43, and the main power input end 41 is connected to the control end of the control switch Q1.

[0035] In this embodiment, the control switch Q1 can adopt a mos tube, an IGBT, etc. Take the mos tube as an example for description. The mos tube adopts a pmos tube. The drain of the pmos tube is connected with the standby power supply input end 42. The source of the pmos tube is connected with the output end of the power supply switching circuit. The gate of the pmos tube is connected with the main power supply input end 41. When the main power supply input end 41 has electricity, the pmos tube is cut off. Even if there is a body diode current flowing through, because the pmos tube will be higher than the supply voltage of the standby power supply, the Vgs of the pmos tube is greater than 0, so the body diode of the pmos tube is cut off. The output end of the power supply switching circuit 43 is supplied by the main power supply. When the main power supply is out of time, the pmos tube is turned on. The output end of the power supply switching circuit 43 is supplied by the standby power supply.

[0036] In an embodiment, the chassis communication backboard can further include a signal isolation module U1, which is connected with the working state monitoring module at the input end and connected with the main control module 10 at the output end, for feeding back monitoring parameters. In this embodiment, as shown in Figure 6 two isolated signal channels are designed on the communication backboard (one of which is shown in Figure 6 The signal isolation module U1 can adopt an optoelectronic isolation module, a capacitive isolation module, an inductive isolation module, or other communication isolation modules. The signal isolation module U1 effectively reduces the interference between signals and improves the accuracy and stability of signal transmission. The backboard provides two isolated signal channels for real-time feedback of system status or monitoring of key indicators such as temperature, voltage, current, fan speed, etc. When abnormal conditions are detected, the signal channel can feed back to the monitoring system in time, so as to perform early warning and fault diagnosis.

[0037] The embodiment of the present application also provides a chassis, which includes a chassis body and the chassis communication backboard described in the above embodiments arranged on the chassis body. The chassis internal communication backboard scheme in the present application can support LVDS high-speed communication, ensure clock synchronization of the system, realize dual power supply redundancy, and provide signal isolation and monitoring functions. Through the differential communication with strong anti-interference ability and the clock synchronization mechanism, the communication between the main control module 10 and all sub-modules 20 is efficient and synchronized. The cooperative work of accurate distribution of clock signals and differential communication signals with strong anti-interference ability can ensure stable transmission of data and avoid delay or packet loss phenomenon, so as to improve the signal quality of transmitted data.

[0038] In the above embodiments of the present application, the description of each embodiment has its own focus. The parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0039] The above merely preferred embodiments of the present application, it should be noted that for those of ordinary skill in the art, without departing from the principles of the present application, can make several improvements and refinements, these improvements and refinements should also be considered as the scope of protection of the present application.

Claims

1. A chassis communication backplane, characterized by, The application relates to a chassis communication backplane. The chassis communication backplane comprises a master module, a plurality of sub-modules, and a clock fan-out module. The master module comprises a plurality of pairs of first differential pins and a clock signal output pin. The plurality of sub-modules comprise second differential pins and clock signal input pins.

2. The chassis-communications backplane of claim 1, wherein, The first differential pins and the second differential pins are LVDS pins, and the communication lines are LVDS communication lines.

3. The chassis communication backplane of claim 1, wherein A filter circuit is arranged between the output end of the clock fan-out module and the clock signal input pin of the sub-module, and between the input end of the clock fan-out module and the clock signal output pin of the master module.

4. The chassis-communications backplane of claim 1, wherein, The application further relates to a chassis communication backplane. The chassis communication backplane comprises a redundant power module.

5. The chassis-communications backplane of claim 4, wherein, The redundant power module is connected to the power supply end of the master module and the plurality of sub-modules. The redundant power module comprises a main power input end, a backup power input end, and a power switching circuit. The main power input end is connected to a main power supply, and the backup power input end is connected to a backup power supply.

6. The chassis communications backplane of claim 5, wherein, The power switching circuit comprises a first branch and a second branch in parallel.

7. The chassis-communications backplane of claim 1, wherein, The first branch is connected to the main power input end, and the second branch is connected to the backup power input end. The first branch is connected in series with a first diode, and the second branch is connected in series with a second diode.

8. The chassis-communications backplane of claim 7, wherein, The anode of the first diode is connected to the main power input end, and the cathode of the first diode is connected to the output end of the power switching circuit.

9. The chassis-communications backplane of claim 1, wherein, The anode of the second diode is connected to the backup power input end, and the cathode of the second diode is connected to the output end of the power switching circuit. The application further relates to a chassis communication backplane.

10. A cabinet, characterized by The chassis communication backplane comprises a signal isolation module. The signal isolation module is connected to a working state monitoring module at an input end and is connected to the master module at an output end. The signal isolation module comprises an optoelectronic isolation module. The application further relates to a chassis communication backplane. The chassis communication backplane comprises a substrate. The chassis communication backplane comprises a chassis body and a chassis communication backplane arranged on the chassis body. The chassis communication backplane comprises a chassis body and a chassis communication backplane arranged on the chassis body.

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