RTC real-time clock
By employing a two-level register synchronization technique in the RTC design to synchronize asynchronous signals, the metastability problem in cross-clock domain signal processing is solved, achieving stable signal transmission and time accuracy, while reducing resource consumption and hardware costs.
Patent Information
- Application Number
- CN202423207651.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-25
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2034-12-25
AI Technical Summary
Existing RTC designs exhibit metastability in cross-clock domain signal processing, leading to signal state uncertainty, affecting time accuracy and stability. Furthermore, existing solutions are resource-intensive, complex in design, increase hardware costs, and reduce system reliability.
Asynchronous signal synchronization is achieved by employing a two-level register synchronization technique and by using the built-in cross-clock logic of the bus clock and the RTC high-precision clock to realize stable signal transmission in different clock domains.
It achieves stable signal transmission in different clock domains, saves resources and has a simple design, improves the time accuracy and stability of the RTC system, and reduces hardware costs.
Smart Images
Figure CN223598177U_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor device technology, and particularly relates to an RTC real-time clock. Background Technology
[0002] In the field of real-time clock (RTC) technology, as electronic devices become increasingly complex and diverse, the requirements for the accuracy and stability of clock systems are also increasing. RTCs play a crucial role in many electronic devices, providing precise time information.
[0003] Traditional RTC designs often have significant shortcomings in cross-clock domain signal processing. In the presence of multiple asynchronous clock domains, such as two asynchronous clock domains, improper signal interaction can lead to a series of serious problems. Because the clock signals in different clock domains have inconsistent frequencies and phases, metastability is highly likely to occur during signal transmission and interaction if cross-clock domain signals are not effectively synchronized. Metastability leads to uncertainty in signal states, potentially causing subsequent logic circuits to make incorrect judgments and operations, thus affecting the time accuracy and stability of the entire RTC system, and even potentially causing system failure or data errors in the entire electronic device. Furthermore, previous methods for solving cross-clock domain signal synchronization often suffer from excessive resource consumption and complex design structures, which not only increases hardware costs but also reduces system reliability and maintainability, hindering large-scale product deployment and application. Utility Model Content
[0004] To address the existing problems in the aforementioned background technology, this application provides an RTC real-time clock that uses a two-level register synchronization technique to synchronize asynchronous signals, saving resources and simplifying the design.
[0005] The technical solution is as follows:
[0006] An RTC real-time clock, comprising,
[0007] The bus clock, comprising the clock source, register set, and interrupt system, is used for interaction with bus data; specifically, for enabling and controlling the configuration of timer initial values and timing limits, as well as outputting interrupt and wake-up signals.
[0008] RTC high-precision clock, including a programmable counter, performs basic and advanced timer functions, and is used for clock division, counting, and calendar information generation, as well as...
[0009] It has built-in cross-clock logic, which supports dual clock domains of bus clock and RTC high-precision clock, and uses two-level register synchronization technology to synchronize asynchronous signals.
[0010] A further technical solution involves using a stable low-frequency crystal oscillator as the clock source for second counting.
[0011] In a further technical solution, the register group is used to store time and date information as well as various parameters for controlling the RTC real-time clock.
[0012] A further technical solution involves a register set that includes time-related registers and control-related registers.
[0013] A further technical solution involves a register group consisting of a startup register, a control register, a prescaler initial register, a calendar unit register, and an interrupt clear register.
[0014] A further technical solution is to use a programmable counter to count at any time unit according to the system settings.
[0015] A further technical solution includes a built-in prescaler.
[0016] A further technical solution involves converting software counter values into date and time.
[0017] The technical solution includes at least the following technical effects:
[0018] The RTC real-time clock of this application includes a bus APB clock and an RTC high-precision clock, and has built-in cross-clock domain logic to support the bus clock and the RTC high-precision clock. It saves resources and simplifies the design by using a two-level register synchronization module to synchronize asynchronous signals.
[0019] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit the present invention. Attached Figure Description
[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the present invention and, together with the description, serve to explain the principles of the present invention.
[0021] Figure 1 A schematic diagram of the structure of an RTC real-time clock provided in a preferred embodiment of this utility model;
[0022] Figure 2 This is a diagram of the internal structure of an RTC real-time clock provided in a preferred embodiment of the present invention. Detailed Implementation
[0023] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. In the following description, when referring to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this invention as detailed in the appended claims.
[0024] As attached Figure 1 As shown, the inputs to the RTC real-time clock are the bus clock and the RTC high-precision clock. The bus clock is used for enable control, configuring timer initial values and timing limits, and status output. The RTC high-precision clock is mainly used for basic and advanced timers to obtain more accurate time information. The RTC real-time clock has built-in cross-clock logic, supporting dual clock domains of the bus clock and the RTC high-precision clock. It uses a two-level register synchronization technique to synchronize asynchronous signals. Some signals propagate from one clock domain to another, i.e., cross-clock domain signals. When using such signals, two-level register latching is required in the clock domain being used, i.e., two-level register synchronization.
[0025] The Real-Time Clock (RTC) in this embodiment is a circuit used to provide precise time. It is primarily used to record and track time within the SoC chip, ensuring uninterrupted timekeeping. It supports both the bus clock and the high-precision RTC clock, with dual clock domains; the RTC counter has a 64-bit width; it supports timer functionality, generating an interrupt when the RTC timer matches the value in the match register; and it supports calendar functionality, requiring software to convert the timer values into date and time.
[0026] The Real-Time Clock (RTC) includes a bus clock source, a register set, an interrupt system, and a programmable counter for the RTC's high-precision clock. The clock source is a stable low-frequency crystal oscillator, which, through a series of frequency divider circuits, produces a precise 1Hz signal for second counting.
[0027] The register set is used to store time and date information and to control various parameters of the Real-Time Clock (RTC). The register set includes time registers (storing seconds, minutes, hours, etc.) and control registers (used to set the RTC's operating mode, interrupts, etc.). For example, the RTC's timing can be initialized by writing an initial time value to the time register. Software can read these registers to obtain the current time and date information, and can also write data to them to set alarms and other functions.
[0028] Programmable counters are used to count in any time unit according to system settings, such as seconds, minutes, hours, and days. Taking a seconds counter as an example, when a 1Hz counting pulse arrives, the value of the seconds counter increments by 1. When the seconds counter reaches 60, it generates a carry signal, causing the minutes counter to increment by 1. Similarly, when the minutes counter reaches 60, it carries over to the hours counter, and the hours counter carries over according to the rules of the 12-hour or 24-hour time format. Day counters, etc., also count according to the corresponding date rules.
[0029] The RTC timer has an interrupt function, which can generate an interrupt signal at a specific time. For example, when the seconds counter counts to 0, a seconds interrupt is generated, which can be used to update the time information on the display device. In addition, an alarm interrupt can be set. When the time in the time register matches the time preset in the alarm register, an alarm interrupt is generated to remind or trigger other specific events.
[0030] The RTC (Real-Time Clock) IP is a 64-bit real-time clock (RTC) module that provides a precise time base for the SoC system. Its specific functions are as follows:
[0031] 1. Supports dual clock domains;
[0032] 2. APB Clock Domain: The clock domain of the APB slave device interface logic;
[0033] 3. RTC Clock Domain: The clock domain for the RTC prescaler and counter logic;
[0034] 4. Built-in clock domain crossing (CDC) logic, supporting dual clock domains of APB and RTC;
[0035] 5. Built-in prescaler; Normally, the RTC's calendar function counts at a frequency of 1Hz, and the actual prescaler is located before the programmable counter;
[0036] 6. RTC counter bit width: 64 bits;
[0037] 7. RTC counting method: Up-counting;
[0038] 8. APB bus width: 32 bits;
[0039] 9. Hardware guarantees the consistency of 64-bit counter read / write operations, while software can perform read / write operations at any time;
[0040] 10. Supports timer function. An interrupt is generated when the RTC counter matches the value in the match register;
[0041] 11. The RTC interrupt logic is located in the RTC clock domain, and the APB clock can be arbitrarily gated;
[0042] 12. Supports calendar function; software is required to convert the counter value into date and time.
[0043] 13. By setting a prescaler, the minimum timing unit of the calendar can be less than 1 second;
[0044] 14. system_reset cannot reset the RTC prescaler and counter;
[0045] 15. The calendar function must be unaffected by system_reset; some registers within the module do not use asynchronous reset.
[0046] 16. When using the DataValid Change Data Capture Scheme, the maximum delay of the Change Data Capture (CDC) signal must be set during logic synthesis and timing-signoff.
[0047] In this embodiment, the RTC real-time clock IP is designed and implemented entirely in Verilog code.
[0048] like Figure 2 As shown, the RTC real-time clock IP is divided into two clock domains. The blue part is the APB bus clock domain, which is responsible for interacting with bus data and outputting interrupt and wake-up signals. The yellow part is the RTC high-precision clock domain, which is responsible for clock division, counting, and generating calendar information.
[0049] When the SoC chip is working, the processor configures the RTC registers via the APB bus. In counting mode, firstly, the prescaler initial register and prescaler upper limit register are set according to the external clock frequency. Then, the control register is used to configure whether to generate interrupt and wake-up signals. Finally, the startup register is enabled, and the RTC starts working, generating interrupt or wake-up signals periodically. In calendar mode, firstly, the prescaler initial register and prescaler upper limit register are set according to the external clock frequency, causing the prescaler counter to generate 1Hz pulses, i.e., the signal interval to the calendar counter is 1 second. Then, the calendar unit register is configured, which can be configured to seconds, minutes, hours, days, months, or any user-configurable information. Finally, the interrupt and wake-up enable are configured in the control register, and the startup register is configured. The RTC real-time clock starts working normally, and the user can directly read the counter value or generate interrupt and wake-up signals according to the configuration.
[0050] Moving from the APB clock domain to the RTC clock domain:
[0051] 1. Registers that are guaranteed to be stable during use do not need to be synchronized; for example, the initial and upper limit registers of a prescaler.
[0052] 2. For signals that take effect immediately after configuration, synchronization is required in the RTC clock domain. The synchronization method is to latch the signals using two levels of registers with the RTC clock.
[0053] From RTC clock domain to APB clock domain:
[0054] Since the interrupt signal is generated in the RTC clock domain, it must eventually be transmitted to the CPU via the bus. Before being sent to the bus, the interrupt signal needs to be latched in two registers using the apb clock.
[0055] The RTC real-time clock in this embodiment contains two clock domains and is an asynchronous clock. The asynchronous signal is synchronized through a two-level register synchronization technique. Any interaction is synchronized or the signal is guaranteed not to flip during use, thus avoiding metastability problems. Its advantages are resource saving and simple design.
[0056] The RTC real-time clock has two clock inputs: apb_clk and RTC_clk. The RTC clock source is an external crystal oscillator. The interface signals of the RTC real-time clock are described in the table below.
[0057] Table 1 RTC Real-Time Clock Port Signals
[0058]
[0059] The key registers of the RTC are memory-mapped registers, which provide the processor and software with a precise way to locate and control them. Software can configure the RTC and read data and status by accessing these key registers.
[0060] The key registers of the RTC are as follows:
[0061] (1) Start Register: Writing 1 to Bit0 indicates starting the RTC counter;
[0062] (2) Control Register: Writing 0 to Bit 0 indicates that interrupts and wake-up sources are disabled; writing 0 to Bit 1 indicates that interrupt functionality is disabled; writing 0 to Bit 0 indicates that wake-up functionality is disabled;
[0063] (3) Prescaler initial value: 32 bits, representing the initial value of the prescaler;
[0064] (4) Prescaler upper limit register: 32 bits, representing the prescaler upper limit register; after the prescaler counter reaches the value of the upper limit register, a signal will be generated and sent to the RTC counter;
[0065] (5) RTC counter: 64-bit, representing the count value of the RTC real-time clock;
[0066] (6) Calendar Unit Register: 64 bits, representing the unit of calendar interruption, which can be set to any value that the user wants to set, such as seconds, minutes, hours, days, months, years, etc. (the initial unit is seconds);
[0067] (7) Interrupt Clear Request Register: Writing 1 to Bit 0 indicates clearing the interrupt.
[0068] Other embodiments of the present invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art that are not covered by the invention. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the appended claims.
[0069] It should be understood that this invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this invention is limited only by the appended claims.
Claims
1. An RTC real-time clock, characterized in that: include, The bus clock, comprising the clock source, register set, and interrupt system, is used for interaction with bus data; specifically, for enabling and controlling the configuration of timer initial values and timing limits, as well as outputting interrupt and wake-up signals. RTC high-precision clock, including a programmable counter, performs basic and advanced timer functions, and is used for clock division, counting, and calendar information generation, as well as... It has built-in cross-clock logic, which supports dual clock domains of bus clock and RTC high-precision clock, and uses two-level register synchronization technology to synchronize asynchronous signals.
2. The RTC real-time clock according to claim 1, characterized in that, The clock source is a stable low-frequency crystal oscillator used for second counting.
3. The RTC real-time clock according to claim 1, characterized in that, The register group is used to store time and date information as well as various parameters for controlling the RTC real-time clock.
4. The RTC real-time clock according to claim 3, characterized in that, The register group includes time registers and control registers.
5. The RTC real-time clock according to claim 3, characterized in that, The register group consists of a startup register, a control register, a prescaler initial register, a calendar unit register, and an interrupt clear register.
6. The RTC real-time clock according to claim 1, characterized in that, The programmable counter is used to count in any time unit according to the system settings.
7. The RTC real-time clock according to claim 1, characterized in that, It has a built-in prescaler.
8. The RTC real-time clock according to claim 1, characterized in that, It converts the software component counter value into date and time.