Chip packaging structure and electronic equipment

By filling the packaging shell with light-blocking adhesive, the problem of chip performance degradation under light exposure was solved, and the chip's anti-interference capability and operational stability were improved.

CN223624997UActive Publication Date: 2025-12-02MEMSENSING MICROSYST SUZHOU CHINA
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Patent Information

Application Number
CN202520232435.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-13
Publication Date
2025-12-02
Estimated Expiration
2035-02-13

AI Technical Summary

Technical Problem

Even after the chip is assembled into the complete device, the difference in optical environment inside and outside the package can still lead to photoinduced effects, affecting chip performance and reliability.

Method used

The packaging shell is filled with light-shielding adhesive to completely cover the chipset, preventing direct exposure to external light and acting as a buffer layer to reduce the impact of external vibration or impact, while also providing electrical insulation properties.

Benefits of technology

It effectively prevents circuit noise, logic errors and device performance degradation caused by photoinduced effects, and improves the chip's shock resistance and electrical stability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the utility model discloses a packaging structure of a chip and electronic equipment. The packaging structure of the chip comprises a substrate; the packaging shell is fixed to the substrate, the packaging shell and the substrate jointly define a containing cavity, a through hole is formed in the side, away from the substrate, of the packaging shell, and the through hole communicates the interior of the containing cavity with the exterior of the packaging shell; the chip set is fixed on the substrate and is positioned in the accommodating cavity; and the light-proof glue is filled in the accommodating cavity through the through hole and wraps the chip set, so that external light is prevented from irradiating the surface of the chip set. The packaging shell is filled with the light shielding glue, so that the light shielding glue completely wraps the chip set, direct irradiation of external light to the surface of the chip is effectively avoided, and circuit noise, logic errors and device performance degradation caused by the light induction effect are prevented.
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Description

Technical Field

[0001] This utility model relates to the technical field of chip packaging, and in particular to a chip packaging structure and electronic device. Background Technology

[0002] With the rapid development of integrated circuit technology, various chips (such as ASIC chips and MEMS devices) are widely used in modern electronic devices. However, due to the semiconductor characteristics of chips, their performance may change or even fail under illumination. For example, in some cases, when ultraviolet light (UV light) is present in the environment where the chip is located, data erasure may occur in the storage area of ​​the ASIC chip; in other cases, when strong light (tungsten lamps, fluorescent lamps, or sunlight) is present in the ambient light, the performance of ASIC chips and MEMS chips may be significantly affected. Specifically, this light-induced effect is mainly caused by the following two aspects: First, when the photon energy reaches or exceeds the band gap of the chip material, the photon can cause electrons in the valence band to jump to the conduction band, forming free electrons and holes. The large generation of these free charge carriers may cause circuit noise, logic errors, or even device failure; Second, under illumination, the carrier concentration inside the semiconductor will increase significantly, thereby changing the conductivity of the chip. However, some charge carriers may recombine at material defects, leading to a shortened lifetime or reduced mobility, thus negatively affecting the performance of the device.

[0003] To mitigate the impact of light on chip performance, existing technologies typically protect chips during the manufacturing process by covering them with light-shielding materials (such as Mylar films or caps). However, these protective measures only work during manufacturing; once the chip is assembled into the device, differences in the optical environment inside and outside the package can still lead to photoinduced effects. Utility Model Content

[0004] The present invention provides a chip packaging structure and electronic device, which aims to enhance the chip's anti-interference ability under light conditions and improve its working stability and reliability.

[0005] To solve the above-mentioned technical problems, the embodiments of this utility model disclose the following technical solutions:

[0006] On the one hand, a chip packaging structure is provided, including:

[0007] substrate;

[0008] A packaging shell is fixed on the substrate and together with the substrate, forms an accommodating cavity. A through hole is provided on the side of the packaging shell away from the substrate, and the through hole connects the inside of the accommodating cavity and the outside of the packaging shell.

[0009] The chipset is fixed on the substrate and located in the accommodating cavity;

[0010] A light-shielding adhesive is used to fill the cavity through the through-hole and cover the chipset to prevent external light from shining on the surface of the chipset.

[0011] In addition to one or more of the features disclosed above, or as an alternative, the light-shielding adhesive covers the chipset and the substrate.

[0012] In addition to one or more of the features disclosed above, or as an alternative, the light-shielding adhesive includes a first adhesive structure and a second adhesive structure, the first adhesive structure covering the chipset and the substrate, and the second adhesive structure covering the side surface of the first adhesive structure facing away from the substrate.

[0013] In addition to one or more of the features disclosed above, or as an alternative, the light-shielding adhesive includes a third adhesive structure and a fourth adhesive structure, the third adhesive structure wrapping around the sidewall of the chipset, the fourth adhesive structure covering the side surface of the chipset facing away from the substrate, and covering the side surface of the third adhesive structure facing away from the substrate.

[0014] In addition to one or more of the features disclosed above, or as an alternative, the light-blocking adhesive is silicone or fluoropolymer mixed with opaque pigments.

[0015] In addition to one or more of the features disclosed above, or as an alternative, the second adhesive structure is silicone or fluoropolymer mixed with opaque pigments, and the encapsulation shell is made of opaque material.

[0016] In addition to one or more of the features disclosed above, or as an alternative, the fourth adhesive structure is silicone or fluoropolymer mixed with opaque pigments, and the encapsulation shell is made of opaque material.

[0017] In addition to one or more of the features disclosed above, or as an alternative, the light-shielding adhesive is an elastic material.

[0018] In addition to one or more of the features disclosed above, or as an alternative, the light-shielding adhesive is doped with silicon oxide or aluminum oxide.

[0019] In addition to one or more of the features disclosed above, or as an alternative, the chipset includes an AS IC chip and a MEMS chip, the AS IC chip and the MEMS chip being stacked on the substrate and electrically connected, or the AS IC chip and the MEMS chip being spaced apart on the substrate and electrically connected.

[0020] In addition to one or more of the features disclosed above, or as an alternative, the AS IC chip and the MEMS chip are disposed at intervals on the substrate and electrically connected, and the substrate has a through hole that passes through itself, the through hole connecting the back cavity of the MEMS chip to the outside of the package housing.

[0021] In addition to one or more of the features disclosed above, or as an alternative, the packaging housing has a bump on the side surface opposite to the substrate, the through hole passes through the bump and the packaging housing, the light-shielding adhesive is also filled in the receiving cavity and the through hole, and the side surface of the light-shielding adhesive opposite to the substrate is closer to the substrate than the side surface of the bump opposite to the substrate.

[0022] On the other hand, an electronic device is provided, comprising: a package structure of any of the chips disclosed above.

[0023] One of the above technical solutions has the following advantages or beneficial effects: By filling the package housing with light-shielding adhesive to completely cover the chipset, direct exposure of the chip surface to external light can be effectively prevented, thus preventing circuit noise, logic errors, and device performance degradation caused by photoinduced effects. Simultaneously, after filling the cavity, the light-shielding adhesive acts as a buffer layer for the chipset, reducing the impact of external vibrations or shocks, thereby effectively improving the chipset's shock resistance. Furthermore, the light-shielding adhesive has excellent electrical insulation properties, preventing functional abnormalities or damage to the chip caused by accidental short circuits or leakage, thus enhancing the electrical stability of the package structure. Attached Figure Description

[0024] The technical solution and other beneficial effects of this utility model will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0025] Figure 1 This is a schematic diagram of the chip packaging structure provided in this application. Figure 1 ;

[0026] Figure 2 This is a schematic diagram of the chip packaging structure provided in this application. Figure 2 ;

[0027] Figure 3 This is a schematic diagram of the chip packaging structure provided in this application. Figure 3 ;

[0028] Figure 4 This is a schematic diagram of the chip packaging structure provided in this application. Figure 4 ;

[0029] Figure 5This is a schematic diagram of the chip packaging structure provided in this application. Figure 5 ;

[0030] Figure 6 This is a schematic diagram of the chip packaging structure provided in this application. Figure 6 ;

[0031] Figure 7 This is a schematic diagram of the chip packaging structure provided in this application. Figure 7 ;

[0032] Figure 8 This is a schematic diagram of the chip packaging structure provided in this application. Figure 8 ;

[0033] Figure 9 This is a schematic diagram of the chip packaging structure provided in this application. Figure 9 ;

[0034] Explanation of reference numerals in the attached figures:

[0035] 10. Substrate; 11. Through-hole;

[0036] 20. Encapsulation housing; 21. Through hole;

[0037] 30. Chipset; 31. ASIC chip; 32. MEMS chip;

[0038] 40. Light-shielding adhesive; 41. First adhesive structure; 42. Second adhesive structure; 43. Third adhesive structure; 44. Fourth adhesive structure;

[0039] 50. Bumps;

[0040] 60. Adhesives;

[0041] 70. Lead wire. Detailed Implementation

[0042] To make the objectives, technical solutions, and beneficial effects of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described in this specification are merely for explaining the present utility model and are not intended to limit the present utility model.

[0043] In the description of this utility model, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0044] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, a direct connection, or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0045] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0046] This utility model discloses a chip packaging structure, referring to... Figure 1The chip's packaging structure includes a substrate 10, a packaging shell 20, a chipset 30, and a light-shielding adhesive 40. Specifically, the packaging shell 20 is fixed to the substrate 10, forming a cavity together with the substrate 10. The chipset 30 is fixed to the substrate 10 and located within the cavity. A through-hole 21 is provided on the side of the packaging shell 20 facing away from the substrate 10, connecting the inside of the cavity and the outside of the packaging shell 20. The light-shielding adhesive 40 fills the cavity through the through-hole 21 and covers the chipset 30 to prevent external light from shining on the surface of the chipset 30.

[0047] This application fills the package housing 20 with light-shielding adhesive 40, completely covering the chipset 30. This effectively prevents direct exposure of the chip surface to external light, thus preventing circuit noise, logic errors, and device performance degradation caused by photoinduced effects. Simultaneously, after filling the cavity, the light-shielding adhesive 40 acts as a buffer layer for the chipset, reducing the impact of external vibrations or shocks on the chipset 30, thereby effectively improving the shock resistance of the chipset 30. Furthermore, the light-shielding adhesive 40 has excellent electrical insulation properties, preventing functional abnormalities or damage to the chip caused by accidental short circuits or leakage, thus enhancing the electrical stability of the package structure.

[0048] In some embodiments, the substrate 10 may be a circuit board. The chipset 30 is fixed on the substrate 10 and electrically connected to the substrate 10. Specifically, the chipset 30 includes an ASIC chip 31 and a MEMS chip 32. The MEMS chip 32 is electrically connected to the ASIC chip 31 via a lead 70, and the ASIC chip 31 is electrically connected to the substrate 10 via a lead 70. The MEMS chip 32 is used to receive analog signals, and the ASIC chip 31 is used to process signals from the MEMS chip 32.

[0049] Furthermore, the chip packaging structure disclosed in this application is applicable to chipsets 30 with various structural forms. (Refer to...) Figure 2 , Figure 5 , Figure 8 In some embodiments, the ASIC chip 31 and the MEMS chip 32 are disposed at a distance on one side surface of the substrate 10. The ASIC chip 31 is fixedly connected to the substrate 10 by an adhesive 60, and the MEMS chip 32 is fixedly connected to the substrate 10 by an adhesive 60. (Refer to...) Figure 1 , Figure 4 , Figure 7 In some embodiments, a through-hole 11 is also provided on the substrate 10. The ASIC chip 31 and the MEMS chip 32 are disposed at intervals on one side surface of the substrate 10, and the through-hole 11 connects the back cavity of the MEMS chip 32 to the outside of the package housing 20. (Refer to...) Figure 3 , Figure 6 , Figure 9In some embodiments, the ASIC chip 31 and the MEMS chip 32 are stacked on one side surface of the substrate 10. The ASIC chip 31 is fixedly connected to the substrate 10 by an adhesive 60, and the MEMS chip 32 is fixedly connected to the side of the ASIC chip away from the substrate by an adhesive 60.

[0050] It is worth mentioning that the light-shielding adhesive 40 can protect the chipset 30 through different structural forms. The light-shielding adhesive 40 will be described in detail below with reference to different embodiments.

[0051] Reference Figures 1 to 3 In the first embodiment of the light-shielding adhesive 40 disclosed in this application, the light-shielding adhesive 40 fills the accommodating cavity through the through-hole 21 and covers the chipset 30 and the substrate 10. Specifically, the light-shielding adhesive 40 is made of silicone or fluoropolymer mixed with opaque pigments. In some embodiments, the opaque pigment can be graphite powder. The addition of opaque pigments effectively enhances the light-shielding performance, thereby blocking external light from directly irradiating the chipset 30, especially in ultraviolet and strong light environments, effectively avoiding chip performance degradation problems that may be caused by photoinduced effects. It is worth mentioning that the opaque pigments are uniformly dispersed inside the silicone or fluoropolymer matrix, and its light-shielding performance is provided by the entire adhesive, rather than relying on the surface coating layer. Therefore, the light-shielding adhesive 40 will not detach or be damaged due to friction, vibration or environmental changes during use, ensuring the long-term reliability of the light-shielding performance. In addition, the internal structure of the pigment-doped silicone remains stable when exposed to ambient light (including ultraviolet light) for a long time, and it is not easy to degrade or degrade, avoiding the decrease in shielding performance that may be caused by oxidation or corrosion of the coated metal layer. Meanwhile, both silicone and fluoropolymer typically possess a certain degree of fluidity and elasticity during filling. This characteristic allows the light-shielding adhesive 40 to adapt to the different structural forms of the chipset 30 disclosed above, achieving full coverage of the chipset 30. This ensures that both the ASIC chip 31 and the MEMS chip 32 receive comprehensive light-shielding protection. Especially when applied to the MEMS chip 32, the elasticity of the light-shielding adhesive 40 ensures that even when the surface of the MEMS chip 32 is covered, the MEMS chip 32 can still sense the atmospheric pressure on the side away from the substrate 10, maintaining its normal operation.

[0052] Reference Figures 4 to 6In the second embodiment of the light-shielding adhesive 40 disclosed in this application, the light-shielding adhesive 40 includes a first adhesive structure 41 and a second adhesive structure 42. The first adhesive structure 41 covers the chipset 30 and the substrate 10, and the second adhesive structure 42 covers the surface of the first adhesive structure 41 facing away from the substrate 10. Preferably, the second adhesive structure 42 is silicone or fluoropolymer mixed with opaque pigment, and the encapsulation shell 20 is made of opaque material. More specifically, in the second embodiment disclosed in this application, the first adhesive structure 41 can be made of transparent silicone or other high-performance materials. Its main function is to provide mechanical protection, thermal conductivity, and sealing performance by tightly adhering to the chipset 30 and the substrate 10, without relying on its light-shielding properties. The second adhesive structure 42 is specifically designed for light shielding. After being mixed with opaque pigment, it has excellent light-shielding effect and can shield ambient light entering the accommodating cavity through the through-hole 21. The encapsulation shell 20, made of opaque material, can shield ambient light from the outer periphery of the chipset 30.

[0053] When both the first adhesive structure 41 and the second adhesive structure 42 are made of elastic polymers such as silicone or fluoropolymer, they exhibit good chemical compatibility. During the curing process, they form a stable cross-linked structure, achieving a tight physical and chemical bond that is not easily delaminated or separated, thus ensuring the stability of the light-shielding effect. Simultaneously, the elasticity of the first adhesive structure 41 and the second adhesive structure 42 ensures that even when the surface of the MEMS chip 32 is covered, the MEMS chip 32 can still sense the atmospheric pressure on the side away from the substrate 10, maintaining its normal operation. The light-shielding principle of the second adhesive structure 42 is the same as that of the light-shielding adhesive 40 in Embodiment 1, and will not be repeated here.

[0054] Reference Figures 7 to 9 In Embodiment 3 of the light-shielding adhesive 40 disclosed in this application, the light-shielding adhesive 40 also has a double-layer structure. Specifically, the light-shielding adhesive 40 includes a third adhesive structure 43 and a fourth adhesive structure 44. Unlike Embodiment 2, in Embodiment 3, the third adhesive structure 43 wraps around the sidewall of the chipset 30, and the fourth adhesive structure 44 covers the side surface of the chipset 30 facing away from the substrate 10, as well as the side surface of the third adhesive structure 43 facing away from the substrate 10. Preferably, the fourth adhesive structure 44 is silicone or fluoropolymer mixed with opaque pigments, and the encapsulation shell 20 is made of opaque material.

[0055] To elaborate, such as Figure 8 As shown, when the ASIC chip 31 and MEMS chip 32 are spaced apart on one side surface of the substrate 10, after the third adhesive structure 43 wraps around the ASIC chip and MEMS chip 32, the surfaces of the ASIC chip 31 and MEMS chip 32 facing away from the substrate 10 are exposed within the receiving cavity. The fourth adhesive structure 44 fills the receiving cavity, covering the surfaces of the ASIC chip 31 and MEMS chip 32 facing away from the substrate 10, as well as the surface of the third adhesive structure 43 facing away from the substrate 10. Additionally, as... Figure 9As shown, when the ASIC chip 31 and MEMS chip 32 are stacked on one side surface of the substrate 10, after the third adhesive structure 43 wraps the ASIC chip and MEMS chip 32, the side surface of the ASIC chip facing away from the substrate 10 is exposed in the accommodating cavity. The fourth adhesive structure 44 fills the accommodating cavity, covering the side surface of the ASIC chip 31 facing away from the substrate 10 and the side surface of the third adhesive structure 43 facing away from the substrate 10.

[0056] In some embodiments, the light-shielding adhesive 40 is also doped with silicon oxide or aluminum oxide. Both silicon oxide and aluminum oxide have high thermal stability and can withstand high temperatures. Doping with them can improve the heat resistance of the light-shielding adhesive 40. This is very important for some optoelectronic devices that need to operate in high-temperature environments, as it can prevent the adhesive from deforming or failing at high temperatures and ensure long-term encapsulation reliability.

[0057] In some embodiments, the through hole 21 is directly formed on the top wall of the package housing 20 away from the substrate 10 (see reference). Figures 7 to 9 After the light-shielding adhesive 40 is filled into the accommodating cavity, there is a gap between its surface facing away from the substrate 10 and the opening of the through hole 21. (Refer to...) Figures 1 to 6 In some embodiments, to prevent the light-shielding adhesive 40 from overflowing after filling, a bump 50 is provided on the side surface away from the substrate 10, and a through hole 21 passes through the bump 50 and the encapsulation housing 20. The light-shielding adhesive 40 is filled in the accommodating cavity and the through hole 21, and the side surface of the light-shielding adhesive 40 away from the substrate 10 is closer to the substrate 10 than the side surface of the bump 50 away from the substrate 10.

[0058] In summary, the chip packaging structure disclosed in this application can effectively prevent direct irradiation of the chip surface by filling a single layer of light-shielding adhesive 40 in the packaging shell 20 and completely covering the chipset 30 with the light-shielding adhesive 40, thereby preventing circuit noise, logic errors and device performance degradation caused by photoinduced effects. Alternatively, by filling the packaging shell 20 with light-shielding adhesive 40 with a multi-layer adhesive structure, the multi-layer adhesive structure and the opaque packaging shell 20 can effectively prevent direct irradiation of the chip surface by external light, enhance the chip's anti-interference ability in light-illuminated environments, and improve the chip's working stability and reliability.

[0059] This utility model also discloses an electronic device, including a package structure of any of the chips disclosed above. In some embodiments, the electronic device is a microelectromechanical device (MEMS) such as a pressure sensor or accelerometer; in other embodiments, the electronic device is a consumer electronic device or industrial automation equipment with internal MEMS. By incorporating a package structure of any of the chips disclosed in this application, the above-mentioned electronic device can achieve stable performance and extended lifespan under diverse lighting conditions, providing a reliable guarantee for high-performance electronic devices.

[0060] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0061] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A chip packaging structure, characterized in that, include: base(10); The encapsulation housing (20) is fixed on the substrate (10) and together with the substrate (10) forms a receiving cavity. The encapsulation housing (20) has a through hole (21) on the side away from the substrate (10), and the through hole (21) connects the inside of the receiving cavity and the outside of the encapsulation housing (20). The chipset (30) is fixed on the substrate (10) and located in the accommodating cavity; Light-shielding adhesive (40) is filled into the accommodating cavity through the through hole (21) and covers the chip group (30) to prevent external light from shining on the surface of the chip group (30).

2. The chip packaging structure according to claim 1, characterized in that, The light-shielding adhesive (40) covers the chipset (30) and the substrate (10).

3. The chip packaging structure according to claim 2, characterized in that, The light-shielding adhesive (40) includes a first adhesive structure (41) and a second adhesive structure (42). The first adhesive structure (41) covers the chipset (30) and the substrate (10), and the second adhesive structure (42) covers the side surface of the first adhesive structure (41) facing away from the substrate (10).

4. The chip packaging structure according to claim 2, characterized in that, The light-shielding adhesive (40) includes a third adhesive structure (43) and a fourth adhesive structure (44). The third adhesive structure (43) wraps around the sidewall of the chip assembly (30), and the fourth adhesive structure (44) covers the side surface of the chip assembly (30) away from the substrate (10) and the side surface of the third adhesive structure (43) away from the substrate (10).

5. The chip packaging structure according to claim 1, characterized in that, The light-shielding adhesive (40) is a silicone or fluoropolymer mixed with opaque pigments.

6. The chip packaging structure according to claim 3, characterized in that, The second adhesive structure (42) is silicone or fluoropolymer mixed with opaque pigments, and the encapsulation shell (20) is made of opaque material.

7. The chip packaging structure according to claim 4, characterized in that, The fourth adhesive structure (44) is silicone or fluoropolymer mixed with opaque pigments, and the encapsulation shell (20) is made of opaque material.

8. The chip packaging structure according to claim 1, characterized in that, The light-shielding adhesive (40) is made of an elastic material.

9. The chip packaging structure according to claim 1, characterized in that, The light-shielding adhesive (40) is doped with silicon oxide or aluminum oxide.

10. The chip packaging structure according to any one of claims 1-9, characterized in that, The chipset (30) includes an ASIC chip (31) and a MEMS chip (32). The ASIC chip (31) and the MEMS chip (32) are stacked on the substrate (10) and electrically connected. Alternatively, the ASIC chip (31) and the MEMS chip (32) are spaced apart on the substrate (10) and electrically connected.

11. The chip packaging structure according to claim 10, characterized in that, The ASIC chip (31) and the MEMS chip (32) are disposed at intervals on the substrate (10) and are electrically connected. The substrate (10) has a through hole (11) that passes through it, and the through hole (11) connects the back cavity of the MEMS chip (32) with the outside of the package housing (20).

12. The chip packaging structure according to claim 1, characterized in that, The encapsulation housing (20) has a protrusion (50) on the side surface away from the substrate (10). The through hole (21) passes through the protrusion (50) and the encapsulation housing (20). The light-shielding adhesive (40) is also filled in the accommodating cavity and the through hole (21). The side surface of the light-shielding adhesive (40) away from the substrate (10) is closer to the substrate (10) than the side surface of the protrusion (50) away from the substrate (10).

13. An electronic device, characterized in that, The package structure includes the chip as described in any one of claims 1-12.