Semiconductor detection carrier
By designing a semiconductor testing carrier and utilizing the structure of the substrate and positioning components, the problems of pin wear and deformation were solved, enabling precise testing and protection of semiconductor devices.
Patent Information
- Application Number
- CN202520307532.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-25
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2035-02-25
AI Technical Summary
During the transfer of semiconductor devices, the pins are easily worn or deformed, affecting the accuracy and reliability of testing.
A semiconductor testing carrier is designed, including a substrate and a positioning component. The substrate has perforations and a rectangular frame. The rectangular frame contains a spring pin and a T-shaped plate structure for positioning and limiting the pins of semiconductor devices, ensuring precise contact between the test pins and the pins. The spring and guide rod enable convenient placement and removal of semiconductor devices.
It effectively protects the pins of semiconductor devices, preventing wear and deformation, and improving testing accuracy and reliability.
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Figure CN223637586U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to semiconductor detection technical field especially relates to a semiconductor detection carrier. BACKGROUND
[0002] As Figure 5 It is a kind of semiconductor device's stereoscopic structure diagram.As shown in the figure, the semiconductor device main part is a plastic package 6 of rectangular structure, and the lower end of plastic package 6 is provided with a plurality of patch type pins 60, when the semiconductor device completes processing, needs to carry out the power-on test of semiconductor device through the pin 60 on it.In testing, semiconductor device is transferred to the detection position by conveying device, then power-on contact foot acts on pin 60, and test operation is carried out.While carrying out semiconductor conveying, the structure of pin 60 is deformed or pin 60 is abraded between pin 60 and conveying device or pin 60 and test table surface contact. UTILITY MODEL CONTENTS
[0003] The utility model provides a kind of semiconductor detection carrier, to solve the deficiency of above-mentioned prior art, the transfer of semiconductor device is provided with carrier, to avoid damage to pin when transferring, and also position semiconductor device, with strong practicality.
[0004] In order to realize the purpose of the utility model, the following technologies are adopted:
[0005] A kind of semiconductor detection carrier, including substrate, multiple positioning members are installed on substrate, and positioning member is used for the positioning of semiconductor device, to facilitate test operation.Base plate is opened with multiple groups of perforation, and each group of perforation is located in the just below positioning member, and in testing, in order to facilitate the contact of test contact foot and the pin of semiconductor device, therefore, the perforation corresponding with pin is processed on base plate.Positioning member includes rectangular frame, and the lower end of rectangular frame is equipped with bottom plate, multiple rectangular holes are opened in bottom plate, and bottom plate is made of insulating material, to avoid the uncontrollable communication between pin when power-on in testing.Application, semiconductor device is placed in rectangular frame, and the pin of lower end of semiconductor device is perforated in rectangular hole.And rectangular frame plays the role of limiting constraint to semiconductor device placed in it, to facilitate to improve the contact precision of test contact foot and the pin of semiconductor device.
[0006] Further, in order to ensure the contact effect between the pin and the test pin, the outer convex plates are arranged on the opposite sides of the rectangular frame, the spring pins are arranged on the outer convex plates, the end caps are arranged on the upper ends of the spring pins, the springs are arranged on the lower ends of the spring pins and between the outer convex plates and the base plate, a pair of transverse guide rods are arranged on the opposite sides of the rectangular frame, the T-shaped plates are arranged on the transverse guide rods, the upper clamping plates are arranged on the upper ends of the T-shaped plates, the wing plates are arranged on the outer walls of the T-shaped plates, the inclined holes are arranged on the wing plates, the penetrating rods are arranged in the inclined holes, a plurality of upper extension seats are arranged on the base plate, and the penetrating rods are arranged on the upper ends of the upper extension seats.
[0007] Further, the grooves are arranged on the other two sides of the rectangular frame, so that the semiconductor devices are convenient to take out and place.
[0008] Further, in order to facilitate the lifting of the semiconductor in the rectangular frame, the upper lifting holes are arranged on the geometric centers of the bottom plates, and the upper extension lifting rods are arranged on the base plate and arranged in the upper lifting holes.
[0009] The above technical scheme has the following advantages:
[0010] The semiconductor device is convenient to test, and the pin of the semiconductor device is prevented from being abraded or deformed during the test. BRIEF DESCRIPTION OF DRAWINGS
[0011] In order to make the purpose, technical scheme and advantages of the utility model more clear, the utility model will be described in further detail below in combination with the drawings.
[0012] Figure 1 A perspective structure diagram of one of the embodiments is shown.
[0013] Figure 2 An enlarged view of A is shown.
[0014] Figure 3 An enlarged view of B is shown.
[0015] Figure 4 A perspective structure diagram of the rectangular frame is shown.
[0016] Figure 5 A perspective structure diagram of the semiconductor device is shown. DETAILED DESCRIPTION
[0017] As Figures 1-5As shown in the figure, a semiconductor detection carrier includes a substrate 1, and a plurality of positioning members 2 are mounted on the substrate 1. Optionally, the connecting part of the detection device is as shown in the figure, which is composed of an insulating plate 5 and a plurality of groups of test pins 50 arranged on the insulating plate 5. Figure 1 As shown in the figure, a plurality of groups of through holes are arranged on the substrate 1, and each group of through holes is located directly below the positioning member 2.
[0018] The positioning member 2 includes a rectangular frame 23, recesses 26 are arranged on the other two sides of the rectangular frame 23, a bottom plate 24 is arranged at the lower end of the rectangular frame 23, a plurality of rectangular holes 25 are arranged on the bottom plate 24, the bottom plate 24 is made of an insulating material, an outer protruding plate 21 is arranged on each of the opposite two sides of the rectangular frame 23, a spring pin 20 is arranged through the outer protruding plate 21, an end cap is arranged at the upper end of the spring pin 20, a spring 22 is sleeved at the lower end of the spring pin 20, the spring 22 is located between the outer protruding plate 21 and the substrate 1, a pair of transverse guide rods 27 is arranged on each of the opposite two sides of the rectangular frame 23, a T-shaped plate 28 is sleeved on the transverse guide rod 27, an upper clamping plate 29 is arranged at the upper end of the T-shaped plate 28, a wing plate 30 is arranged on the outer wall of the T-shaped plate 28, an inclined hole 31 is arranged on the wing plate 30, a penetrating rod 33 is arranged through the inclined hole 31, a plurality of pairs of upper extension seats 32 are mounted on the substrate 1, and the penetrating rod 33 penetrates the upper end of the upper extension seat 32.
[0019] Optionally, an upper top penetrating hole is arranged at the geometric center of the bottom plate 24, and a plurality of upper extension top rods are arranged on the substrate 1 and penetrate the upper top penetrating hole.
[0020] In application, the semiconductor device 6 is placed in the rectangular frame 23, and the pins 60 at the lower end of the semiconductor device 6 penetrate the rectangular holes 25.
[0021] In operation, the operator presses the rectangular frame 23 downward, the spring 22 is compressed in the process of moving downward, and when the rectangular frame 23 moves downward, the penetrating rod 33 acts on the inclined hole 31, so that the T-shaped plate 28 moves outward, and the upper clamping plate 29 on the T-shaped plate 28 moves outward, and then the operator adjusts the posture of the semiconductor device 6 to place the pins 60 of the semiconductor device 6 downward in the rectangular frame 23, and each pin 60 of the semiconductor device 6 is opposite to each rectangular hole 25. Thereafter, the semiconductor device 6 is transferred to the upper side of the insulating plate 5, and then the semiconductor device 6 is moved downward, and in the process of moving downward, the test pins 50 penetrate the through holes, and the conductive part at the upper end of the test pins 50 contacts the pins 60 of the semiconductor device 6 and performs a test operation.
[0022] After completion, the rectangular frame 23 is pressed downward to cancel the limiting of the upper end of the semiconductor device 6 by the upper clamping plate 29, and then the semiconductor device 6 is taken out, or the semiconductor device 6 can also be ejected from the rectangular frame 23 by the upper extension top rod.
[0023] The above merely describes preferred embodiments of the present application and is not intended to limit the present application. Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the present application claims and their equivalent technologies, the present application also intends to include these modifications and variations.
Claims
1. A semiconductor testing carrier, characterized in that, Includes a substrate (1), on which multiple positioning elements (2) are mounted; Multiple sets of through holes are formed on the substrate (1), and each set of through holes is located directly below the positioning member (2); The positioning component (2) includes a rectangular frame (23), and a base plate (24) is provided at the lower end of the rectangular frame (23). Multiple rectangular holes (25) are provided on the base plate (24), and the base plate (24) is made of insulating material. In application, the semiconductor device (6) is placed inside the rectangular frame (23), and the pin (60) at the lower end of the semiconductor device (6) passes through the rectangular hole (25).
2. The semiconductor testing carrier according to claim 1, characterized in that, On opposite sides of the rectangular frame (23), there are protruding plates (21), and spring pins (20) are passed through the protruding plates (21). The upper end of the spring pins (20) is provided with an end cap, and the lower end of the spring pins (20) is fitted with a spring (22). The spring (22) is located between the protruding plates (21) and the base plate (1). On opposite sides of the rectangular frame (23), there are a pair of horizontal guide rods (27), and T-shaped plates (28) are fitted on the horizontal guide rods (27). The upper end of the T-shaped plates (28) is provided with an upper clamping plate (29). The outer wall of the T-shaped plates (28) is provided with a wing plate (30). An oblique hole (31) is opened on the wing plate (30), and a through rod (33) is passed through the oblique hole (31). Multiple pairs of upper extension seats (32) are installed on the base plate (1), and the through rod (33) passes through the upper end of the upper extension seat (32).
3. The semiconductor testing carrier according to claim 1, characterized in that, Grooves (26) are provided on the other two sides of the rectangular frame (23).
4. The semiconductor testing carrier according to claim 1, characterized in that, A top through hole is provided at the geometric center of the base plate (24), and multiple upper extension rods are provided on the base plate (1), with the upper extension rods passing through the top through hole.