Surge current suppression circuit

Abstract

The utility model provides a surge current suppression circuit. The surge current suppression circuit comprises a switch module, a transient voltage control module and a steady-state voltage control module, the transient voltage control module is used for controlling the transient voltage of the control end of the switch module at the input moment of the input voltage so as to suppress the surge current at the input moment of the input voltage; the steady-state voltage control module is used for controlling the steady-state voltage of the control end of the switch module according to the input voltage when the input voltage is in a steady state so as to reduce the resistance of the switch module when the input voltage is in the steady state; wherein when the input voltage is smaller than a first preset value, the input voltage and the steady-state voltage of the control end of the switch module meet a first preset relation; when the input voltage is greater than or equal to the first preset value, the input voltage and the steady-state voltage of the control end of the switch module meet a second preset relation. The surge current suppression circuit can support wide voltage input while suppressing surge current and reducing circuit resistance loss.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electrical appliance protection, in particular to a surge current suppression circuit. BACKGROUND

[0002] At present, surge current phenomenon may occur in the use of electrical equipment, for example, when the electronic equipment is started or hot plugged, a large surge current will be generated; for another example, when the power supply is switched, a large surge current will also be generated.

[0003] Since the excessive surge current will affect the stability of the entire system power supply, and will even lead to system reset or system downtime phenomenon in serious cases, in the related technology, a surge current suppression circuit is usually used to suppress the surge current phenomenon. However, the existing surge current suppression circuit cannot support wide voltage input. Taking the computer USB interface and the device support tool as an example, the working voltage when connecting the device support tool is usually 24V, and the working voltage when connecting the computer USB interface is usually 5V, and the input range of the same surge current suppression circuit cannot be adapted to the connection of the device support tool and the computer USB interface at the same time, so the existing surge current suppression circuit cannot be adapted to different working voltages. CONTENT OF THE UTILITY MODEL

[0004] The present application provides a surge current suppression circuit, which aims to solve the technical problem that the existing surge current suppression circuit cannot support wide voltage input.

[0005] The present application provides a surge current suppression circuit, comprising:

[0006] A switch module, a first end of the switch module is connected to an input voltage, a second end of the switch module provides an output voltage, and the resistance of the switch module changes with the voltage of the control end thereof;

[0007] A transient voltage control module, the transient voltage control module is connected to the control end of the switch module, and the transient voltage control module is used to control the transient voltage of the control end of the switch module at the moment of input of the input voltage, so as to suppress the surge current at the moment of input of the input voltage;

[0008] A steady-state voltage control module, the steady-state voltage control module is connected to the input voltage and the control end of the switch module, and the steady-state voltage control module is used to limit the steady-state voltage of the control end of the switch module according to the input voltage when the input voltage is in a steady state, so as to reduce the resistance of the resistance switch when the input voltage is in the steady state;

[0009] Wherein, when the input voltage is less than a first preset value, the input voltage and the steady-state voltage of the control end of the switch module satisfy a first preset relationship; when the input voltage is greater than or equal to the first preset value, the input voltage and the steady-state voltage of the control end of the switch module satisfy a second preset relationship.

[0010] In some embodiments, the first preset relationship represents that a voltage difference between the input voltage and the steady-state voltage of the control terminal of the switch module increases with an increase of the input voltage.

[0011] The second preset relationship represents that the voltage difference between the input voltage and the steady-state voltage of the control terminal of the switch module remains a second preset value.

[0012] In some embodiments, the steady-state voltage control module comprises a first resistor, a second resistor and a voltage stabilizing diode.

[0013] A first end of the first resistor is connected to the first end of the switch module, a second end of the first resistor is connected to a first end of the second resistor, and a second end of the second resistor is connected to a ground terminal.

[0014] A negative electrode of the voltage stabilizing diode is connected to the first end of the switch module, and a positive electrode of the voltage stabilizing diode is connected to a node between the first resistor and the second resistor.

[0015] In some embodiments, when the input voltage is less than a first preset value, the voltage stabilizing diode is cut off, and the first preset relationship is represented as:

[0016]

[0017] wherein VG is the steady-state voltage of the control terminal of the switch module, PWR is the input voltage, R1 is a resistance value of the first resistor, and R2 is a resistance value of the second resistor.

[0018] In some embodiments, when the input voltage is greater than or equal to the first preset value, the voltage stabilizing diode is turned on, and the second preset relationship is represented as:

[0019] VG = PWR - VZ

[0020] wherein VG is the steady-state voltage of the control terminal of the switch module, PWR is the input voltage, and VZ is a voltage stabilizing voltage of the voltage stabilizing diode.

[0021] In some embodiments, the switch module comprises a switch transistor.

[0022] A source of the switch transistor is connected to the input voltage as the first end, and a drain of the switch transistor provides an output voltage as the second end.

[0023] A gate of the switch transistor is connected to the transient voltage control module as the control terminal, and the gate of the switch transistor is connected to the steady-state voltage control module as the control terminal.

[0024] In some embodiments, the switch module further comprises a third resistor.

[0025] The first end of the third resistor is connected with the gate of the switch transistor, the second end of the third resistor is connected with the transient voltage control module, and the second end of the third resistor is connected with the steady voltage control module.

[0026] In some embodiments, the transient voltage control module comprises a first capacitor;

[0027] The first end of the first capacitor is connected with the first end of the switch module, and the second end of the first capacitor is connected with the control end of the switch module.

[0028] In some embodiments, the surge current suppression circuit further comprises a filter module;

[0029] The filter module is connected with the second end of the switch module to filter interference and / or noise to stabilize the output voltage.

[0030] In some embodiments, the filter module comprises a second capacitor, a third capacitor and a fourth capacitor;

[0031] The first end of the second capacitor is connected with the second end of the switch module, and the second end of the second capacitor is connected with the ground end;

[0032] The first end of the third capacitor is connected with the second end of the switch module, and the second end of the third capacitor is connected with the ground end;

[0033] The first end of the fourth capacitor is connected with the second end of the switch module, and the second end of the fourth capacitor is connected with the ground end.

[0034] The present application controls the transient voltage of the control end of the switch module through the transient voltage control module, and limits the steady voltage of the control end of the switch module through the steady voltage control module. Since the resistance of the switch module changes with the voltage of the control end, when the input voltage is input (for example, when the electronic device is started or hot plugged), the transient voltage control module can make the switch module have a larger resistance to suppress the surge current. When the input voltage is in a steady state, the steady voltage control module can make the switch module have a smaller resistance to reduce the resistance loss of the circuit by limiting the steady voltage of the control end of the switch module, thereby achieving the suppression of the surge current phenomenon and the reduction of the resistance loss of the circuit.

[0035] Meanwhile, when the input voltage is less than the first preset value, the steady-state voltage control module can make the input voltage and the steady-state voltage of the control end of the switch module satisfy the first preset relationship, so as to ensure that the switch module has a small resistance when the input voltage is in a steady state; and when the input voltage is greater than or equal to the first preset value, the steady-state voltage control module can make the input voltage and the steady-state voltage of the control end of the switch module satisfy the second preset relationship, so as to also ensure that the switch module has a small resistance when the input voltage is in a steady state, that is, when the input voltage is less than the first preset value or the input voltage is greater than or equal to the first preset value, the surge current suppression circuit of the present application can ensure that the switch module has a small resistance, so that the surge current suppression circuit of the present application can support wide voltage input. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained according to these drawings without creative labor for those skilled in the art.

[0037] Figure 1 A schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown;

[0038] Figure 2 Another schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown;

[0039] Figure 3 Another schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown;

[0040] Figure 4 Another schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown;

[0041] Figure 5 Another schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown;

[0042] Figure 6 Another schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown;

[0043] Figure 7 Another schematic diagram of a surge current suppression circuit in an embodiment of the present application is shown.

[0044] Among them, 10: switch module, 20: transient voltage control module, 30: steady-state voltage control module, 40: filter module;

[0045] PWR: input voltage, Vout: output voltage, M1: switching transistor, C1: first capacitor, R1: first resistor, R2: second resistor, ZD1: voltage stabilizing diode, m1: node, C01: second capacitor, C02: third capacitor, C03: fourth capacitor. DETAILED DESCRIPTION

[0046] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0047] In the description of the present application, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any implementation described as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations. The following description is presented to enable any person skilled in the art to make and use the present application. In the following description, for purposes of explanation, specific details are set forth. It is apparent to those skilled in the art that the present application can be practiced without using these specific details. In other instances, well-known structures and processes are not elaborated in order not to obscure the description of the present application with unnecessary details. Thus, the present application is not intended to be limited by the embodiments shown, but is to be accorded with the widest scope consistent with the principles and features disclosed herein.

[0048] The present application provides a surge current suppression circuit, which is described in detail below.

[0049] First, refer to Figure 1 , Figure 1 A schematic diagram of a surge current suppression circuit in the embodiments of the present application is shown, wherein the surge current suppression circuit comprises a switching module 10, a transient voltage control module 20 and a steady voltage control module 30.

[0050] Specifically, the first end of the switching module 10 is used to access the input voltage PWR, and the second end of the switching module 10 can provide the output voltage Vout after the switching module 10 is turned on. The resistance of the switching module 10 changes with the voltage at the control end, so that the resistance of the switching module 10 can be changed by controlling the voltage at the control end, for example, so that the switching module 10 has a large resistance at the moment of input of the input voltage PWR to suppress the surge current at the moment of input of the input voltage PWR; for another example, so that the switching module 10 has a small resistance after the input voltage PWR is in a steady state to reduce resistance loss.

[0051] As an example, refer to Figure 2 , Figure 2 Another schematic diagram of the surge current suppression circuit in the embodiments of the present application is shown, wherein the switch module 10 comprises a switch transistor M1; the source of the switch transistor M1 is connected to the input voltage PWR as the first end, and the drain of the switch transistor M1 provides the output voltage Vout as the second end; the gate of the switch transistor M1 is connected to the transient voltage control module 20 as the control end, and the gate of the switch transistor M1 is connected to the steady-state voltage control module 30 as the control end.

[0052] It should be noted that Figure 2 The switch transistor M1 shown in the above embodiment is a PMOS transistor. Since the PMOS transistor has the characteristics of variable resistance and low-level conduction, if the gate voltage of the switch transistor M1 is raised at the moment of input of the input voltage PWR, the switch transistor M1 can have a larger resistance to suppress the inrush current; on the contrary, if the gate voltage of the switch transistor M1 is reduced after the input voltage PWR is in a steady state, the switch transistor M1 can have a smaller resistance to reduce the resistance loss.

[0053] It can be understood that the implementation of the switch module 10 of the present application is not limited to Figure 2 the PMOS transistor type switch transistor M1 shown in the above embodiment. In some possible embodiments, the switch module 10 can also use NMOS transistors, IGBT transistors, and transistors with switching function such as triodes.

[0054] At the same time, it should be pointed out that the control end of each transistor used in the embodiments of the present application can be the gate of the transistor, the first pole / first end of each transistor is one of the source and the drain, and the second pole / second end of each transistor is the other of the source and the drain. Since the source and the drain of the transistor can be symmetrical in structure, the source and the drain can be indistinguishable in structure, that is, the first pole / first end and the second pole / second end of the transistor in the embodiments of the present application can be indistinguishable in structure. As an example, in the case of a P-type transistor, the first pole / first end of the transistor is the source, and the second pole / second end of the transistor is the drain.

[0055] The transient voltage control module 20 is connected to the control end of the switch module 10, and the transient voltage control module 20 is used to control the transient voltage of the control end of the switch module 10 at the moment of input of the input voltage PWR. The transient voltage of the control end refers to the voltage of the control end of the switch module 10 before the input voltage PWR enters a steady state. Since the transient voltage control module 20 can control the transient voltage of the control end of the switch module 10, the inrush current at the moment of input of the input voltage PWR can be suppressed.

[0056] For example, if the switch module 10 includes a PMOS tube type switch transistor M1, the transient voltage control module 20 can increase the control terminal transient voltage of the switch transistor M1 when the input voltage PWR is input, so that the switch transistor M1 has a larger resistance to suppress the inrush current. For another example, if the switch module 10 includes an NMOS tube type switch transistor M1, the transient voltage control module 20 can decrease the control terminal transient voltage of the switch transistor M1 when the input voltage PWR is input, so that the switch transistor M1 has a larger resistance to suppress the inrush current.

[0057] As an example, refer to Figure 3 , Figure 3 Another schematic diagram of the inrush current suppression circuit in the embodiment of the application is shown, wherein the transient voltage control module 20 includes a first capacitor C1; the first end of the first capacitor C1 is connected to the first end of the switch module 10, and the second end of the first capacitor C1 is connected to the control terminal of the switch module 10.

[0058] Specifically, the first capacitor C1 will be charged when the input voltage PWR is input, at this time, the control terminal transient voltage of the PMOS tube type switch transistor M1 gradually decreases with the charging of the capacitor. Due to the variable resistance characteristic of the PMOS tube, the resistance of the switch transistor M1 will gradually transition from a larger value to a smaller value, and finally achieve the purpose of controlling the control terminal transient voltage of the switch module 10 when the input voltage PWR is input and suppressing the inrush current.

[0059] It can be understood that the transient voltage control module 20 of the application is not limited to Figure 3 The first capacitor C1 implementation described above, in some possible embodiments, the transient voltage control module 20 can include a plurality of series or a plurality of parallel capacitors.

[0060] The steady state voltage control module 30 is connected to the input voltage PWR and the control terminal of the switch module 10, and is used to limit the control terminal steady state voltage of the switch module 10 according to the input voltage PWR when the input voltage PWR is in a steady state. The control terminal steady state voltage refers to the voltage at the control terminal of the switch module 10 after the input voltage PWR enters a steady state. Since the steady state voltage control module 30 can control the control terminal steady state voltage of the switch module 10, the resistance loss of the circuit can be reduced after the input voltage PWR is in a steady state.

[0061] For example, if the switch module 10 includes a PMOS tube type switch transistor M1, the steady state voltage control module 30 can reduce the steady state voltage at the control end of the switch transistor M1 after the input voltage PWR is in a steady state, so that the switch transistor M1 has a smaller resistance to reduce the resistance loss of the circuit. For another example, if the switch module 10 includes an NMOS tube type switch transistor M1, the steady state voltage control module 30 can raise the steady state voltage at the control end of the switch transistor M1 after the input voltage PWR is in a steady state, so that the switch transistor M1 has a smaller resistance to reduce the resistance loss of the circuit.

[0062] In the embodiments of the present application, when the input voltage PWR is less than a first preset value, the steady state voltage control module 30 can make the input voltage PWR and the steady state voltage at the control end of the switch module 10 satisfy a first preset relationship, so as to ensure that the switch module 10 has a smaller resistance when the input voltage PWR is in a steady state. When the input voltage PWR is greater than or equal to the first preset value, the steady state voltage control module 30 can make the input voltage PWR and the steady state voltage at the control end of the switch module 10 satisfy a second preset relationship, so as to also ensure that the switch module 10 has a smaller resistance when the input voltage PWR is in a steady state.

[0063] For example, if the switch module 10 includes a PMOS tube type switch transistor M1, and the first preset relationship means that the steady state voltage at the control end of the switch module 10 and the input voltage PWR satisfy the formula VG=PWR*k1 (k is a coefficient less than 1) when the input voltage PWR is less than the first preset value, then the voltage difference between the gate voltage (i.e. the steady state voltage at the control end) of the switch transistor M1 and the source voltage (i.e. the input voltage PWR at the first end) satisfies the following formula:

[0064] VGS=PWR*(1-k1)

[0065] Wherein, VGS is the voltage difference between the gate voltage and the source voltage of the switch transistor M1.

[0066] According to the above formula, when the input voltage PWR is less than the first preset value, the first preset relationship represents that the voltage difference between the input voltage PWR and the steady state voltage at the control end of the switch module 10 increases with the increase of the input voltage PWR. Since the input voltage PWR is less than the first preset value, which is small, the voltage difference between the gate and the source of the switch transistor M1 is also small when the input voltage PWR is in a steady state, so as to ensure that the PMOS tube type switch transistor M1 has a smaller resistance, and finally reduce the resistance loss of the circuit.

[0067] Assuming that the second preset relationship refers to that the control terminal steady voltage of the switch module 10 and the input voltage PWR satisfy the formula VG=PWR-V1 (V1 is a fixed voltage) when the input voltage PWR is greater than or equal to the first preset value, then the voltage difference between the gate (i.e. the control terminal steady voltage) and the source (i.e. the input voltage PWR at the first end) of the switch transistor M1 satisfies the following formula:

[0068] VGS=VG-PWR=V1

[0069] According to the above formula, it can be seen that when the input voltage PWR is greater than or equal to the first preset value, the second preset relationship represents that the voltage difference between the input voltage PWR and the control terminal steady voltage of the switch module 10 is kept unchanged at the second preset value. That is, when the input voltage PWR is greater than or equal to the first preset value, the voltage difference between the gate and the source of the switch transistor M1 is not changed with the increase of the input voltage PWR when the input voltage PWR is in a steady state, so as to ensure that the switch transistor M1 of the PMOS tube type has a smaller resistance, and finally reduce the resistance loss of the circuit.

[0070] It can be seen that when the input voltage PWR is less than the first preset value or the input voltage PWR is greater than or equal to the first preset value, the surge current suppression circuit of the present application can ensure that the switch module 10 has a smaller resistance, so that the surge current suppression circuit of the present application can support wide voltage input while suppressing the surge current and reducing the resistance loss of the circuit.

[0071] It can be understood that the above formula is only an exemplary embodiment of the first preset relationship and the second preset relationship, and those skilled in the art can adaptively adjust the first preset relationship and the second preset relationship according to actual needs, for example, when the switch module 10 includes a switch transistor M1 of the NMOS tube type, the first preset relationship can refer to that the control terminal steady voltage of the switch module 10 and the input voltage PWR satisfy the formula VG=PWR*k2 (k2 is a coefficient greater than 1) when the input voltage PWR is less than the first preset value, and the second preset relationship can refer to that the control terminal steady voltage of the switch module 10 and the input voltage PWR satisfy the formula VG=PWR+V2 (V2 is a fixed voltage) when the input voltage PWR is greater than or equal to the first preset value.

[0072] In some embodiments of the present application, reference is made to Figure 4 , Figure 4Another schematic diagram of the surge current suppression circuit in the embodiments of the present application is shown, wherein the steady voltage control module 30 comprises a first resistor R1, a second resistor R2 and a Zener diode ZD1; the first end of the first resistor R1 is connected with the first end of the switch module 10, the second end of the first resistor R1 is connected with the first end of the second resistor R2, and the second end of the second resistor R2 is connected with the ground; the negative electrode of the Zener diode ZD1 is connected with the first end of the switch module 10, and the positive electrode of the Zener diode ZD1 is connected with the node m1 between the first resistor R1 and the second resistor R2.

[0073] It should be noted that when the input voltage PWR is less than the first preset value, the Zener diode ZD1 is cut off because the input voltage PWR is small, and at this time the steady voltage of the control end of the switch module 10 is controlled by the first resistor R1 and the second resistor R2 in series, and the first preset relationship can be expressed according to the resistance voltage division as follows:

[0074]

[0075] Wherein, VG is the steady voltage of the control end of the switch module 10, PWR is the input voltage PWR, R1 is the resistance value of the first resistor, and R2 is the resistance value of the second resistor.

[0076] Taking the switch transistor M1 of the PMOS tube type as an example, at this time the voltage difference between the gate voltage (i.e. the steady voltage of the control end) and the source voltage (i.e. the input voltage PWR of the first end) of the switch transistor M1 satisfies the following formula:

[0077]

[0078] According to the above formula, since the input voltage PWR is small when it is less than the first preset value, the voltage difference between the gate and the source of the switch transistor M1 is also small when the input voltage PWR is in a steady state, so that the switch transistor M1 of the PMOS tube type can have a small resistance, and finally the resistance loss of the circuit can be reduced when the input voltage PWR is less than the first preset value.

[0079] On the contrary, when the input voltage PWR is greater than or equal to the first preset value, the input voltage PWR reaches the conduction condition of the Zener diode ZD1, so the Zener diode ZD1 is turned on, and at this time the steady voltage of the control end of the switch module 10 is affected by the voltage of the Zener diode ZD1, and the second preset relationship can be expressed as follows:

[0080] VG = PWR - VZ

[0081] Wherein, VG is the steady voltage of the control end of the switch module 10, PWR is the input voltage PWR, and VZ is the voltage of the Zener diode ZD1.

[0082] Taking the switch module 10 including the switch transistor M1 of the PMOS tube type as an example, the voltage difference between the gate voltage (i.e. the control end steady state voltage) of the switch transistor M1 and the source voltage (i.e. the input voltage PWR of the first end) satisfies the following formula:

[0083] VGS = VG - PWR = -VZ

[0084] According to the above formula, when the input voltage PWR is greater than or equal to the first preset value, the voltage difference between the gate and the source of the switch transistor M1 at the steady state of the input voltage PWR does not change with the increase of the input voltage PWR, so that the switch transistor M1 of the PMOS tube type can also have a smaller resistance, and finally the resistance loss of the circuit can also be reduced when the input voltage PWR is greater than or equal to the first preset value.

[0085] In some embodiments of the present application, for example, for the embodiment in which the switch module 10 includes the switch transistor M1, referring to Figure 5 , Figure 5 Another schematic diagram of the surge current suppression circuit in the embodiments of the present application is shown, wherein the switch module 10 further includes a third resistor R3; the first end of the third resistor R3 is connected with the gate of the switch transistor M1, the second end of the third resistor R3 is connected with the transient voltage control module 20, and the second end of the third resistor R3 is connected with the steady state voltage control module 30. Specifically, the third resistor R3 is used as a current limiting resistor, so that the third resistor R3 can limit the gate charging current of the switch transistor M1, thereby delaying the conduction of the switch transistor M1, and finally being conducive to better suppressing the surge current phenomenon.

[0086] In some embodiments of the present application, continuing to refer to Figure 6 , Figure 6 Another schematic diagram of the surge current suppression circuit in the embodiments of the present application is shown, wherein the surge current suppression circuit further includes a filter module 40, and the filter module 40 is connected with the second end of the switch module 10. It should be noted that the output voltage Vout outputted through the switch module 10 may have voltage fluctuation phenomenon due to the influence of the switch module 10, and after the filter module 40 is set, the fluctuation phenomenon of the output voltage Vout can be effectively alleviated to filter interference and / or noise and output a stable output voltage Vout.

[0087] As an example, referring to Figure 7 , Figure 7Another schematic diagram of the surge current suppression circuit in the embodiments of the present application is shown, wherein the filter module 40 comprises a second capacitor C01, a third capacitor C02 and a fourth capacitor C03; the first end of the second capacitor C01 is connected with the second end of the switch module 10, and the second end of the second capacitor C01 is connected with the ground end; the first end of the third capacitor C02 is connected with the second end of the switch module 10, and the second end of the third capacitor C02 is connected with the ground end; the first end of the fourth capacitor C03 is connected with the second end of the switch module 10, and the second end of the fourth capacitor C03 is connected with the ground end. Specifically, the second capacitor C01, the third capacitor C02 and the fourth capacitor C03 are filter capacitors with large capacitance values, and when the output voltage Vout fluctuates, the second capacitor C01, the third capacitor C02 and the fourth capacitor C03 can absorb the fluctuation of the output voltage Vout, so as to output the fluctuation of the output voltage Vout, and output the stable output voltage Vout.

[0088] It is worth noting that the above content about the surge current suppression circuit is intended to clearly illustrate the implementation and verification process of the embodiments of the present application, and those skilled in the art can also make equivalent modification designs under the guidance of the present application, for example, the filter module 40 can also adopt a first-order RC filter circuit, a second-order RC filter circuit or a third-order RC filter circuit, etc.

[0089] In the above embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the detailed description of other embodiments above, which will not be repeated here.

[0090] The above has described the basic concepts, and it is obvious that the above detailed disclosure is only taken as an example and does not constitute a limitation on the present application for those skilled in the art. Although it is not explicitly stated here, those skilled in the art can make various modifications, improvements and corrections to the present application. Such modifications, improvements and corrections are suggested in the present application, so such modifications, improvements and corrections still belong to the spirit and scope of the exemplary embodiments of the present application.

[0091] At the same time, specific words are used in the present application to describe the embodiments of the present application. As "one embodiment", "an embodiment" and / or "some embodiments" means a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that the "an embodiment" or "one embodiment" or "one alternative embodiment" mentioned in different places in the specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be properly combined.

[0092] The above has carried out the detailed introduction to the surge current suppression circuit provided by the embodiment of the application, the principle and implementation mode of the application are described by applying specific examples in this paper, the above embodiment is only used for helping understanding the method and its core idea of the application; meanwhile, for the person skilled in the art, according to the idea of the application, the specific implementation mode and application range will have changes, and the above, the content of the specification should not be understood as the limitation of the application.

Claims

1. A surge current suppression circuit, characterized by comprising: The application relates to a voltage stabilizer, which comprises the following parts: a switch module, a first end of the switch module being connected to an input voltage, a second end of the switch module providing an output voltage, the resistance of the switch module varying with the voltage of the control end of the switch module; a transient voltage control module, the control end of the switch module being connected to the transient voltage control module, the transient voltage control module being used for controlling the transient voltage of the control end of the switch module when the input voltage is inputted, so as to suppress the inrush current when the input voltage is inputted; a steady voltage control module, the steady voltage control module being connected to the input voltage and the control end of the switch module, the steady voltage control module being used for limiting the steady voltage of the control end of the switch module according to the input voltage when the input voltage is in a steady state, so as to reduce the resistance of the switch module when the input voltage is in the steady state; wherein, when the input voltage is less than a first preset value, the input voltage and the steady voltage of the control end of the switch module satisfy a first preset relationship, and when the input voltage is greater than or equal to the first preset value, the input voltage and the steady voltage of the control end of the switch module satisfy a second preset relationship.

2. The inrush current suppression circuit of claim 1, wherein, The first preset relationship represents that the voltage difference between the input voltage and the steady voltage of the control end of the switch module increases with the increase of the input voltage. The second preset relationship represents that the voltage difference between the input voltage and the steady voltage of the control end of the switch module keeps a second preset value.

3. The inrush current suppressing circuit of claim 1 or 2, wherein The steady voltage control module comprises a first resistor, a second resistor and a voltage stabilizing diode. The first end of the first resistor is connected to the first end of the switch module, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to a grounding end. The negative electrode of the voltage stabilizing diode is connected to the first end of the switch module, and the positive electrode of the voltage stabilizing diode is connected to a node between the first resistor and the second resistor.

4. The inrush current suppression circuit of claim 3, wherein, When the input voltage is less than the first preset value, the voltage stabilizing diode is cut off, and the first preset relationship is represented as: wherein, VG is the steady voltage of the control end of the switch module, PWR is the input voltage, R1 is the resistance value of the first resistor, and R2 is the resistance value of the second resistor.

5. The inrush current suppressing circuit of claim 3, wherein, When the input voltage is greater than or equal to the first preset value, the voltage stabilizing diode is turned on, and the second preset relationship is represented as: VG = PWR - VZ wherein, VG is the steady voltage of the control end of the switch module, PWR is the input voltage, and VZ is the voltage stabilizing voltage of the voltage stabilizing diode.

6. The inrush current suppressing circuit of claim 1, wherein, The switch module comprises a switch transistor. The source of the switch transistor is connected to the input voltage as the first end, and the drain of the switch transistor provides the output voltage as the second end. The gate of the switch transistor is connected to the transient voltage control module as the control end, and the gate of the switch transistor is connected to the steady voltage control module as the control end.

7. The inrush current suppressing circuit of claim 6, wherein, The switch module further comprises a third resistor. A first end of the third resistor is connected with the gate of the switch transistor, a second end of the third resistor is connected with the transient voltage control module, and the second end of the third resistor is connected with the steady voltage control module.

8. The inrush current suppressing circuit of claim 1, wherein, The transient voltage control module comprises a first capacitor. A first end of the first capacitor is connected with the first end of the switch module, and a second end of the first capacitor is connected with the control end of the switch module.

9. The inrush current suppressing circuit of claim 1, wherein, The surge current suppression circuit further comprises a filter module. The filter module is connected with the second end of the switch module to filter interference and / or noise to stabilize the output voltage.

10. The inrush current suppression circuit of claim 9, wherein, The filter module comprises a second capacitor, a third capacitor and a fourth capacitor. A first end of the second capacitor is connected with the second end of the switch module, and a second end of the second capacitor is connected with the ground end. A first end of the third capacitor is connected with the second end of the switch module, and a second end of the third capacitor is connected with the ground end. A first end of the fourth capacitor is connected with the second end of the switch module, and a second end of the fourth capacitor is connected with the ground end.

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