Novel multi-current-path NPN structure
By introducing a Zener injection well region into a traditional ESD-protected NPN bipolar transistor device, the reverse breakdown current path of the device is separated, solving the problem of improving area performance efficiency while maintaining excellent trigger voltage and failure current characteristics, and achieving higher performance density.
Patent Information
- Application Number
- CN202422766150.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-13
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-11-13
AI Technical Summary
Existing ESD-protected NPN bipolar transistor devices struggle to maintain excellent trigger voltage and failure current characteristics while also achieving good area performance efficiency.
By introducing a novel Zener injection region and a second Zener injection well on the basis of the traditional ESD-protected NPN bipolar transistor device structure, the reverse breakdown current path is divided into the device surface and the device body, thereby enhancing the device's performance per unit area.
Without increasing the device area, the trigger voltage and failure current characteristics of the device were improved, enhancing the device's performance per unit area and achieving excellent area performance efficiency.
Smart Images
Figure CN223639608U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to the technical field of semiconductor devices, especially to a novel multi-current path NPN structure. BACKGROUND
[0002] ESD is a kind of ancient natural phenomenon. ESD exists in every corner of people's daily life. And it is such a common electrical phenomenon that is a fatal threat to precision integrated circuits. Electrical surge / transient voltage refers to the random and high voltage or large current that suddenly appears in the circuit, which is characterized by short occurrence time and very large transient energy. Electrical surge has strong destructive power on electronic components and integrated circuits, which can induce logic circuit misoperation, and even cause secondary breakdown of triode, latch-up effect of complementary metal oxide semiconductor (CMOS) and other serious thermal effects, resulting in failure of devices or integrated circuits. Electrical surge usually has two random sources, the first one is the instability of power grid, such as sudden switching on / off, sudden start of capacitive or inductive load, hot plug of related equipment, unstable operation of related power supply, etc. The second one is external sudden interference, such as lightning, electrostatic discharge, etc.
[0003] With the improvement of integrated circuit manufacturing process, the minimum line width has been reduced to sub-micron or even nanometer level, which brings higher performance of chips, but also greatly reduces the ESD resistance of integrated circuits, so the damage of static electricity is more serious. Most of the ESD can cause non-fatal damage to integrated circuits, thereby reducing the service life and reliability of integrated circuits, and further causing degradation of system function, which greatly hinders the realization of large-scale and high-reliability integration.
[0004] TVS device is an important semiconductor protection device, which has very low resistance value when turned on, can absorb high transient pulse power up to several kilowatts, and clamp the voltage of the port at a relatively safe preset value, so as to protect the corresponding circuit from damage or even irreversible damage caused by transient voltage pulse or current surge. TVS device has the characteristics of fast response speed, small leakage, high transient power and small size, and has been widely used in overvoltage protection of various fields such as electromechanical system, power supply equipment, electromagnetic interference suppression, input / output interface, communication equipment, relay, etc. Figure 1 As shown in the traditional ESD protection NPN bipolar transistor device structure, it is difficult to have excellent trigger voltage, failure current characteristics and certain area performance efficiency.
[0005] It should be noted that the information disclosed in the background section of the utility model is only intended to deepen the understanding of the general background of the utility model, and should not be regarded as acknowledging or implying in any form that the information constitutes prior art known to those skilled in the art. Content of the utility model
[0006] The utility model aims at providing a novel multi-current path NPN structure to solve the problem of simultaneously realizing excellent trigger voltage and failure current characteristics of the device, and excellent area performance efficiency.
[0007] To solve the above technical problems, the utility model provides a novel multi-current path NPN structure, which comprises:
[0008] A second-conductivity-type substrate;
[0009] A first Zener injection well region arranged in the second-conductivity-type substrate, wherein a second-conductivity-type anode region is arranged in the first Zener injection well region;
[0010] A second Zener injection well region arranged on one side of the first Zener injection well region and having a spacing between the first Zener injection well region, wherein a second-conductivity-type cathode region and a first-conductivity-type cathode region are arranged in the second Zener injection well region in sequence from left to right.
[0011] Preferably, the first Zener injection well region and the second Zener injection well region are both of the first conductivity type.
[0012] Preferably, the lower edges of the first Zener injection well region and the second Zener injection well region are flush.
[0013] Preferably, a first doped region is further arranged on one side of the second-conductivity-type anode region, the first doped region and the second-conductivity-type anode region have a certain spacing, and a second doped region is further connected to the side of the second-conductivity-type anode region away from the first doped region.
[0014] Preferably, the first doped region is of the second conductivity type, and the second doped region is of the first conductivity type.
[0015] Preferably, a third doped region is further arranged on the left side of the second-conductivity-type cathode region.
[0016] Preferably, the third doped region is of the second conductivity type.
[0017] Preferably, the first doped region, the second doped region and the third doped region are interconnected by wires.
[0018] Preferably, the top of the second-conductivity-type cathode region and the first-conductivity-type cathode region is further interconnected by wires.
[0019] Preferably, the first conductivity type is P type, and the second conductivity type is N type.
[0020] In the novel multi-current-path NPN structure provided by the utility model, the reverse breakdown current path of the device is divided into two parts of a device surface and a device body by introducing the first Zener injection well region and the second Zener injection well region, the trigger voltage and the failure current characteristics of the device are improved without increasing the device area, the performance of the device under a unit area is increased, and excellent area performance efficiency is achieved. BRIEF DESCRIPTION OF DRAWINGS
[0021] Those skilled in the art will understand that the drawings provided are for better understanding of the utility model and do not constitute any limitation on the scope of the utility model. Among them:
[0022] Figure 1 is a schematic diagram of a traditional ESD protection NPN bipolar transistor device structure;
[0023] Figure 2 is a schematic diagram of a novel multi-current-path NPN structure according to an embodiment of the utility model;
[0024] Figure 3 is a schematic diagram of a current trigger path of the novel multi-current-path NPN according to an embodiment of the utility model.
[0025] In the drawings:
[0026] 100, second-conductivity-type substrate; 101, first Zener injection well region; 102, second Zener injection well region; 103, second-conductivity-type anode region; 104, first doped region; 105, second doped region; 106, third doped region; 107, second-conductivity-type cathode region; 108, first-conductivity-type cathode region. DETAILED DESCRIPTION
[0027] To make the purpose, advantages and characteristics of the utility model clearer, the utility model is further described in detail below in combination with the drawings and specific embodiments. It should be noted that the drawings are all very simplified and not drawn in proportion, and are only used to facilitate and clearly assist the purpose of explaining the embodiments of the utility model. In addition, the structures shown in the drawings are often part of the actual structures. In particular, different proportions are sometimes used to show the different emphases of each drawing.
[0028] As used in the present application, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise, the term "or" is generally employed in its sense of "and / or," the term "at least one" is generally employed in its sense of "one or more," the term "at least two" is generally employed in its sense of "two or more," and the terms "first," "second," "third," etc. are merely used to describe different features and do not imply relative importance or an order of sequence. Thus, features defined with "first," "second," "third," etc. can include one or at least two of the features, the term "proximal" generally refers to the end closer to the operator, the term "distal" generally refers to the end closer to the patient, "one" and "the other" and "proximal" and "distal" generally refer to two parts that correspond to each other, which not only includes the end point, the terms "mounting," "connecting," and "connection" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integrated; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. In addition, as used in the present application, a component disposed in another component generally only indicates that there is a connection, coupling, cooperation or transmission relationship between the two components, and the two components can be directly connected or indirectly connected through an intermediate component, and cannot be understood as indicating or implying the spatial positional relationship between the two components, that is, the component can be in any orientation inside, outside, above, below or one side of the other component, unless the context clearly indicates otherwise. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0029] Research shows that the conventional ESD protection NPN bipolar transistor device structure as shown in Figure 1 It is difficult to have excellent trigger voltage, failure current characteristics and certain area performance efficiency.
[0030] Based on this, the core idea of the present application is to realize an ESD device with excellent trigger voltage and failure current characteristics. The present application is based on the conventional ESD protection NPN bipolar transistor device structure as shown in Figure 1 A novel multi-current path NPN structure as shown in Figure 2 is proposed by using the high-concentration Zener ion implantation introduced Zener implantation well region.
[0031] Specifically, please refer to Figures 2-3 , which is a schematic diagram of an embodiment of the present application. As shown in Figure 2 A novel multi-current path NPN structure includes:
[0032] a second conductivity type substrate 100;
[0033] a first Zener implant well region 101 arranged in the second conductivity type substrate 100, the first Zener implant well region 101 being provided with a second conductivity type anode region 103;
[0034] a second Zener implant well region 102 arranged on one side of the first Zener implant well region 101 and having a spacing with the first Zener implant well region 101, the second Zener implant well region 102 being sequentially arranged with a second conductivity type cathode region 107 and a first conductivity type cathode region 108 from left to right.
[0035] Compared with a conventional ESD protection NPN structure, by introducing the first Zener implant well region 101 and the second Zener implant well region 102, the reverse breakdown current path of the device is divided into two parts of a device surface and a device body, the trigger voltage and the failure current characteristics of the device are improved without increasing the device area, the performance of the device per unit area is increased, and excellent area performance efficiency is achieved.
[0036] In an embodiment, the first Zener implant well region 101 and the second Zener implant well region 102 are introduced by high-concentration Zener ion implantation.
[0037] Here, only the first conductivity type is taken as P type and the second conductivity type is taken as N type as an example for description. The first conductivity type semiconductor substrate can be doped with P type dopants, for example, boron. However, in other embodiments of the present application, the carriers can be holes, at this time, the first conductivity type is N type, and correspondingly, the second conductivity type is P type.
[0038] Specifically, the first Zener implant well region 101 and the second Zener implant well region 102 are both of the first conductivity type.
[0039] Exemplarily, the first Zener implant well region 101 is located inside the second conductivity type substrate 100, the upper edge thereof is tangent to the upper edge of the second conductivity type substrate 100, and the lower edge is slightly higher than the lower edge of the second conductivity type substrate 100. The first Zener implant well region 101 is located on the left side of the second Zener implant well region 102 and has a certain spacing with the left edge of the second Zener implant well region 102. Exemplarily, the lower edges of the first Zener implant well region 101 and the second Zener implant well region 102 are flush.
[0040] The second Zener injection well region 102 is located inside the second conductive type substrate 100, the upper edge of which is tangent to the upper edge of the second conductive type substrate 100, and the lower edge is slightly higher than the lower edge of the second conductive type substrate 100. The second Zener injection well region 102 is located to the right of the first Zener injection well region 101 and has a certain interval with the right edge of the first Zener injection well region 101. The right edge of the second Zener injection well region 102 has a certain interval with the right edge of the second conductive type substrate 100.
[0041] Specifically, one side of the second conductive type anode region 103 is further provided with a first doped region 104, which has a certain interval with the second conductive type anode region 103. The side of the first doped region 104 away from the second conductive type anode region 103 is further connected with a second doped region 105. The first doped region 104 is of the second conductive type, and the second doped region 105 is of the first conductive type. The left side of the second conductive type cathode region 107 is further provided with a third doped region 106. The third doped region 106 is of the second conductive type.
[0042] The second conductive type anode region 103, the first doped region 104 and the second doped region 105 are located in the first Zener injection well region 101, and the upper edges of the above-mentioned regions are tangent to the upper edge of the first Zener injection well region 101. The lower edges are located on the same horizontal line and are higher than the lower edge of the first Zener injection well region 101. The second conductive type anode region 103 is located to the left of the first doped region 104, and has a certain interval with the left edge of the first doped region 104 and with the left edge of the first Zener injection well region 101. The second doped region 105 is located to the right of the first doped region 104, and has a certain interval with the right edge of the first Zener injection well region 101.
[0043] The third doped region 106, the second conductive type cathode region 107 and the first conductive type cathode region 108 are located inside the second Zener injection well region 102, and the upper edges of the above-mentioned regions are tangent to the upper edge of the second Zener injection well region 102. The lower edges are located on the same horizontal line and are higher than the lower edge of the second Zener injection well region 102. The third doped region 106 is located to the left of the second conductive type cathode region 107, and has a certain interval with the left edge of the second conductive type cathode region 107 and with the left edge of the second Zener injection well region 102. The first conductive type cathode region 108 is located to the right of the second conductive type cathode region 107, and has a certain interval with the right edge of the second Zener injection well region 102.
[0044] In the above structure, the first doped region 104 and the second doped region 105, the third doped region 106 are interconnected by wires. The top of the second conductive type cathode region 107 and the first conductive type cathode region 108 are also interconnected by wires and connected as the cathode of the NPN device structure. The top of the second conductive type anode region 103 is also connected by wires as the anode of the NPN device structure.
[0045] The utility model discloses on the basis of traditional ESD protection NPN bipolar transistor device structure adopts high concentration zener ion implantation, introduces zener implantation well region, and the reverse breakdown current path of device is divided into device surface and device body two parts through novel multi-current path NPN structure, improves the trigger voltage and failure current characteristic of device on the basis of not increasing device area, increases the performance of device under unit area, realizes excellent area performance efficiency.
[0046] Compared with traditional ESD protection NPN bipolar transistor device structure, the novel multi-current path NPN device structure proposed in the utility model has a novel device structure and a novel current trigger path. Figure 3 As shown in the drawing, the novel multi-current path structure introduces two high-concentration zener implantation well regions, so that when ESD voltage comes, the PN junction formed at the junction surface of the second conductive type anode region 103 and the first zener implantation well region 101, the PN junction formed at the junction surface of the third doped region 106 and the second zener implantation well region 102, and the PN junction formed at the junction surface of the second conductive type substrate 100 and the second zener implantation well region 102 have avalanche breakdown with similar breakdown voltages, so that the current capacity of the device is stronger.
[0047] The device structure proposed in the utility model is only one display and description of the novel multi-current path NPN device structure for ESD protection. In addition to the structure in the drawing, any person skilled in the art can modify or change the above structure without departing from the spirit and scope of the utility model, such as changing the NPN structure described above to a PNP structure, a diode structure, a MOS structure, or changing the number of stacked series or stacked packages according to different application scenarios. These structures are obviously within the protection scope of the utility model.
[0048] The above description is only a description of the preferred embodiments of the utility model and does not limit the scope of the utility model. Any modification or change made by a person skilled in the art based on the above disclosure is within the protection scope of the technical scheme of the utility model.
Claims
1. A novel multi-current path NPN structure, characterized by, The application relates to a semiconductor device, comprising: a second-conductivity-type substrate; a first Zener injection well region arranged in the second-conductivity-type substrate, a second-conductivity-type anode region being arranged in the first Zener injection well region; a second Zener injection well region arranged on one side of the first Zener injection well region and spaced from the first Zener injection well region, a second-conductivity-type cathode region and a first-conductivity-type cathode region being arranged in the second Zener injection well region in sequence from left to right.
2. The novel multi-current access NPN structure according to claim 1, wherein, The first Zener injection well region and the second Zener injection well region are both of the first conductivity type.
3. The novel multi-current access NPN structure according to claim 1, wherein, Lower edges of the first Zener injection well region and the second Zener injection well region are flush.
4. The novel multi-current access NPN structure according to claim 1, wherein, One side of the second-conductivity-type anode region is further provided with a first doped region, the first doped region being spaced from the second-conductivity-type anode region, and the first doped region being further connected with a second doped region away from the one side of the second-conductivity-type anode region.
5. The novel multi-current access NPN structure according to claim 4, wherein, The first doped region is of the second conductivity type, and the second doped region is of the first conductivity type.
6. The novel multi-current access NPN structure of claim 4, wherein, The left side of the second-conductivity-type cathode region is further provided with a third doped region.
7. The novel multi-current access NPN structure of claim 6, wherein, The third doped region is of the second conductivity type.
8. The novel multi-current access NPN structure of claim 6, wherein, The first doped region, the second doped region and the third doped region are interconnected by wires.
9. The novel multi-current access NPN structure according to claim 1, wherein, The top of the second-conductivity-type cathode region and the first-conductivity-type cathode region are further interconnected by wires.
10. The novel multi-current access NPN structure according to any one of claims 1-9, wherein, The first conductivity type is P type, and the second conductivity type is N type.