Power-off test device
By controlling the power-off test of electronic products through control circuits and relays, the problems of accuracy and portability of power-off tests in existing technologies have been solved, achieving efficient and accurate power-off testing, simplifying the operation process and reducing costs.
Patent Information
- Application Number
- CN202520232663.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-14
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2035-02-14
AI Technical Summary
In existing power-off tests of electronic products, manual timing cannot achieve accurate test results, and the test process for programmable power supplies is cumbersome, bulky, and inconvenient to carry.
Design a power failure test device that controls the power-on and power-off status of the device under test through a control circuit and relays, reflects the working status with an indicator light group, collects signals through a data acquisition circuit, processes them through the main control circuit, and displays them on a monitor to achieve fully automatic testing.
It achieves accurate power-off at shorter time intervals, simplifies the testing process, improves testing efficiency and accuracy, and the device is small and portable, suitable for various environments, and reduces manufacturing costs.
Smart Images
Figure CN223650651U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic technology, and in particular to a power failure test device. Background Technology
[0002] In the electronics field, to verify the reliability of products' continuous operation under short-term power supply interruptions, many products require power-off tests. The duration of these power-offs varies, and most require highly precise timing, which cannot be achieved manually. Although most programmable power supplies on the market have power-off functions, their minimum power-off duration is at least 100 milliseconds, making it impossible to reduce the voltage from the rated voltage to zero in a short time. Furthermore, the power-on hold time or power-off time must be manually set via a host computer, making the process cumbersome. On the other hand, programmable power supplies are often bulky and heavy, making them inconvenient to carry. Therefore, a power-off testing device is needed that can rapidly and repeatedly perform cyclic tests to ensure the performance of electronic products. Utility Model Content
[0003] The purpose of this invention is to solve the technical problems of existing electronic product power-off tests, such as the inability to achieve accurate test results through manual timing and the cumbersome, bulky, and inconvenient-to-carry nature of programmable power supply testing. This invention provides a power-off testing device that uses a control circuit and relays to control the power-on and power-off status of the tested equipment. An indicator light group clearly reflects the working status of the testing device. The acquisition circuit collects the relay output signals, which are then processed by the main control circuit and displayed on a monitor, clearly showing the effect of the power-off.
[0004] The technical solution adopted by this utility model to achieve the above objectives is as follows: a power failure test device, comprising a power input circuit, a switch, a step-down circuit, a main control circuit, a relay control circuit, a data acquisition circuit, a display, an indicator light group, and a button circuit. The power input circuit is connected to the switch, the switch is connected to the step-down circuit, the step-down circuit is connected to the main control circuit, the main control circuit is connected to the relay control circuit, the data acquisition circuit, the display, the indicator light group, and the button circuit, respectively, the relay control circuit is connected to a relay, the relay is connected between the device power supply and the test device, and the relay is connected to the data acquisition circuit.
[0005] Further, the step-down circuit includes a step-down chip U2, a diode D2, capacitors C22, C17, and C18, resistors R7, R8, and R9, and an inductor L1. The anode of diode D2 is connected to pin 3 of switch SW2. Pin 2 of switch SW2 is connected to the power input circuit via interface J1. Pins 4 and 5 of switch SW2 are grounded. The cathode of diode D2 is connected to one end of capacitors C22, C17, and C18, one end of resistor R7, and the input terminal VIN of step-down chip U2. The VIN pin of step-down chip U2 is connected to... With a 5V voltage connection, the other ends of capacitors C22, C17, and C18 are all grounded. The other end of resistor R7 is connected to the EN pin of buck chip U2. The output terminal OUT of buck chip U2 outputs a 3.3V voltage. The SW pin of buck chip U2 is connected to one end of inductor L1, and the other end of inductor L1 is connected to a 3.3V voltage. The FB pin of buck chip U2 is connected to one end of resistors R8 and R9 respectively. The other end of resistor R8 is connected to a 3.3V voltage, and the other end of resistor R9 is grounded. The PGND and AGND pins of buck chip U2 are both grounded.
[0006] Furthermore, the buck chip is model MP2143DJ.
[0007] Furthermore, the main control circuit includes a main control chip U1, resistors R5, R6, and R13, capacitor C19, and crystal oscillator X1. The VDD_5, VREF+, VDDA, VDD_4, VDD_6, VDD_2, VDD_10, VDD_11, and VDD_3 pins of the main control chip U1 are all connected to 3.3V. The VSS_5, VSSA, VREF-, VSS_4, VSS_6, VSS_2, VSS_10, and VSS_3 pins of the control chip U1 are connected to... Pins _11 and VSS_3 are both grounded. The BOOT0 pin of control chip U1 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The PB2 pin of control chip U1 is connected to one end of resistor R6, and the other end of resistor R6 is grounded. The NRST pin of control chip U1 is connected to one end of resistor R13 and one end of capacitor C19, respectively. The other end of resistor R13 is connected to 3.3V, and the other end of capacitor C19 is grounded. The OSC_IN and OSC_OUT pins of control chip U1 are connected to crystal oscillator X1, and crystal oscillator X1 is grounded through capacitors C1 and C2.
[0008] Furthermore, the control chip is model STM32F103ZET6.
[0009] Furthermore, the relay control circuit includes resistors R1 and R2, transistor Q1, and Zener diode ZD1. One end of resistor R1 is connected to pin PE6 of control chip U1, and the other end of resistor R1 is connected to one end of resistor R2 and the base of transistor Q1. The other end of resistor R2 and the emitter of transistor Q1 are both grounded. The collector of transistor Q1 is connected to the anode of Zener diode ZD1 and port 2 of relay interface CN3. The cathode of Zener diode ZD1 and port 1 of relay interface CN3 are both connected to a 5V power supply. Relay interface CN3 is also connected to a relay.
[0010] Furthermore, the acquisition circuit includes resistors R14 and R15. One end of resistors R14 and R15 is connected to the PE0 pin of the control chip U1, the other end of resistor R14 is connected to port 2 of interface CN2, port 1 of interface CN2 is connected to power supply VCC, interface CN2 is also connected to a relay, and the other end of resistor R15 is grounded.
[0011] Further, the display includes a VSS pin, a VDD pin, a VO pin, an RS pin, a R / W pin, an E pin, a DB0 pin, a DB1 pin, a DB2 pin, a DB3 pin, a DB4 pin, a DB5 pin, a DB6 pin, a DB7 pin, an LED+ pin, and an LED- pin. The VSS pin is grounded, the VDD pin is connected to the power supply VDD, the VO pin is connected to the second terminal of a variable resistor, the first terminal of the variable resistor is grounded, the third terminal of the variable resistor is connected to the VDD_10 pin of the control chip U1, the RS pin is connected to the PG12 pin of the control chip U1, and the R / W pin is connected to the P... Connect pin G11, pin E to pin PG10 of control chip U1, pin DB0 to pin PD7 of control chip U1, pin DB1 to pin PD6 of control chip U1, pin DB2 to pin PD5 of control chip U1, pin DB3 to pin PD4 of control chip U1, pin DB4 to pin PD3 of control chip U1, pin DB5 to pin PD2 of control chip U1, pin DB6 to pin PD1 of control chip U1, pin DB7 to pin PD0 of control chip U1, pin LED+ to LED+ terminal, and pin LED- to ground.
[0012] Furthermore, the indicator light group includes a device operation light LED1, a test operation light LED2, a test ready light LED3, and a power light LED4. One end of each of the device operation light LED1, test operation light LED2, and test ready light LED3 is connected to a 3.3V power supply and is also connected to one end of a resistor R11. The other end of resistor R11 is connected to the PE5 pin of the control chip U1. The other end of device operation light LED1 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the PE2 pin of the control chip U1. The other end of test operation light LED2 is connected to one end of resistor R3, and the other end of resistor R3 is connected to the PE3 pin of the control chip U1. The other end of test ready light LED3 is connected to one end of resistor R4, and the other end of resistor R4 is connected to the PE4 pin of the control chip U1. One end of power light LED4 is connected to a 3.3V voltage, and the other end of power light LED4 is connected to resistor R10. The other end of resistor R10 is grounded.
[0013] Furthermore, the button circuit includes a button SW1, a bipolar diode D1, and a capacitor C16. Pin 1 of button SW1 is connected to the other end of resistor R11. Pin 2 of button SW1 is connected to one end of bipolar diode D1, one end of capacitor C16, and pin PE5 of main control chip U1, respectively. Pin 3 of button SW1 is grounded. Pin 4 of button SW1 is connected to the other end of bipolar diode D1 and capacitor C16, respectively.
[0014] Compared with the prior art, the beneficial effects of this utility model are as follows:
[0015] (1) This utility model provides a power-off test device, which controls the power-on and power-off status of the tested equipment through a control circuit and a relay. The indicator light group can clearly reflect the working status of the test device, making the test status clear at a glance. It provides a comprehensive test environment for the power-on and power-off of the tested equipment. The acquisition circuit acquires the relay output signal. After the acquired signal is processed by the ADC in the main control circuit, the value is displayed on the display, which can clearly show the effect of power-off and facilitate test recording.
[0016] (2) The present invention provides a power-off test device that can achieve power-off at shorter time intervals and can instantly reduce the voltage from the rated voltage to zero, which is more in line with the actual working conditions of the tested equipment. It can also cut off higher voltages, expanding the usable environment for power-off tests. The duration of the power-off device can be modified according to actual needs, and it can achieve fully automatic testing without the need for personnel to be on duty.
[0017] (3) This utility model provides a power failure test device that integrates power failure test tools into one device, which can reduce the complexity of test equipment connection, simplify the test environment and personnel operation, avoid test errors and interruptions caused by instrument problems, improve test efficiency and test accuracy, and improve the safety of the entire device. It has low manufacturing cost, simple structure, small size, and is easy to move and carry. Attached Figure Description
[0018] Figure 1 This is a structural block diagram of the power failure test device of this utility model.
[0019] Figure 2 This is a circuit diagram of the power-off test device of this utility model.
[0020] In the diagram: 1. Power input circuit, 2. Switch, 3. Step-down circuit, 4. Main control circuit, 5. Relay control circuit, 6. Data acquisition circuit, 7. Display, 8. Button circuit, 9. Indicator light group, 10. External power supply, 11. Equipment power supply, 12. Test equipment. Detailed Implementation
[0021] The present invention will now be described in detail with reference to the accompanying drawings and embodiments, but the present invention is not limited to the specific embodiments.
[0022] like Figure 1-2 The power failure test device shown includes a power input circuit 1, a switch 2, a step-down circuit 3, a main control circuit 4, a relay control circuit 5, a data acquisition circuit 6, a display 7, an indicator light group, and a button circuit 8. The power input circuit 1 is connected to the switch 2, the switch 2 is connected to the step-down circuit 3, the step-down circuit 3 is connected to the main control circuit 4, the main control circuit 4 is connected to the relay control circuit 5, the data acquisition circuit 6, the display 7, the indicator light group, and the button circuit 8, respectively. The relay control circuit 8 is connected to a relay, which is connected between the equipment power supply 14 and the test equipment 15, and the relay is also connected to the data acquisition circuit 6.
[0023] The step-down circuit 3 includes a step-down chip U2, a diode D2, capacitors C22, C17, and C18, resistors R7, R8, and R9, and an inductor L1. The step-down chip is an MP2143DJ. The anode of diode D2 is connected to pin 3 of switch SW2. Pin 2 of switch SW2 is connected to the power input circuit via interface J1. Pins 4 and 5 of switch SW2 are grounded. The cathode of diode D2 is connected to one end of capacitors C22, C17, and C18, one end of resistor R7, and the input terminal VIN of step-down chip U2. The N pin is connected to a 5V voltage. The other ends of capacitors C22, C17, and C18 are all grounded. The other end of resistor R7 is connected to the EN pin of buck converter U2. The OUT pin of buck converter U2 outputs a 3.3V voltage. The SW pin of buck converter U2 is connected to one end of inductor L1, and the other end of inductor L1 is connected to a 3.3V voltage. The FB pin of buck converter U2 is connected to one end of resistors R8 and R9 respectively. The other end of resistor R8 is connected to a 3.3V voltage, and the other end of resistor R9 is grounded. The PGND and AGND pins of buck converter U2 are both grounded.
[0024] The main control circuit 4 includes a main control chip U1, resistors R5, R6, and R13, capacitor C19, and crystal oscillator X1. The control chip is an STM32F103ZET6. Pins VDD_5, VREF+, VDDA, VDD_4, VDD_6, VDD_2, VDD_10, VDD_11, and VDD_3 of the main control chip U1 are all connected to 3.3V. Pins VSS_5, VSSA, VREF-, VSS_4, VSS_6, VSS_2, VSS_10, and VSS_1 of the control chip U1 are connected to... Pins 1 and VSS_3 are both grounded. The BOOT0 pin of control chip U1 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The PB2 pin of control chip U1 is connected to one end of resistor R6, and the other end of resistor R6 is grounded. The NRST pin of control chip U1 is connected to one end of resistor R13 and one end of capacitor C19, respectively. The other end of resistor R13 is connected to 3.3V, and the other end of capacitor C19 is grounded. The OSC_IN and OSC_OUT pins of control chip U1 are connected to crystal oscillator X1. Crystal oscillator X1 is grounded through capacitors C1 and C2. Crystal oscillator X1 provides a stable clock signal for the main control chip U1.
[0025] The relay control circuit 5 includes resistors R1 and R2, transistor Q1, and Zener diode ZD1. One end of resistor R1 is connected to pin PE6 of control chip U1, and the other end of resistor R1 is connected to one end of resistor R2 and the base of transistor Q1. The other end of resistor R2 and the emitter of transistor Q1 are both grounded. The collector of transistor Q1 is connected to the anode of Zener diode ZD1 and port 2 of relay interface CN3. The cathode of Zener diode ZD1 and port 1 of relay interface CN3 are both connected to a 5V power supply. Relay interface CN3 is also connected to a relay.
[0026] The acquisition circuit 6 includes resistors R14 and R15. One end of resistors R14 and R15 is connected to the PE0 pin of the control chip U1, and the other end of resistor R14 is connected to port 2 of interface CN2. Port 1 of interface CN2 is connected to the power supply VCC. Interface CN2 is also connected to a relay. The other end of resistor R15 is grounded. The input terminal of the acquisition circuit 6 is connected to the output terminal of the relay, and the output terminal of the acquisition circuit 6 is connected to the main control circuit 4 to acquire the voltage value that supplies power to the test equipment 15.
[0027] Display 7 includes the following pins: VSS, VDD, VO, RS, R / W, E, DB0, DB1, DB2, DB3, DB4, DB5, DB6, DB7, LED+, and LED-. The VSS pin is grounded. The VDD pin is connected to the power supply VDD. The VO pin is connected to the second terminal of a variable resistor. The first terminal of the variable resistor is grounded. The third terminal of the variable resistor is connected to the VDD_10 pin of control chip U1. The RS pin is connected to PG12 of control chip U1. The R / W pin is connected to PG11 of control chip U1. The pin connections are as follows: pin E is connected to pin PG10 of control chip U1; pin DB0 is connected to pin PD7 of control chip U1; pin DB1 is connected to pin PD6 of control chip U1; pin DB2 is connected to pin PD5 of control chip U1; pin DB3 is connected to pin PD4 of control chip U1; pin DB4 is connected to pin PD3 of control chip U1; pin DB5 is connected to pin PD2 of control chip U1; pin DB6 is connected to pin PD1 of control chip U1; pin DB7 is connected to pin PD0 of control chip U1; pin LED+ is connected to the LED+ terminal; and pin LED- is grounded.
[0028] The indicator light group 9 includes device operation light LED1, test operation light LED2, test ready light LED3, and power light LED4. One end of each of the device operation light LED1, test operation light LED2, and test ready light LED3 is connected to a 3.3V power supply and is also connected to one end of resistor R11. The other end of resistor R11 is connected to the PE5 pin of control chip U1. The other end of device operation light LED1 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the PE2 pin of control chip U1. The other end of test operation light LED2 is connected to one end of resistor R3, and the other end of resistor R3 is connected to the PE3 pin of control chip U1. The other end of test ready light LED3 is connected to one end of resistor R4, and the other end of resistor R4 is connected to the PE4 pin of control chip U1. One end of power light LED4 is connected to a 3.3V voltage, and the other end of power light LED4 is connected to resistor R10. The other end of resistor R10 is grounded.
[0029] The button circuit 8 includes a button SW1, a bipolar diode D1, and a capacitor C16. Pin 1 of button SW1 is connected to the other end of resistor R11. Pin 2 of button SW1 is connected to one end of bipolar diode D1, one end of capacitor C16, and pin PE5 of main control chip U1, respectively. Pin 3 of button SW1 is grounded. Pin 4 of button SW1 is connected to the other end of bipolar diode D1 and capacitor C16, respectively.
[0030] The working principle of this power failure testing device is as follows: External power supply 10 enters the device through power input circuit 1 to power the device. Switch 2 is connected to power input circuit 1 and controls whether the device is powered on. After switch 2 is turned on, the voltage is stepped down by step-down circuit 3, converting the externally input 5V voltage to 3.3V, and then transmitted to main control circuit 4 to provide the working voltage for main control circuit 4. Main control circuit 4 controls the power failure action of the entire device, voltage acquisition and indicator light display, and simultaneously acquires the input status of the buttons. The device is running and waiting for control commands. At this time, power light LED4 is constantly lit, device running light LED1 flashes, and test ready light LED3 is constantly lit. Equipment power supply 11 is connected to one end of the relay output terminal, and the other end is output to test equipment 12 to control the power of test equipment 12. When button SW1 is pressed, the main control circuit 4 sends a power-off command to the relay. The relay output changes the voltage to 0 at the test equipment 12, thus powering off the equipment. At this time, the test run light LED2 flashes and the test ready light LED3 goes out, indicating that the device has started working and is conducting a power-off test. After the test, the voltage output to the test equipment 12 returns to the voltage of the equipment power supply 11. The test run light LED2 goes out, and the test ready light LED3 stays on, waiting for the next power-off test. The duration of the power-off circuit can be modified according to actual needs. The acquisition circuit 6 acquires the relay output signal. The acquired signal is processed by the ADC in the main control circuit 4, and then the value is displayed on the display 7, which clearly shows the effect of the power-off and facilitates test recording.
[0031] This utility model power-off testing device controls the power-on and power-off status of the tested equipment through control circuits and relays. Indicator lights clearly reflect the device's operating status, making the test status readily apparent. It provides a comprehensive testing environment for power-on and power-off of the tested equipment, enabling power-off at shorter time intervals and instantly reducing the voltage from the rated voltage to zero, better reflecting the actual operating conditions of the tested equipment. It can withstand higher voltages, expanding the usable environment for power-off testing. The duration of the power-off signal can be modified according to actual needs, achieving fully automatic testing without personnel supervision. Integrating power-off testing tools into a single device reduces the complexity of equipment connections, simplifies the testing environment and personnel operation, avoids test errors and interruptions due to instrument malfunctions, improves testing efficiency and accuracy, and enhances the overall safety of the device. It has low manufacturing costs, a simple structure, and a compact size, making it easy to move and carry.
[0032] The above description, in conjunction with preferred technical solutions, provides a further detailed explanation of this utility model. It should not be construed that the specific implementation of the utility model is limited to these descriptions. For those skilled in the art, simple deductions and substitutions can be made without departing from the concept of this utility model, and all such modifications and substitutions should be considered within the scope of protection of this utility model.
Claims
1. A power failure testing device, characterized in that: It includes a power input circuit, a switch, a step-down circuit, a main control circuit, a relay control circuit, a data acquisition circuit, a display, an indicator light group, and a button circuit. The power input circuit is connected to the switch, the switch is connected to the step-down circuit, the step-down circuit is connected to the main control circuit, the main control circuit is connected to the relay control circuit, the data acquisition circuit, the display, the indicator light group, and the button circuit, respectively, and the relay control circuit is connected to a relay. The relay is connected between the equipment power supply and the test equipment, and the relay is also connected to the data acquisition circuit.
2. The power failure test device according to claim 1, characterized in that: The step-down circuit includes a step-down chip U2, a diode D2, capacitors C22, C17, and C18, resistors R7, R8, and R9, and an inductor L1. The anode of diode D2 is connected to pin 3 of switch SW2. Pin 2 of switch SW2 is connected to the power input circuit via interface J1. Pins 4 and 5 of switch SW2 are grounded. The cathode of diode D2 is connected to one end of capacitors C22, C17, and C18, one end of resistor R7, and the input terminal VIN of step-down chip U2. The VIN pin of step-down chip U2 is connected to a 5V power supply. The voltage is connected, and the other ends of capacitors C22, C17, and C18 are all grounded. The other end of resistor R7 is connected to the EN pin of buck chip U2. The output terminal OUT of buck chip U2 outputs a voltage of 3.3V. The SW pin of buck chip U2 is connected to one end of inductor L1, and the other end of inductor L1 is connected to a voltage of 3.3V. The FB pin of buck chip U2 is connected to one end of resistors R8 and R9 respectively. The other end of resistor R8 is connected to a voltage of 3.3V, and the other end of resistor R9 is grounded. The PGND and AGND pins of buck chip U2 are both grounded.
3. The power failure test device according to claim 2, characterized in that: The step-down chip is model MP2143DJ.
4. The power failure test device according to claim 1, characterized in that: The main control circuit includes a main control chip U1, resistors R5, R6, and R13, capacitor C19, and crystal oscillator X1. The main control chip U1's VDD_5, VREF+, VDDA, VDD_4, VDD_6, VDD_2, VDD_10, VDD_11, and VDD_3 pins are all connected to 3.3V. The control chip U1's VSS_5, VSSA, VREF-, VSS_4, VSS_6, VSS_2, VSS_10, and VSS_11 pins are connected to... Pins 1 and VSS_3 are both grounded. The BOOT0 pin of control chip U1 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The PB2 pin of control chip U1 is connected to one end of resistor R6, and the other end of resistor R6 is grounded. The NRST pin of control chip U1 is connected to one end of resistor R13 and one end of capacitor C19, respectively. The other end of resistor R13 is connected to 3.3V, and the other end of capacitor C19 is grounded. The OSC_IN and OSC_OUT pins of control chip U1 are connected to crystal oscillator X1, and crystal oscillator X1 is grounded through capacitors C1 and C2.
5. The power failure test device according to claim 4, characterized in that: The control chip is model STM32F103ZET6.
6. The power failure test device according to claim 4, characterized in that: The relay control circuit includes resistors R1 and R2, transistor Q1, and Zener diode ZD1. One end of resistor R1 is connected to pin PE6 of control chip U1, and the other end of resistor R1 is connected to one end of resistor R2 and the base of transistor Q1. The other end of resistor R2 and the emitter of transistor Q1 are both grounded. The collector of transistor Q1 is connected to the anode of Zener diode ZD1 and port 2 of relay interface CN3. The cathode of Zener diode ZD1 and port 1 of relay interface CN3 are both connected to a 5V power supply. Relay interface CN3 is also connected to a relay.
7. The power failure test device according to claim 4, characterized in that: The acquisition circuit includes resistors R14 and R15. One end of resistors R14 and R15 is connected to the PE0 pin of the control chip U1, the other end of resistor R14 is connected to port 2 of interface CN2, port 1 of interface CN2 is connected to power supply VCC, interface CN2 is also connected to a relay, and the other end of resistor R15 is grounded.
8. The power failure test device according to claim 4, characterized in that: The display includes VSS, VDD, VO, RS, R / W, E, DB0, DB1, DB2, DB3, DB4, DB5, DB6, DB7, LED+, and LED- pins. The VSS pin is grounded, the VDD pin is connected to the power supply VDD, the VO pin is connected to the second terminal of a variable resistor, the first terminal of the variable resistor is grounded, the third terminal of the variable resistor is connected to the VDD_10 pin of the control chip U1, the RS pin is connected to PG12 of the control chip U1, and the R / W pin is connected to PG11 of the control chip U1. Pin connections: Pin E is connected to PG10 of control chip U1; pin DB0 is connected to PD7 of control chip U1; pin DB1 is connected to PD6 of control chip U1; pin DB2 is connected to PD5 of control chip U1; pin DB3 is connected to PD4 of control chip U1; pin DB4 is connected to PD3 of control chip U1; pin DB5 is connected to PD2 of control chip U1; pin DB6 is connected to PD1 of control chip U1; pin DB7 is connected to PD0 of control chip U1; LED+ pin is connected to LED+ terminal; and LED- pin is grounded.
9. The power failure test device according to claim 4, characterized in that: The indicator light group includes a device operation light (LED1), a test operation light (LED2), a test ready light (LED3), and a power light (LED4). One end of each of the device operation light (LED1), test operation light (LED2), and test ready light (LED3) is connected to a 3.3V power supply and is also connected to one end of a resistor R11. The other end of resistor R11 is connected to the PE5 pin of the control chip U1. The other end of device operation light (LED1) is connected to one end of resistor R12, and the other end of resistor R12 is connected to the PE2 pin of the control chip U1. The other end of test operation light (LED2) is connected to one end of resistor R3, and the other end of resistor R3 is connected to the PE3 pin of the control chip U1. The other end of test ready light (LED3) is connected to one end of resistor R4, and the other end of resistor R4 is connected to the PE4 pin of the control chip U1. One end of power light (LED4) is connected to a 3.3V voltage, and the other end of power light (LED4) is connected to resistor R10. The other end of resistor R10 is grounded.
10. The power failure test device according to claim 9, characterized in that: The button circuit includes a button SW1, a bipolar diode D1, and a capacitor C16. Pin 1 of button SW1 is connected to the other end of resistor R11. Pin 2 of button SW1 is connected to one end of bipolar diode D1, one end of capacitor C16, and pin PE5 of main control chip U1, respectively. Pin 3 of button SW1 is grounded. Pin 4 of button SW1 is connected to the other end of bipolar diode D1 and capacitor C16, respectively.