High-power intelligent DC UPS system

Abstract

The utility model relates to the technical field of DC UPS, in particular to a high-power intelligent DC UPS system, which comprises a UPS main loop, an MCU control module, a voltage detection module, a charging module, a battery and a load, the UPS main loop is respectively connected with the MCU control module, the voltage detection module and the charging module, the MCU control module is respectively connected with the voltage detection module and the charging module, and the battery is connected with the charging module. The charging module is connected with the battery; the UPS main loop comprises a charging and discharging circuit and a battery detection circuit, the charging and discharging circuit is respectively connected with a battery and a load, and the battery detection circuit is respectively connected with the charging and discharging circuit and the battery; the high-power intelligent direct-current UPS system provided by the utility model has the function of preventing reverse connection of the battery, can be used for testing the health degree of the battery and adjusting the discharge time of the battery, and is high in practicability and wide in universality.

Description

Technical Field

[0001] This utility model relates to the field of DC UPS technology, and in particular to a high-power intelligent DC UPS system. Background Technology

[0002] A DC UPS is an uninterruptible power supply system suitable for industrial and mining enterprises, education, business, finance, computers, servers, office automation equipment, and security monitoring equipment.

[0003] Currently, existing DC UPS systems lack features such as protection against reverse battery connection and battery health testing, resulting in limited practicality. Furthermore, commercially available DC UPS systems cannot adjust battery discharge time, are incompatible with different battery types, and have poor versatility. Utility Model Content

[0004] The technical problem to be solved by this utility model is to overcome the shortcomings of the prior art and provide a high-power intelligent DC UPS system with anti-reverse battery connection function, battery health test and battery discharge time adjustment, which is highly practical and widely applicable.

[0005] The technical solution adopted by this utility model to solve its technical problem is: a high-power intelligent DC UPS system, including a UPS main circuit, an MCU control module, a voltage detection module, a charging module, a battery, and a load. The UPS main circuit is connected to the MCU control module, the voltage detection module, and the charging module respectively. The MCU control module is connected to the voltage detection module and the charging module respectively. The charging module is connected to the battery. The UPS main circuit includes a charging and discharging circuit and a battery detection circuit. The charging and discharging circuit is connected to the battery and the load respectively. The battery detection circuit is connected to the charging and discharging circuit and the battery respectively.

[0006] Furthermore, both the charging / discharging circuit and the battery detection circuit include a shared MOSFET Q3, the drain of which is connected to the battery.

[0007] Furthermore, the charging and discharging circuit also includes MOSFETs Q1, Q2, and Q4, diodes DT1 and DT5, and resistors R37 and R38. The source of MOSFET Q1 is connected to the source of MOSFET Q2, and its drain is connected to the drain of MOSFET Q4. The gate of MOSFET Q1 is connected to the gate of MOSFET Q2 through resistors R37 and R38 in sequence. The drain of MOSFET Q2 is connected to the load. The source of MOSFET Q4 is connected to the source of MOSFET Q3. Diode DT1 is connected in parallel with resistor R38, and diode DT5 is connected in parallel with resistor R37. The common terminal of MOSFETs Q1 and Q4 is connected to the charging module.

[0008] Furthermore, the battery detection circuit also includes MOSFET Q5, diodes DT2 and DT9, capacitor C80, and resistors R1, R19, R20, R21, and R41. The drain of MOSFET Q5 is connected to the common terminal of MOSFETs Q3 and Q4 through resistor R1 and diode DT9, and its source is grounded. One end of resistor R41 is connected to the gate of MOSFET Q3. Diode DT2 is connected in parallel with resistor R41. One end of resistor R19 is connected to the common terminal of MOSFETs Q3 and Q4, and its other end is connected to the MCU control module. One end of resistor R21 is connected to the common terminal of resistor R19 and the MCU control module, and its other end is grounded. Capacitor C80 and resistor R20 are both connected in parallel with resistor R21.

[0009] Furthermore, the UPS main circuit also includes optocoupler isolation drivers OC2, OC3, OC4, MOSFETs Q9, Q10, Q11, diode DT4, and resistors R36, R44, R45, R46, R48, R49, R50, R51, R52, and R53. Pin 1 of optocoupler isolation driver OC2 is connected to one end of resistor R46 and the drain of MOSFET Q9, and its pin 2 is grounded. Pin 3 of optocoupler isolation driver OC2 is connected to the common terminal of MOSFETs Q1 and Q2, and its pin 4 is connected to the common terminal of resistors R37 and R38. The gate of MOSFET Q9 is connected to the MCU control module through resistor R49, and its source is connected to the common terminal of MOSFET Q9 and resistor R49 through resistor R48. Pin 1 of optocoupler isolation driver OC3 is connected to... Pin 1 of the optocoupler isolation driver OC4 and pin 2 of the optocoupler isolation driver OC4 are connected to the drain of MOSFET Q10. The gate of MOSFET Q10 is connected to the MCU control module through resistor R51, and its source is connected to the common terminal of MOSFET Q10 and resistor R51 through resistor R50. Pin 3 of the optocoupler isolation driver OC3 is connected to the common terminal of MOSFETs Q3 and Q4 and pin 3 of optocoupler isolation driver OC4, and pin 4 of the optocoupler isolation driver OC4 is connected to the gate of MOSFET Q4 through resistor R36. Diode DT4 is connected in parallel with resistor R36. Pin 2 of the optocoupler isolation driver OC4 is connected to the drain of MOSFET Q11, and pin 4 of the optocoupler isolation driver OC4 is connected to the other end of resistor R41. The gate of MOSFET Q11 is connected to the MCU control module through resistor R53, and its source is connected to the common terminal of MOSFET Q11 and resistor R53 through resistor R52.

[0010] Furthermore, the UPS main circuit also includes MOSFETs Q7 and Q8, diode DT3, and resistors R22, R23, R42, and R43. The gate of MOSFET Q7 is connected to the drain of MOSFET Q8, and its drain is connected to the gate of MOSFET Q5 through resistor R42. Diode DT3 is connected in parallel with resistor R42. One end of resistor R22 is connected to the source of MOSFET Q7, and its other end is connected to the common terminal of MOSFETs Q7 and Q8. The gate of MOSFET Q8 is connected to the MCU control module through resistor R23, and its source is connected to the common terminal of MOSFET Q8 and resistor R23 through resistor R24. One end of resistor R43 is connected to the source of MOSFET Q5, and its other end is connected to the common terminal of MOSFET Q5 and resistor R42.

[0011] Furthermore, the UPS main circuit also includes chip IC1, resistors R39, R40 and RS2. The drain of MOSFET Q2 is connected to the load through resistor RS2. Pin 5 of chip IC1 is connected to the common terminal of MOSFET Q2 and resistor RS2 through resistor R39, and pin 4 is connected to the common terminal of resistor RS2 and load through resistor R40. Pin 2 of chip IC1 is connected to the single-chip microcomputer.

[0012] Furthermore, the voltage detection module includes chips IC4 and IC5, capacitors C70 and C71, and resistors R30, R31, R32, and R33. Pin 1 of chip IC4 is connected to pin 1 of chip IC5, and pin 2 of chip IC4 is connected to pin 6 of chip IC5. Pin 4 of chip IC4 is connected to the MCU control module, and pin 5 of chip IC4 is grounded through capacitor C71. Pin 3 of chip IC5 is connected to the UPS main circuit in sequence through resistors R30 and R31. Pin 4 of chip IC5 is connected to pin 5 in sequence through resistor R32 and capacitor C70. One end of resistor R33 is connected to the common terminal of chip IC5 and resistor R30, and the other end of resistor R33 is connected to the common terminal of chip IC5 and resistor R32.

[0013] Furthermore, the charging module includes a transformer T1, chips IC7 and IC9, a DIP switch SW2, an optocoupler isolation driver OC1, comparators IC8-A and IC8-B, common-mode inductors LX1 and LX2, inductor L3, differential-mode capacitor CX1, common-mode capacitors CY1, CY2, CY3, CY4, CY5, and CY6, diodes D3, D8, D16, and D17, and resistors R040, R90, R91, R92, R102, R103, R104, and R115. Pin 1 of the transformer T1 is connected to terminal 4 of the common-mode inductor LX2, and its pin 5 is sequentially connected to diodes... D3, inductor L3, resistor R040, and diode D8 are connected to the UPS main circuit. Pin 2 of chip IC7 is connected to comparator IC8-B through resistor R92, and pin 3 of IC7 is connected to 5V. Pin 4 of chip IC7 is connected to the common terminal of diode D8 and resistor R040 through resistor R90, and pin 5 of IC7 is connected to the common terminal of inductor L3 and resistor R040 through resistor R91. Pin 1 of DIP switch SW2 is connected to 5V. Comparator IC8-B is connected to pin 3 of optocoupler isolation driver OC1 through resistor R102 and diode D17. Pin 1 of optocoupler isolation driver OC1 is connected to 5V. The IC9 chip is connected to the comparator IC8-A via resistor D16 and diode R103. The pin 4 of the optocoupler driver OC1 is connected to the common terminal of inductor L3 and diode D3 via resistor R104. The IC9 chip is connected to terminal 4 of common-mode inductor LX2 via resistor R115. Terminal 1 of common-mode inductor LX2 is connected to terminal 4 of common-mode inductor LX1, and terminal 2 is connected to terminal 3 of common-mode inductor LX1. One end of the differential-mode capacitor CX1 is connected to terminal 1 of common-mode inductor LX2, and the other end is connected to terminal 2 of common-mode inductor LX2. One end of common mode capacitor CY1 is connected to terminal 1 of common mode inductor LX1, and the other end is grounded. One end of common mode capacitor CY2 is connected to terminal 2 of common mode inductor LX1, and the other end is grounded. One end of common mode capacitor CY3 is connected to terminal 4 of common mode inductor LX1, and the other end is grounded. One end of common mode capacitor CY4 is connected to terminal 3 of common mode inductor LX1, and the other end is grounded. One end of common mode capacitor CY5 is connected to the common terminal of common mode inductor LX2 and resistor R115, and the other end is grounded. One end of common mode capacitor CY6 is connected to terminal 3 of common mode inductor LX2, and the other end is grounded.

[0014] The beneficial effects of this utility model are:

[0015] This invention, through the design of charging and discharging circuits and battery detection circuits, enables the system to prevent reverse battery connection and perform battery health testing, making it highly practical. In addition, the charging module allows the system to be configured with different charging curves, cutoff voltages, and charging currents for different types of batteries, thereby adjusting the battery discharge time and making it widely applicable. Attached Figure Description

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0017] Figure 1 This is a framework diagram of the present invention;

[0018] Figure 2 This is the circuit diagram of the UPS main circuit in this utility model;

[0019] Figure 3 This is a circuit diagram of the voltage detection module in this utility model;

[0020] Figure 4 This is a circuit diagram of the MCU control module in this utility model;

[0021] Figure 5 This is a circuit diagram of the charging module in this utility model;

[0022] Figure 6 This is the circuit diagram of the DIP switch in this utility model.

[0023] In the diagram: 100, UPS main circuit; 110, charging and discharging circuit; 120, battery detection circuit; 200, MCU control module; 300, voltage detection module; 400, charging module; 500, battery; 600, load. Detailed Implementation

[0024] The present invention will now be further described with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the present invention, and therefore only show the components relevant to the present invention.

[0025] like Figure 1 and Figure 2As shown, a high-power intelligent DC UPS system includes a UPS main circuit 100, an MCU control module 200, a voltage detection module 300, a charging module 400, a battery 500, and a load 600. The UPS main circuit 100 is connected to the MCU control module 200, the voltage detection module 300, and the charging module 400. The MCU control module 200 is also connected to the voltage detection module 300 and the charging module 400. The charging module 400 is connected to the battery 500. The UPS main circuit 100 includes a charging / discharging circuit 110 and a battery detection circuit 120. The charging / discharging circuit 110 is connected to the battery 500 and the load 600, and the battery detection circuit 120 is connected to both the charging / discharging circuit 110 and the battery 500. The charging / discharging circuit 110 and the battery detection circuit 120 enable the system to prevent reverse battery connection and perform battery health testing, making it highly practical. Furthermore, the charging module 400 allows the system to be configured with different charging curves, cutoff voltages, and charging currents for different types of batteries, thus adjusting the battery discharge time and providing wide versatility.

[0026] like Figure 2 As shown, both the charging / discharging circuit 110 and the battery detection circuit 120 include a common MOSFET Q3, and the drain of MOSFET Q3 is connected to the battery 500.

[0027] like Figure 2 As shown, the charging and discharging circuit 110 also includes MOSFETs Q1, Q2, and Q4, diodes DT1 and DT5, and resistors R37 and R38. The source of MOSFET Q1 is connected to the source of MOSFET Q2, and its drain is connected to the drain of MOSFET Q4. The gate of MOSFET Q1 is connected to the gate of MOSFET Q2 through resistors R37 and R38 in sequence. The drain of MOSFET Q2 is connected to the load 600. The source of MOSFET Q4 is connected to the source of MOSFET Q3. Diode DT1 is connected in parallel with resistor R38, and diode DT5 is connected in parallel with resistor R37. The common terminal of MOSFETs Q1 and Q4 is connected to the charging module 400.

[0028] like Figure 2 As shown, the battery detection circuit 120 also includes MOSFET Q5, diodes DT2 and DT9, capacitor C80, and resistors R1, R19, R20, R21, and R41. The drain of MOSFET Q5 is connected to the common terminal of MOSFETs Q3 and Q4 through resistor R1 and diode DT9, and its source is grounded. One end of resistor R41 is connected to the gate of MOSFET Q3. Diode DT2 is connected in parallel with resistor R41. One end of resistor R19 is connected to the common terminal of MOSFETs Q3 and Q4, and its other end is connected to MCU control module 200. One end of resistor R21 is connected to the common terminal of resistor R19 and MCU control module 200, and its other end is grounded. Capacitor C80 and resistor R20 are both connected in parallel with resistor R21.

[0029] like Figure 2 As shown, the UPS main circuit 100 mainly consists of two sets of back-to-back NMOS and MOS transistors (i.e., MOSFETs Q1, Q2, Q3, and Q4) with isolated drives, plus a battery detection circuit 120. A diode DT9 is included to prevent reverse connection of battery 500. After battery 500 is connected, MOSFET Q3 is turned on via the isolated drive. If the VABT voltage is within the normal range, MOSFET Q5 is turned on. Battery 500 forms a circuit to ground through the power resistor, generating a voltage drop across the power resistor. The VBAT voltage is then detected to determine the health of battery 500.

[0030] like Figure 2 As shown, the UPS main circuit 100 also includes optocoupler isolation drivers OC2, OC3, OC4, MOSFETs Q9, Q10, Q11, diode DT4, and resistors R36, R44, R45, R46, R48, R49, R50, R51, R52, and R53. Pin 1 of optocoupler isolation driver OC2 is connected to one end of resistor R46 and the drain of MOSFET Q9, and pin 2 is grounded. Pin 3 of optocoupler isolation driver OC2 is connected to the common terminal of MOSFETs Q1 and Q2, and pin 4 is connected to the common terminal of resistors R37 and R38. The gate of MOSFET Q9 is connected to the MCU control module 200 through resistor R49, and its source is connected to the common terminal of MOSFET Q9 and resistor R49 through resistor R48. Pin 1 of optocoupler isolation driver OC3 is connected to the optical... Pin 1 of optocoupler isolation driver OC4 is connected to the drain of MOSFET Q10, and pin 2 of MOSFET Q10 is connected to the MCU control module 200 through resistor R51. The source of MOSFET Q10 is connected to the common terminal of MOSFET Q10 and resistor R51 through resistor R50. Pin 3 of optocoupler isolation driver OC3 is connected to the common terminal of MOSFETs Q3 and Q4 and pin 3 of optocoupler isolation driver OC4, and pin 4 of optocoupler isolation driver OC4 is connected to the gate of MOSFET Q4 through resistor R36. Diode DT4 is connected in parallel with resistor R36. Pin 2 of optocoupler isolation driver OC4 is connected to the drain of MOSFET Q11, and pin 4 of optocoupler isolation driver OC4 is connected to the other end of resistor R41. The gate of MOSFET Q11 is connected to the MCU control module 200 through resistor R53, and the source of MOSFET Q11 is connected to the common terminal of MOSFET Q11 and resistor R53 through resistor R52.

[0031] like Figure 2As shown, the UPS main circuit 100 also includes MOSFETs Q7 and Q8, diode DT3, and resistors R22, R23, R42, and R43. The gate of MOSFET Q7 is connected to the drain of MOSFET Q8, and its drain is connected to the gate of MOSFET Q5 through resistor R42. Diode DT3 is connected in parallel with resistor R42. One end of resistor R22 is connected to the source of MOSFET Q7, and the other end is connected to the common terminal of MOSFETs Q7 and Q8. The gate of MOSFET Q8 is connected to the MCU control module 200 through resistor R23, and its source is connected to the common terminal of MOSFET Q8 and resistor R23 through resistor R24. One end of resistor R43 is connected to the source of MOSFET Q5, and the other end is connected to the common terminal of MOSFET Q5 and resistor R42.

[0032] like Figure 2 As shown, the UPS main circuit 100 also includes chip IC1, resistors R39, R40 and RS2. The drain of MOSFET Q2 is connected to the load 600 through resistor RS2. Pin 5 of chip IC1 is connected to the common terminal of MOSFET Q2 and resistor RS2 through resistor R39, and pin 4 is connected to the common terminal of resistor RS2 and load 600 through resistor R40. Pin 2 of chip IC1 is connected to the single-chip microcomputer.

[0033] Under normal circumstances, when the input voltage is within the set range, the AND gate outputs a high level, MOSFETs Q1 and Q2 are turned off, and the load energy is provided by the input. Once the input is disconnected, MOSFETs Q1 and Q2 are turned on, and the load energy is provided by the 500 battery. At this time, the microcontroller will detect the discharge time. Once the discharge time set on the panel is reached, the microcontroller will shut down the entire system.

[0034] It should be noted that, Figure 2 The input control includes reverse connection protection, input over / under voltage detection, and overcurrent detection, which are existing technologies and will not be elaborated here.

[0035] like Figure 3 and Figure 4 As shown, the voltage detection module 300 includes chips IC4 and IC5, capacitors C70 and C71, and resistors R30, R31, R32, and R33. Pin 1 of chip IC4 is connected to pin 1 of chip IC5, and pin 2 of chip IC4 is connected to pin 6 of chip IC5. Pin 4 of chip IC4 is connected to MCU control module 200, and pin 5 of chip IC4 is grounded through capacitor C71. Pin 3 of chip IC5 is connected to UPS main circuit 100 through resistors R30 and R31 in sequence. Pin 4 of chip IC5 is connected to pin 5 through resistor R32 and capacitor C70 in sequence. One end of resistor R33 is connected to the common terminal of chip IC5 and resistor R30, and the other end of resistor R33 is connected to the common terminal of chip IC5 and resistor R32.

[0036] like Figure 5 and Figure 6 As shown, the charging module 400 includes a transformer T1, chips IC7 and IC9, a DIP switch SW2, an optocoupler isolation driver OC1, comparators IC8-A and IC8-B, common-mode inductors LX1 and LX2, inductor L3, differential-mode capacitor CX1, common-mode capacitors CY1, CY2, CY3, CY4, CY5, and CY6, diodes D3, D8, D16, and D17, and resistors R040, R90, R91, R92, R102, R103, R104, and R115. Pin 1 of the transformer T1 is connected to terminal 4 of the common-mode inductor LX2, and its pin 5 is connected sequentially through... Diode D3, inductor L3, resistor R040, and diode D8 are connected to the UPS main circuit 100. Pin 2 of chip IC7 is connected to comparator IC8-B through resistor R92, and pin 3 of IC7 is connected to 5V. Pin 4 of chip IC7 is connected to the common terminal of diode D8 and resistor R040 through resistor R90, and pin 5 of IC7 is connected to the common terminal of inductor L3 and resistor R040 through resistor R91. Pin 1 of DIP switch SW2 is connected to 5V. Comparator IC8-B is connected to pin 3 of optocoupler isolation driver OC1 through resistor R102 and diode D17. Optocoupler isolation driver OC1... Pin 1 of IC1 is connected to IC9, and pin 3 is connected to comparator IC8-A via resistor D16 and diode R103. Pin 4 of optocoupler driver OC1 is connected to the common terminal of inductor L3 and diode D3 via resistor R104. IC9 is connected to terminal 4 of common-mode inductor LX2 via resistor R115. Terminal 1 of common-mode inductor LX2 is connected to terminal 4 of common-mode inductor LX1, and terminal 2 is connected to terminal 3 of common-mode inductor LX1. One end of differential-mode capacitor CX1 is connected to terminal 1 of common-mode inductor LX2, and the other end is connected to terminal 2 of common-mode inductor LX2. One end of common-mode capacitor CY1 is connected to terminal 1 of common-mode inductor LX1, and the other end is grounded. One end of common-mode capacitor CY2 is connected to terminal 2 of common-mode inductor LX1, and the other end is grounded. One end of common-mode capacitor CY3 is connected to terminal 4 of common-mode inductor LX1, and the other end is grounded. One end of common-mode capacitor CY4 is connected to terminal 3 of common-mode inductor LX1, and the other end is grounded. One end of common-mode capacitor CY5 is connected to the common terminal of common-mode inductor LX2 and resistor R115, and the other end is grounded. One end of common-mode capacitor CY6 is connected to terminal 3 of common-mode inductor LX2, and the other end is grounded. The battery discharge time is adjusted via DIP switch SW2 and the microcontroller. The microcontroller recognizes 0 and 1 signals to set the discharge time. If the set discharge time is exceeded, the UPS system is shut down.

[0037] The above embodiments are only for illustrating the technical concept and features of this utility model. Their purpose is to enable those skilled in the art to understand the content of this utility model and implement it. They should not be used to limit the protection scope of this utility model. All equivalent changes or modifications made in accordance with the spirit and essence of this utility model should be covered within the protection scope of this utility model.

Claims

1. A high-power intelligent DC UPS system, characterized in that: The UPS includes a UPS main circuit (100), an MCU control module (200), a voltage detection module (300), a charging module (400), a battery (500), and a load (600). The UPS main circuit (100) is connected to the MCU control module (200), the voltage detection module (300), and the charging module (400). The MCU control module (200) is connected to the voltage detection module (300) and the charging module (400). The charging module (400) is connected to the battery (500). The UPS main circuit (100) includes a charging and discharging circuit (110) and a battery detection circuit (120). The charging and discharging circuit (110) is connected to the battery (500) and the load (600). The battery detection circuit (120) is connected to the charging and discharging circuit (110) and the battery (500).

2. The high-power intelligent DC UPS system according to claim 1, characterized in that: The charging / discharging circuit (110) and the battery detection circuit (120) both include a common MOSFET Q3, the drain of which is connected to the battery (500).

3. The high-power intelligent DC UPS system according to claim 2, characterized in that: The charging and discharging circuit (110) further includes MOSFETs Q1, Q2, and Q4, diodes DT1 and DT5, and resistors R37 and R38. The source of MOSFET Q1 is connected to the source of MOSFET Q2, and its drain is connected to the drain of MOSFET Q4. The gate of MOSFET Q1 is connected to the gate of MOSFET Q2 through resistors R37 and R38 in sequence. The drain of MOSFET Q2 is connected to the load (600). The source of MOSFET Q4 is connected to the source of MOSFET Q3. Diode DT1 is connected in parallel with resistor R38, and diode DT5 is connected in parallel with resistor R37. The common terminal of MOSFETs Q1 and Q4 is connected to the charging module (400).

4. The high-power intelligent DC UPS system according to claim 3, characterized in that: The battery detection circuit (120) further includes MOSFET Q5, diodes DT2 and DT9, capacitor C80, and resistors R1, R19, R20, R21, and R41. The drain of MOSFET Q5 is connected to the common terminal of MOSFETs Q3 and Q4 through resistor R1 and diode DT9, and its source is grounded. One end of resistor R41 is connected to the gate of MOSFET Q3. Diode DT2 is connected in parallel with resistor R41. One end of resistor R19 is connected to the common terminal of MOSFETs Q3 and Q4, and its other end is connected to the MCU control module (200). One end of resistor R21 is connected to the common terminal of resistor R19 and MCU control module (200), and its other end is grounded. Capacitor C80 and resistor R20 are both connected in parallel with resistor R21.

5. The high-power intelligent DC UPS system according to claim 4, characterized in that: The UPS main circuit (100) also includes optocoupler isolation drivers OC2, OC3, OC4, MOSFETs Q9, Q10, Q11, diode DT4, and resistors R36, R44, R45, R46, R48, R49, R50, R51, R52, and R53. Pin 1 of optocoupler isolation driver OC2 is connected to one end of resistor R46 and the drain of MOSFET Q9, and pin 2 is grounded. Pin 3 of optocoupler isolation driver OC2 is connected to the common terminal of MOSFETs Q1 and Q2, and pin 4 is connected to the common terminal of resistors R37 and R38. The gate of MOSFET Q9 is connected to the MCU control module (200) through resistor R49, and its source is connected to the common terminal of MOSFET Q9 and resistor R49 through resistor R48. Pin 1 of optocoupler isolation driver OC3 is connected to the optocoupler through resistors R45 and R44. Pin 1 of the isolation driver OC4 and pin 2 of the isolation driver OC4 are connected to the drain of MOSFET Q10. The gate of MOSFET Q10 is connected to the MCU control module (200) through resistor R51, and its source is connected to the common terminal of MOSFET Q10 and resistor R51 through resistor R50. Pin 3 of the optocoupler isolation driver OC3 is connected to the common terminal of MOSFETs Q3 and Q4 and pin 3 of optocoupler isolation driver OC4, and pin 4 of the optocoupler isolation driver OC4 is connected to the gate of MOSFET Q4 through resistor R36. Diode DT4 is connected in parallel with resistor R36. Pin 2 of the optocoupler isolation driver OC4 is connected to the drain of MOSFET Q11, and pin 4 of the optocoupler isolation driver OC4 is connected to the other end of resistor R41. The gate of MOSFET Q11 is connected to the MCU control module (200) through resistor R53, and its source is connected to the common terminal of MOSFET Q11 and resistor R53 through resistor R52.

6. The high-power intelligent DC UPS system according to claim 5, characterized in that: The UPS main circuit (100) also includes MOSFETs Q7 and Q8, diode DT3, and resistors R22, R23, R42, and R43. The gate of MOSFET Q7 is connected to the drain of MOSFET Q8, and its drain is connected to the gate of MOSFET Q5 through resistor R42. Diode DT3 is connected in parallel with resistor R42. One end of resistor R22 is connected to the source of MOSFET Q7, and its other end is connected to the common terminal of MOSFETs Q7 and Q8. The gate of MOSFET Q8 is connected to the MCU control module (200) through resistor R23, and its source is connected to the common terminal of MOSFET Q8 and resistor R23 through resistor R24. One end of resistor R43 is connected to the source of MOSFET Q5, and its other end is connected to the common terminal of MOSFET Q5 and resistor R42.

7. The high-power intelligent DC UPS system according to claim 6, characterized in that: The UPS main circuit (100) also includes chip IC1, resistors R39, R40 and RS2. The drain of MOSFET Q2 is connected to the load (600) through resistor RS2. Pin 5 of chip IC1 is connected to the common terminal of MOSFET Q2 and resistor RS2 through resistor R39, and pin 4 is connected to the common terminal of resistor RS2 and load (600) through resistor R40. Pin 2 of chip IC1 is connected to the single-chip microcomputer.

8. The high-power intelligent DC UPS system according to claim 1, characterized in that: The voltage detection module (300) includes chips IC4 and IC5, capacitors C70 and C71, and resistors R30, R31, R32, and R33. Pin 1 of chip IC4 is connected to pin 1 of chip IC5, and pin 2 of chip IC4 is connected to pin 6 of chip IC5. Pin 4 of chip IC4 is connected to the MCU control module (200), and pin 5 of chip IC4 is grounded through capacitor C71. Pin 3 of chip IC5 is connected to the UPS main circuit (100) in sequence through resistors R30 and R31. Pin 4 of chip IC5 is connected to pin 5 in sequence through resistor R32 and capacitor C70. One end of resistor R33 is connected to the common terminal of chip IC5 and resistor R30, and the other end of resistor R33 is connected to the common terminal of chip IC5 and resistor R32.

9. The high-power intelligent DC UPS system according to claim 1, characterized in that: The charging module (400) includes a transformer T1, chips IC7 and IC9, a DIP switch SW2, an optocoupler isolation driver OC1, comparators IC8-A and IC8-B, common-mode inductors LX1 and LX2, inductor L3, differential-mode capacitor CX1, common-mode capacitors CY1, CY2, CY3, CY4, CY5, and CY6, diodes D3, D8, D16, and D17, and resistors R040, R90, R91, R92, R102, R103, R104, and R115. Pin 1 of the transformer T1 is connected to terminal 4 of the common-mode inductor LX2, and its pin 5 is sequentially connected to diode D...

3. Inductor L3, resistor R040, and diode D8 are connected to the UPS main circuit (100). Pin 2 of chip IC7 is connected to comparator IC8-B through resistor R92, and pin 3 of IC7 is connected to 5V. Pin 4 of chip IC7 is connected to the common terminal of diode D8 and resistor R040 through resistor R90, and pin 5 of IC7 is connected to the common terminal of inductor L3 and resistor R040 through resistor R91. Pin 1 of DIP switch SW2 is connected to 5V. Comparator IC8-B is connected to pin 3 of optocoupler isolation driver OC1 through resistor R102 and diode D17. Pin 1 is connected to chip IC9, and its pin 3 is connected to comparator IC8-A via resistor D16 and diode R103. Pin 4 of the optocoupler isolation driver OC1 is connected to the common terminal of inductor L3 and diode D3 via resistor R104. Chip IC9 is connected to terminal 4 of common-mode inductor LX2 via resistor R115. Terminal 1 of common-mode inductor LX2 is connected to terminal 4 of common-mode inductor LX1, and terminal 2 is connected to terminal 3 of common-mode inductor LX1. One end of differential-mode capacitor CX1 is connected to terminal 1 of common-mode inductor LX2, and the other end is connected to terminal 2 of common-mode inductor LX2. One end of the common-mode capacitor CY1 is connected to terminal 1 of the common-mode inductor LX1, and the other end is grounded. One end of the common-mode capacitor CY2 is connected to terminal 2 of the common-mode inductor LX1, and the other end is grounded. One end of the common-mode capacitor CY3 is connected to terminal 4 of the common-mode inductor LX1, and the other end is grounded. One end of the common-mode capacitor CY4 is connected to terminal 3 of the common-mode inductor LX1, and the other end is grounded. One end of the common-mode capacitor CY5 is connected to the common terminal of the common-mode inductor LX2 and the resistor R115, and the other end is grounded. One end of the common-mode capacitor CY6 is connected to terminal 3 of the common-mode inductor LX2, and the other end is grounded.

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